Allwinner H3 SPI controller has same architecture as A31.
So most configuration is identical except one thing - FIFO capacity.
A31 H3
------------------------------------
Number of controllers 4 2
Number of FIFO depth 128 64
Transfer bits 8 8
Register maps are sharable, so sun6i SPI driver is reusable with
device configuration.
Tested on Nano Pi M1 and SPI slave device is TI LP8860.
Milo Kim (3):
spi: sun6i: Add binding for Allwinner H3 SPI controller
spi: sun6i: Support Allwinner H3 SPI controller
spi: sun6i: Use the driver data to get the buffer size
.../devicetree/bindings/spi/spi-sun6i.txt | 25 +++++++++++-
drivers/spi/Kconfig | 4 +-
drivers/spi/spi-sun6i.c | 44 +++++++++++++++-------
3 files changed, 56 insertions(+), 17 deletions(-)
--
2.9.3
H3 SPI has same architecture as A31 except FIFO capacity.
To configure the buffer size separately, compatible property should be
different. Optional DMA specifiers and example are added.
Cc: Mark Brown <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: Maxime Ripard <[email protected]>
Cc: Chen-Yu Tsai <[email protected]>
Signed-off-by: Milo Kim <[email protected]>
---
.../devicetree/bindings/spi/spi-sun6i.txt | 25 ++++++++++++++++++++--
1 file changed, 23 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/spi/spi-sun6i.txt b/Documentation/devicetree/bindings/spi/spi-sun6i.txt
index 21de73d..2ec99b8 100644
--- a/Documentation/devicetree/bindings/spi/spi-sun6i.txt
+++ b/Documentation/devicetree/bindings/spi/spi-sun6i.txt
@@ -1,7 +1,7 @@
-Allwinner A31 SPI controller
+Allwinner A31/H3 SPI controller
Required properties:
-- compatible: Should be "allwinner,sun6i-a31-spi".
+- compatible: Should be "allwinner,sun6i-a31-spi" or "allwinner,sun8i-h3-spi".
- reg: Should contain register location and length.
- interrupts: Should contain interrupt.
- clocks: phandle to the clocks feeding the SPI controller. Two are
@@ -12,6 +12,11 @@ Required properties:
- resets: phandle to the reset controller asserting this device in
reset
+Optional properties:
+- dmas: DMA specifiers for rx and tx dma. See the DMA client binding,
+ Documentation/devicetree/bindings/dma/dma.txt
+- dma-names: DMA request names should include "rx" and "tx" if present.
+
Example:
spi1: spi@01c69000 {
@@ -22,3 +27,19 @@ spi1: spi@01c69000 {
clock-names = "ahb", "mod";
resets = <&ahb1_rst 21>;
};
+
+spi0: spi@01c68000 {
+ compatible = "allwinner,sun8i-h3-spi";
+ reg = <0x01c68000 0x1000>;
+ interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
+ clock-names = "ahb", "mod";
+ dmas = <&dma 23>, <&dma 23>;
+ dma-names = "rx", "tx";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_pins>;
+ resets = <&ccu RST_BUS_SPI0>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+};
--
2.9.3
The argument can be removed because the driver private data has it.
Cc: Mark Brown <[email protected]>
Cc: Maxime Ripard <[email protected]>
Cc: Chen-Yu Tsai <[email protected]>
Signed-off-by: Milo Kim <[email protected]>
---
drivers/spi/spi-sun6i.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/spi/spi-sun6i.c b/drivers/spi/spi-sun6i.c
index 91235b2..c638f5d 100644
--- a/drivers/spi/spi-sun6i.c
+++ b/drivers/spi/spi-sun6i.c
@@ -105,8 +105,9 @@ static inline void sun6i_spi_write(struct sun6i_spi *sspi, u32 reg, u32 value)
writel(value, sspi->base_addr + reg);
}
-static inline void sun6i_spi_drain_fifo(struct sun6i_spi *sspi, int len)
+static inline void sun6i_spi_drain_fifo(struct sun6i_spi *sspi)
{
+ int len = sspi->fifo_depth;
u32 reg, cnt;
u8 byte;
@@ -125,8 +126,9 @@ static inline void sun6i_spi_drain_fifo(struct sun6i_spi *sspi, int len)
}
}
-static inline void sun6i_spi_fill_fifo(struct sun6i_spi *sspi, int len)
+static inline void sun6i_spi_fill_fifo(struct sun6i_spi *sspi)
{
+ int len = sspi->fifo_depth;
u8 byte;
if (len > sspi->len)
@@ -270,7 +272,7 @@ static int sun6i_spi_transfer_one(struct spi_master *master,
SUN6I_BURST_CTL_CNT_STC(tx_len));
/* Fill the TX FIFO */
- sun6i_spi_fill_fifo(sspi, sspi->fifo_depth);
+ sun6i_spi_fill_fifo(sspi);
/* Enable the interrupts */
sun6i_spi_write(sspi, SUN6I_INT_CTL_REG, SUN6I_INT_CTL_TC);
@@ -293,7 +295,7 @@ static int sun6i_spi_transfer_one(struct spi_master *master,
goto out;
}
- sun6i_spi_drain_fifo(sspi, sspi->fifo_depth);
+ sun6i_spi_drain_fifo(sspi);
out:
sun6i_spi_write(sspi, SUN6I_INT_CTL_REG, 0);
--
2.9.3
H3 has two SPI controllers. The size of the buffer is 64 * 8.
(8 bit transfer by 64 entry FIFO)
A31 has four controllers. The size of the buffer is 128 * 8.
(8 bit transfer by 128 entry FIFO)
Register maps are sharable, so sun6i SPI driver is reusable with
device configuration.
Use the variable, 'fifo_depth' instead of fixed value to support both SPI
controllers.
Cc: Mark Brown <[email protected]>
Cc: Maxime Ripard <[email protected]>
Cc: Chen-Yu Tsai <[email protected]>
Signed-off-by: Milo Kim <[email protected]>
---
drivers/spi/Kconfig | 4 ++--
drivers/spi/spi-sun6i.c | 38 +++++++++++++++++++++++++++-----------
2 files changed, 29 insertions(+), 13 deletions(-)
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index b799547..06d0845 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -610,11 +610,11 @@ config SPI_SUN4I
SPI driver for Allwinner sun4i, sun5i and sun7i SoCs
config SPI_SUN6I
- tristate "Allwinner A31 SPI controller"
+ tristate "Allwinner A31/H3 SPI controller"
depends on ARCH_SUNXI || COMPILE_TEST
depends on RESET_CONTROLLER
help
- This enables using the SPI controller on the Allwinner A31 SoCs.
+ This enables using the SPI controller on the Allwinner A31/H3 SoCs.
config SPI_MXS
tristate "Freescale MXS SPI controller"
diff --git a/drivers/spi/spi-sun6i.c b/drivers/spi/spi-sun6i.c
index 9918a57..91235b2 100644
--- a/drivers/spi/spi-sun6i.c
+++ b/drivers/spi/spi-sun6i.c
@@ -17,6 +17,7 @@
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/module.h>
+#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/reset.h>
@@ -24,6 +25,7 @@
#include <linux/spi/spi.h>
#define SUN6I_FIFO_DEPTH 128
+#define SUN8I_FIFO_DEPTH 64
#define SUN6I_GBL_CTL_REG 0x04
#define SUN6I_GBL_CTL_BUS_ENABLE BIT(0)
@@ -90,6 +92,7 @@ struct sun6i_spi {
const u8 *tx_buf;
u8 *rx_buf;
int len;
+ int fifo_depth;
};
static inline u32 sun6i_spi_read(struct sun6i_spi *sspi, u32 reg)
@@ -155,7 +158,9 @@ static void sun6i_spi_set_cs(struct spi_device *spi, bool enable)
static size_t sun6i_spi_max_transfer_size(struct spi_device *spi)
{
- return SUN6I_FIFO_DEPTH - 1;
+ struct sun6i_spi *sspi = spi_master_get_devdata(spi->master);
+
+ return sspi->fifo_depth - 1;
}
static int sun6i_spi_transfer_one(struct spi_master *master,
@@ -170,7 +175,7 @@ static int sun6i_spi_transfer_one(struct spi_master *master,
u32 reg;
/* We don't support transfer larger than the FIFO */
- if (tfr->len > SUN6I_FIFO_DEPTH)
+ if (tfr->len > sspi->fifo_depth)
return -EINVAL;
reinit_completion(&sspi->done);
@@ -265,7 +270,7 @@ static int sun6i_spi_transfer_one(struct spi_master *master,
SUN6I_BURST_CTL_CNT_STC(tx_len));
/* Fill the TX FIFO */
- sun6i_spi_fill_fifo(sspi, SUN6I_FIFO_DEPTH);
+ sun6i_spi_fill_fifo(sspi, sspi->fifo_depth);
/* Enable the interrupts */
sun6i_spi_write(sspi, SUN6I_INT_CTL_REG, SUN6I_INT_CTL_TC);
@@ -288,7 +293,7 @@ static int sun6i_spi_transfer_one(struct spi_master *master,
goto out;
}
- sun6i_spi_drain_fifo(sspi, SUN6I_FIFO_DEPTH);
+ sun6i_spi_drain_fifo(sspi, sspi->fifo_depth);
out:
sun6i_spi_write(sspi, SUN6I_INT_CTL_REG, 0);
@@ -360,8 +365,16 @@ static int sun6i_spi_runtime_suspend(struct device *dev)
return 0;
}
+static const struct of_device_id sun6i_spi_match[] = {
+ { .compatible = "allwinner,sun6i-a31-spi", .data = (int *)SUN6I_FIFO_DEPTH },
+ { .compatible = "allwinner,sun8i-h3-spi", .data = (int *)SUN8I_FIFO_DEPTH },
+ {}
+};
+MODULE_DEVICE_TABLE(of, sun6i_spi_match);
+
static int sun6i_spi_probe(struct platform_device *pdev)
{
+ const struct of_device_id *id;
struct spi_master *master;
struct sun6i_spi *sspi;
struct resource *res;
@@ -398,6 +411,15 @@ static int sun6i_spi_probe(struct platform_device *pdev)
}
sspi->master = master;
+
+ id = of_match_device(sun6i_spi_match, &pdev->dev);
+ if (!id) {
+ dev_err(&pdev->dev, "Cannot get device ID\n");
+ goto err_free_master;
+ }
+
+ sspi->fifo_depth = (int)id->data;
+
master->max_speed_hz = 100 * 1000 * 1000;
master->min_speed_hz = 3 * 1000;
master->set_cs = sun6i_spi_set_cs;
@@ -469,12 +491,6 @@ static int sun6i_spi_remove(struct platform_device *pdev)
return 0;
}
-static const struct of_device_id sun6i_spi_match[] = {
- { .compatible = "allwinner,sun6i-a31-spi", },
- {}
-};
-MODULE_DEVICE_TABLE(of, sun6i_spi_match);
-
static const struct dev_pm_ops sun6i_spi_pm_ops = {
.runtime_resume = sun6i_spi_runtime_resume,
.runtime_suspend = sun6i_spi_runtime_suspend,
@@ -493,5 +509,5 @@ module_platform_driver(sun6i_spi_driver);
MODULE_AUTHOR("Pan Nan <[email protected]>");
MODULE_AUTHOR("Maxime Ripard <[email protected]>");
-MODULE_DESCRIPTION("Allwinner A31 SPI controller driver");
+MODULE_DESCRIPTION("Allwinner A31/H3 SPI controller driver");
MODULE_LICENSE("GPL");
--
2.9.3
On Wed, Oct 19, 2016 at 11:02:32PM +0900, Milo Kim wrote:
> H3 SPI has same architecture as A31 except FIFO capacity.
> To configure the buffer size separately, compatible property should be
> different. Optional DMA specifiers and example are added.
>
> Cc: Mark Brown <[email protected]>
> Cc: Rob Herring <[email protected]>
> Cc: Maxime Ripard <[email protected]>
> Cc: Chen-Yu Tsai <[email protected]>
> Signed-off-by: Milo Kim <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
Hi,
On Wed, Oct 19, 2016 at 11:02:33PM +0900, Milo Kim wrote:
> H3 has two SPI controllers. The size of the buffer is 64 * 8.
> (8 bit transfer by 64 entry FIFO)
> A31 has four controllers. The size of the buffer is 128 * 8.
> (8 bit transfer by 128 entry FIFO)
>
> Register maps are sharable, so sun6i SPI driver is reusable with
> device configuration.
>
> Use the variable, 'fifo_depth' instead of fixed value to support both SPI
> controllers.
>
> Cc: Mark Brown <[email protected]>
> Cc: Maxime Ripard <[email protected]>
> Cc: Chen-Yu Tsai <[email protected]>
> Signed-off-by: Milo Kim <[email protected]>
> ---
> drivers/spi/Kconfig | 4 ++--
> drivers/spi/spi-sun6i.c | 38 +++++++++++++++++++++++++++-----------
> 2 files changed, 29 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
> index b799547..06d0845 100644
> --- a/drivers/spi/Kconfig
> +++ b/drivers/spi/Kconfig
> @@ -610,11 +610,11 @@ config SPI_SUN4I
> SPI driver for Allwinner sun4i, sun5i and sun7i SoCs
>
> config SPI_SUN6I
> - tristate "Allwinner A31 SPI controller"
> + tristate "Allwinner A31/H3 SPI controller"
> depends on ARCH_SUNXI || COMPILE_TEST
> depends on RESET_CONTROLLER
> help
> - This enables using the SPI controller on the Allwinner A31 SoCs.
> + This enables using the SPI controller on the Allwinner A31/H3 SoCs.
Usually, we don't care about maintaining this. This is just going to
be a list that grows all the time, and is wrong most of the time.
> config SPI_MXS
> tristate "Freescale MXS SPI controller"
> diff --git a/drivers/spi/spi-sun6i.c b/drivers/spi/spi-sun6i.c
> index 9918a57..91235b2 100644
> --- a/drivers/spi/spi-sun6i.c
> +++ b/drivers/spi/spi-sun6i.c
> @@ -17,6 +17,7 @@
> #include <linux/interrupt.h>
> #include <linux/io.h>
> #include <linux/module.h>
> +#include <linux/of_device.h>
> #include <linux/platform_device.h>
> #include <linux/pm_runtime.h>
> #include <linux/reset.h>
> @@ -24,6 +25,7 @@
> #include <linux/spi/spi.h>
>
> #define SUN6I_FIFO_DEPTH 128
> +#define SUN8I_FIFO_DEPTH 64
>
> #define SUN6I_GBL_CTL_REG 0x04
> #define SUN6I_GBL_CTL_BUS_ENABLE BIT(0)
> @@ -90,6 +92,7 @@ struct sun6i_spi {
> const u8 *tx_buf;
> u8 *rx_buf;
> int len;
> + int fifo_depth;
> };
>
> static inline u32 sun6i_spi_read(struct sun6i_spi *sspi, u32 reg)
> @@ -155,7 +158,9 @@ static void sun6i_spi_set_cs(struct spi_device *spi, bool enable)
>
> static size_t sun6i_spi_max_transfer_size(struct spi_device *spi)
> {
> - return SUN6I_FIFO_DEPTH - 1;
> + struct sun6i_spi *sspi = spi_master_get_devdata(spi->master);
> +
> + return sspi->fifo_depth - 1;
> }
>
> static int sun6i_spi_transfer_one(struct spi_master *master,
> @@ -170,7 +175,7 @@ static int sun6i_spi_transfer_one(struct spi_master *master,
> u32 reg;
>
> /* We don't support transfer larger than the FIFO */
> - if (tfr->len > SUN6I_FIFO_DEPTH)
> + if (tfr->len > sspi->fifo_depth)
> return -EINVAL;
>
> reinit_completion(&sspi->done);
> @@ -265,7 +270,7 @@ static int sun6i_spi_transfer_one(struct spi_master *master,
> SUN6I_BURST_CTL_CNT_STC(tx_len));
>
> /* Fill the TX FIFO */
> - sun6i_spi_fill_fifo(sspi, SUN6I_FIFO_DEPTH);
> + sun6i_spi_fill_fifo(sspi, sspi->fifo_depth);
>
> /* Enable the interrupts */
> sun6i_spi_write(sspi, SUN6I_INT_CTL_REG, SUN6I_INT_CTL_TC);
> @@ -288,7 +293,7 @@ static int sun6i_spi_transfer_one(struct spi_master *master,
> goto out;
> }
>
> - sun6i_spi_drain_fifo(sspi, SUN6I_FIFO_DEPTH);
> + sun6i_spi_drain_fifo(sspi, sspi->fifo_depth);
>
> out:
> sun6i_spi_write(sspi, SUN6I_INT_CTL_REG, 0);
> @@ -360,8 +365,16 @@ static int sun6i_spi_runtime_suspend(struct device *dev)
> return 0;
> }
>
> +static const struct of_device_id sun6i_spi_match[] = {
> + { .compatible = "allwinner,sun6i-a31-spi", .data = (int *)SUN6I_FIFO_DEPTH },
> + { .compatible = "allwinner,sun8i-h3-spi", .data = (int *)SUN8I_FIFO_DEPTH },
> + {}
> +};
> +MODULE_DEVICE_TABLE(of, sun6i_spi_match);
> +
> static int sun6i_spi_probe(struct platform_device *pdev)
> {
> + const struct of_device_id *id;
> struct spi_master *master;
> struct sun6i_spi *sspi;
> struct resource *res;
> @@ -398,6 +411,15 @@ static int sun6i_spi_probe(struct platform_device *pdev)
> }
>
> sspi->master = master;
> +
> + id = of_match_device(sun6i_spi_match, &pdev->dev);
> + if (!id) {
> + dev_err(&pdev->dev, "Cannot get device ID\n");
> + goto err_free_master;
> + }
> +
> + sspi->fifo_depth = (int)id->data;
> +
> master->max_speed_hz = 100 * 1000 * 1000;
> master->min_speed_hz = 3 * 1000;
> master->set_cs = sun6i_spi_set_cs;
> @@ -469,12 +491,6 @@ static int sun6i_spi_remove(struct platform_device *pdev)
> return 0;
> }
>
> -static const struct of_device_id sun6i_spi_match[] = {
> - { .compatible = "allwinner,sun6i-a31-spi", },
> - {}
> -};
> -MODULE_DEVICE_TABLE(of, sun6i_spi_match);
> -
> static const struct dev_pm_ops sun6i_spi_pm_ops = {
> .runtime_resume = sun6i_spi_runtime_resume,
> .runtime_suspend = sun6i_spi_runtime_suspend,
> @@ -493,5 +509,5 @@ module_platform_driver(sun6i_spi_driver);
>
> MODULE_AUTHOR("Pan Nan <[email protected]>");
> MODULE_AUTHOR("Maxime Ripard <[email protected]>");
> -MODULE_DESCRIPTION("Allwinner A31 SPI controller driver");
> +MODULE_DESCRIPTION("Allwinner A31/H3 SPI controller driver");
Ditto.
It looks good otherwise.
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
On Wed, Oct 19, 2016 at 10:02 PM, Milo Kim <[email protected]> wrote:
> H3 has two SPI controllers. The size of the buffer is 64 * 8.
> (8 bit transfer by 64 entry FIFO)
> A31 has four controllers. The size of the buffer is 128 * 8.
> (8 bit transfer by 128 entry FIFO)
>
> Register maps are sharable, so sun6i SPI driver is reusable with
> device configuration.
>
> Use the variable, 'fifo_depth' instead of fixed value to support both SPI
> controllers.
>
> Cc: Mark Brown <[email protected]>
> Cc: Maxime Ripard <[email protected]>
> Cc: Chen-Yu Tsai <[email protected]>
> Signed-off-by: Milo Kim <[email protected]>
> ---
> drivers/spi/Kconfig | 4 ++--
> drivers/spi/spi-sun6i.c | 38 +++++++++++++++++++++++++++-----------
> 2 files changed, 29 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
> index b799547..06d0845 100644
> --- a/drivers/spi/Kconfig
> +++ b/drivers/spi/Kconfig
> @@ -610,11 +610,11 @@ config SPI_SUN4I
> SPI driver for Allwinner sun4i, sun5i and sun7i SoCs
>
> config SPI_SUN6I
> - tristate "Allwinner A31 SPI controller"
> + tristate "Allwinner A31/H3 SPI controller"
> depends on ARCH_SUNXI || COMPILE_TEST
> depends on RESET_CONTROLLER
> help
> - This enables using the SPI controller on the Allwinner A31 SoCs.
> + This enables using the SPI controller on the Allwinner A31/H3 SoCs.
>
> config SPI_MXS
> tristate "Freescale MXS SPI controller"
> diff --git a/drivers/spi/spi-sun6i.c b/drivers/spi/spi-sun6i.c
> index 9918a57..91235b2 100644
> --- a/drivers/spi/spi-sun6i.c
> +++ b/drivers/spi/spi-sun6i.c
> @@ -17,6 +17,7 @@
> #include <linux/interrupt.h>
> #include <linux/io.h>
> #include <linux/module.h>
> +#include <linux/of_device.h>
> #include <linux/platform_device.h>
> #include <linux/pm_runtime.h>
> #include <linux/reset.h>
> @@ -24,6 +25,7 @@
> #include <linux/spi/spi.h>
>
> #define SUN6I_FIFO_DEPTH 128
> +#define SUN8I_FIFO_DEPTH 64
>
> #define SUN6I_GBL_CTL_REG 0x04
> #define SUN6I_GBL_CTL_BUS_ENABLE BIT(0)
> @@ -90,6 +92,7 @@ struct sun6i_spi {
> const u8 *tx_buf;
> u8 *rx_buf;
> int len;
> + int fifo_depth;
> };
>
> static inline u32 sun6i_spi_read(struct sun6i_spi *sspi, u32 reg)
> @@ -155,7 +158,9 @@ static void sun6i_spi_set_cs(struct spi_device *spi, bool enable)
>
> static size_t sun6i_spi_max_transfer_size(struct spi_device *spi)
> {
> - return SUN6I_FIFO_DEPTH - 1;
> + struct sun6i_spi *sspi = spi_master_get_devdata(spi->master);
> +
> + return sspi->fifo_depth - 1;
> }
>
> static int sun6i_spi_transfer_one(struct spi_master *master,
> @@ -170,7 +175,7 @@ static int sun6i_spi_transfer_one(struct spi_master *master,
> u32 reg;
>
> /* We don't support transfer larger than the FIFO */
> - if (tfr->len > SUN6I_FIFO_DEPTH)
> + if (tfr->len > sspi->fifo_depth)
> return -EINVAL;
>
> reinit_completion(&sspi->done);
> @@ -265,7 +270,7 @@ static int sun6i_spi_transfer_one(struct spi_master *master,
> SUN6I_BURST_CTL_CNT_STC(tx_len));
>
> /* Fill the TX FIFO */
> - sun6i_spi_fill_fifo(sspi, SUN6I_FIFO_DEPTH);
> + sun6i_spi_fill_fifo(sspi, sspi->fifo_depth);
>
> /* Enable the interrupts */
> sun6i_spi_write(sspi, SUN6I_INT_CTL_REG, SUN6I_INT_CTL_TC);
> @@ -288,7 +293,7 @@ static int sun6i_spi_transfer_one(struct spi_master *master,
> goto out;
> }
>
> - sun6i_spi_drain_fifo(sspi, SUN6I_FIFO_DEPTH);
> + sun6i_spi_drain_fifo(sspi, sspi->fifo_depth);
>
> out:
> sun6i_spi_write(sspi, SUN6I_INT_CTL_REG, 0);
> @@ -360,8 +365,16 @@ static int sun6i_spi_runtime_suspend(struct device *dev)
> return 0;
> }
>
> +static const struct of_device_id sun6i_spi_match[] = {
> + { .compatible = "allwinner,sun6i-a31-spi", .data = (int *)SUN6I_FIFO_DEPTH },
> + { .compatible = "allwinner,sun8i-h3-spi", .data = (int *)SUN8I_FIFO_DEPTH },
> + {}
> +};
> +MODULE_DEVICE_TABLE(of, sun6i_spi_match);
> +
> static int sun6i_spi_probe(struct platform_device *pdev)
> {
> + const struct of_device_id *id;
> struct spi_master *master;
> struct sun6i_spi *sspi;
> struct resource *res;
> @@ -398,6 +411,15 @@ static int sun6i_spi_probe(struct platform_device *pdev)
> }
>
> sspi->master = master;
> +
> + id = of_match_device(sun6i_spi_match, &pdev->dev);
Use of_device_get_match_data, then you don't even have to move sun6i_spi_match
above this function.
ChenYu
> + if (!id) {
> + dev_err(&pdev->dev, "Cannot get device ID\n");
> + goto err_free_master;
> + }
> +
> + sspi->fifo_depth = (int)id->data;
> +
> master->max_speed_hz = 100 * 1000 * 1000;
> master->min_speed_hz = 3 * 1000;
> master->set_cs = sun6i_spi_set_cs;
> @@ -469,12 +491,6 @@ static int sun6i_spi_remove(struct platform_device *pdev)
> return 0;
> }
>
> -static const struct of_device_id sun6i_spi_match[] = {
> - { .compatible = "allwinner,sun6i-a31-spi", },
> - {}
> -};
> -MODULE_DEVICE_TABLE(of, sun6i_spi_match);
> -
> static const struct dev_pm_ops sun6i_spi_pm_ops = {
> .runtime_resume = sun6i_spi_runtime_resume,
> .runtime_suspend = sun6i_spi_runtime_suspend,
> @@ -493,5 +509,5 @@ module_platform_driver(sun6i_spi_driver);
>
> MODULE_AUTHOR("Pan Nan <[email protected]>");
> MODULE_AUTHOR("Maxime Ripard <[email protected]>");
> -MODULE_DESCRIPTION("Allwinner A31 SPI controller driver");
> +MODULE_DESCRIPTION("Allwinner A31/H3 SPI controller driver");
> MODULE_LICENSE("GPL");
> --
> 2.9.3
>
On Wed, Oct 19, 2016 at 11:02:34PM +0900, Milo Kim wrote:
> The argument can be removed because the driver private data has it.
>
> Cc: Mark Brown <[email protected]>
> Cc: Maxime Ripard <[email protected]>
> Cc: Chen-Yu Tsai <[email protected]>
> Signed-off-by: Milo Kim <[email protected]>
> ---
> drivers/spi/spi-sun6i.c | 10 ++++++----
> 1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/spi/spi-sun6i.c b/drivers/spi/spi-sun6i.c
> index 91235b2..c638f5d 100644
> --- a/drivers/spi/spi-sun6i.c
> +++ b/drivers/spi/spi-sun6i.c
> @@ -105,8 +105,9 @@ static inline void sun6i_spi_write(struct sun6i_spi *sspi, u32 reg, u32 value)
> writel(value, sspi->base_addr + reg);
> }
>
> -static inline void sun6i_spi_drain_fifo(struct sun6i_spi *sspi, int len)
> +static inline void sun6i_spi_drain_fifo(struct sun6i_spi *sspi)
> {
> + int len = sspi->fifo_depth;
> u32 reg, cnt;
> u8 byte;
I'm not so sure about this one. This function was initially to drain
any given number of bytes, which might be of interest at some point.
Removing that argument also remove that ability... Any particular
reason you want to change it?
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
On 10/21/2016 12:53 AM, Chen-Yu Tsai wrote:
> Use of_device_get_match_data, then you don't even have to move sun6i_spi_match
> above this function.
Oh, good. Thanks for introducing this helper.
Best regards,
Milo
On 10/21/2016 12:56 AM, Maxime Ripard wrote:
>> -static inline void sun6i_spi_drain_fifo(struct sun6i_spi *sspi, int len)
>> > +static inline void sun6i_spi_drain_fifo(struct sun6i_spi *sspi)
>> > {
>> > + int len = sspi->fifo_depth;
>> > u32 reg, cnt;
>> > u8 byte;
> I'm not so sure about this one. This function was initially to drain
> any given number of bytes, which might be of interest at some point.
>
> Removing that argument also remove that ability... Any particular
> reason you want to change it?
I just wanted to remove duplicate variable but I agree with you. Let me
drop this in the next patch-set. Thanks for your comments.
Best regards,
Milo
The patch
spi: sun6i: Add binding for Allwinner H3 SPI controller
has been applied to the spi tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
>From 8ea7ce9cc6dec26db22a97f00523a4bfd3a97d72 Mon Sep 17 00:00:00 2001
From: Milo Kim <[email protected]>
Date: Fri, 28 Oct 2016 15:54:11 +0900
Subject: [PATCH] spi: sun6i: Add binding for Allwinner H3 SPI controller
H3 SPI has same architecture as A31 except FIFO capacity.
To configure the buffer size separately, compatible property should be
different. Optional DMA specifiers and example are added.
Signed-off-by: Milo Kim <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
Acked-by: Rob Herring <[email protected]>
Signed-off-by: Mark Brown <[email protected]>
---
.../devicetree/bindings/spi/spi-sun6i.txt | 25 ++++++++++++++++++++--
1 file changed, 23 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/spi/spi-sun6i.txt b/Documentation/devicetree/bindings/spi/spi-sun6i.txt
index 21de73db6a05..2ec99b86b622 100644
--- a/Documentation/devicetree/bindings/spi/spi-sun6i.txt
+++ b/Documentation/devicetree/bindings/spi/spi-sun6i.txt
@@ -1,7 +1,7 @@
-Allwinner A31 SPI controller
+Allwinner A31/H3 SPI controller
Required properties:
-- compatible: Should be "allwinner,sun6i-a31-spi".
+- compatible: Should be "allwinner,sun6i-a31-spi" or "allwinner,sun8i-h3-spi".
- reg: Should contain register location and length.
- interrupts: Should contain interrupt.
- clocks: phandle to the clocks feeding the SPI controller. Two are
@@ -12,6 +12,11 @@ Required properties:
- resets: phandle to the reset controller asserting this device in
reset
+Optional properties:
+- dmas: DMA specifiers for rx and tx dma. See the DMA client binding,
+ Documentation/devicetree/bindings/dma/dma.txt
+- dma-names: DMA request names should include "rx" and "tx" if present.
+
Example:
spi1: spi@01c69000 {
@@ -22,3 +27,19 @@ spi1: spi@01c69000 {
clock-names = "ahb", "mod";
resets = <&ahb1_rst 21>;
};
+
+spi0: spi@01c68000 {
+ compatible = "allwinner,sun8i-h3-spi";
+ reg = <0x01c68000 0x1000>;
+ interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
+ clock-names = "ahb", "mod";
+ dmas = <&dma 23>, <&dma 23>;
+ dma-names = "rx", "tx";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_pins>;
+ resets = <&ccu RST_BUS_SPI0>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+};
--
2.10.1