This GPIO controller is present on a number of Broadcom switch ASICs
with integrated SoCs. It is similar to the nsp-gpio and iproc-gpio
blocks but different enough to require a separate driver.
Signed-off-by: Chris Packham <[email protected]>
---
Notes:
Changes in v3:
- incorporate review comments from Rob and Bart
Changes in v2:
- Document as DT schema
- Include ngpios, #gpio-cells and gpio-controller properties
.../bindings/gpio/brcm,xgs-iproc.yaml | 70 +++++++++++++++++++
1 file changed, 70 insertions(+)
create mode 100644 Documentation/devicetree/bindings/gpio/brcm,xgs-iproc.yaml
diff --git a/Documentation/devicetree/bindings/gpio/brcm,xgs-iproc.yaml b/Documentation/devicetree/bindings/gpio/brcm,xgs-iproc.yaml
new file mode 100644
index 000000000000..ec1fd3a64aa2
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/brcm,xgs-iproc.yaml
@@ -0,0 +1,70 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/gpio/brcm,xgs-iproc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Broadcom XGS iProc GPIO controller
+
+maintainers:
+ - Chris Packham <[email protected]>
+
+description: |
+ This controller is the Chip Common A GPIO present on a number of Broadcom
+ switch ASICs with integrated SoCs.
+
+properties:
+ compatible:
+ const: brcm,iproc-gpio-cca
+
+ reg:
+ items:
+ - description: the I/O address containing the GPIO controller
+ registers.
+ - description: the I/O address containing the Chip Common A interrupt
+ registers.
+
+ gpio-controller: true
+
+ '#gpio-cells':
+ const: 2
+
+ ngpios:
+ minimum: 0
+ maximum: 32
+
+ interrupt-controller: true
+
+ '#interrupt-cells':
+ const: 2
+
+ interrupts:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - "#gpio-cells"
+ - gpio-controller
+
+dependencies:
+ interrupt-controller: [ interrupts ]
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ gpio@18000060 {
+ compatible = "brcm,iproc-gpio-cca";
+ #gpio-cells = <2>;
+ reg = <0x18000060 0x50>,
+ <0x18000000 0x50>;
+ ngpios = <12>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+
+...
--
2.23.0
Hi Chris,
On 2019-10-23 5:48 p.m., Chris Packham wrote:
> This GPIO controller is present on a number of Broadcom switch ASICs
> with integrated SoCs. It is similar to the nsp-gpio and iproc-gpio
> blocks but different enough to require a separate driver.
>
> Signed-off-by: Chris Packham <[email protected]>
> ---
>
> Notes:
> Changes in v3:
> - incorporate review comments from Rob and Bart
>
> Changes in v2:
> - Document as DT schema
> - Include ngpios, #gpio-cells and gpio-controller properties
>
> .../bindings/gpio/brcm,xgs-iproc.yaml | 70 +++++++++++++++++++
> 1 file changed, 70 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/gpio/brcm,xgs-iproc.yaml
>
> diff --git a/Documentation/devicetree/bindings/gpio/brcm,xgs-iproc.yaml b/Documentation/devicetree/bindings/gpio/brcm,xgs-iproc.yaml
> new file mode 100644
> index 000000000000..ec1fd3a64aa2
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/gpio/brcm,xgs-iproc.yaml
This doc needs to have gpio in the name to make all other gpio binding
documents.
ie.
brcm,xgs-iproc-gpio.yaml.
> @@ -0,0 +1,70 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/gpio/brcm,xgs-iproc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Broadcom XGS iProc GPIO controller
> +
> +maintainers:
> + - Chris Packham <[email protected]>
> +
> +description: |
> + This controller is the Chip Common A GPIO present on a number of Broadcom
> + switch ASICs with integrated SoCs.
> +
> +properties:
> + compatible:
> + const: brcm,iproc-gpio-cca
> +
> + reg:
> + items:
> + - description: the I/O address containing the GPIO controller
> + registers.
> + - description: the I/O address containing the Chip Common A interrupt
> + registers.
> +
> + gpio-controller: true
> +
> + '#gpio-cells':
> + const: 2
> +
> + ngpios:
> + minimum: 0
> + maximum: 32
> +
> + interrupt-controller: true
> +
> + '#interrupt-cells':
> + const: 2
> +
> + interrupts:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> + - "#gpio-cells"
> + - gpio-controller
> +
> +dependencies:
> + interrupt-controller: [ interrupts ]
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/irq.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + gpio@18000060 {
> + compatible = "brcm,iproc-gpio-cca";
> + #gpio-cells = <2>;
> + reg = <0x18000060 0x50>,
> + <0x18000000 0x50>;
> + ngpios = <12>;
> + gpio-controller;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +
> +
> +...