2020-10-04 21:34:29

by Bert Vermeulen

Subject: [PATCH v2] mtd: spi-nor: Fix address width on flash chips > 16MB

If a flash chip has more than 16MB capacity but its BFPT reports
BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3.

The check in spi_nor_set_addr_width() doesn't catch it because addr_width
did get set. This fixes that check.

Signed-off-by: Bert Vermeulen <[email protected]>
---
drivers/mtd/spi-nor/core.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index 0369d98b2d12..a2c35ad9645c 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -3009,13 +3009,15 @@ static int spi_nor_set_addr_width(struct spi_nor *nor)
/* already configured from SFDP */
} else if (nor->info->addr_width) {
nor->addr_width = nor->info->addr_width;
- } else if (nor->mtd.size > 0x1000000) {
- /* enable 4-byte addressing if the device exceeds 16MiB */
- nor->addr_width = 4;
} else {
nor->addr_width = 3;
}

+ if (nor->addr_width == 3 && nor->mtd.size > 0x1000000) {
+ /* enable 4-byte addressing if the device exceeds 16MiB */
+ nor->addr_width = 4;
+ }
+
if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) {
dev_dbg(nor->dev, "address width is too large: %u\n",
nor->addr_width);
--
2.17.1

2020-10-06 11:46:57

by Tudor Ambarus

Subject: Re: [PATCH v2] mtd: spi-nor: Fix address width on flash chips > 16MB

On 10/5/20 12:32 AM, Bert Vermeulen wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> If a flash chip has more than 16MB capacity but its BFPT reports
> BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3.
>
> The check in spi_nor_set_addr_width() doesn't catch it because addr_width
> did get set. This fixes that check.
>
the problem was uncovered with commit f9acd7fa80be, so maybe a Fixes tag
will help.

Fixes: f9acd7fa80be ("mtd: spi-nor: sfdp: default to addr_width of 3 for configurable widths")
> Signed-off-by: Bert Vermeulen <[email protected]>

We can have this automatically in the stable tree by adding the tag:

Cc: [email protected]

Reviewed-by: Tudor Ambarus <[email protected]>

> ---
> drivers/mtd/spi-nor/core.c | 8 +++++---
> 1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
> index 0369d98b2d12..a2c35ad9645c 100644
> --- a/drivers/mtd/spi-nor/core.c
> +++ b/drivers/mtd/spi-nor/core.c
> @@ -3009,13 +3009,15 @@ static int spi_nor_set_addr_width(struct spi_nor *nor)
> /* already configured from SFDP */
> } else if (nor->info->addr_width) {
> nor->addr_width = nor->info->addr_width;
> - } else if (nor->mtd.size > 0x1000000) {
> - /* enable 4-byte addressing if the device exceeds 16MiB */
> - nor->addr_width = 4;
> } else {
> nor->addr_width = 3;
> }
>
> + if (nor->addr_width == 3 && nor->mtd.size > 0x1000000) {
> + /* enable 4-byte addressing if the device exceeds 16MiB */
> + nor->addr_width = 4;
> + }
> +
> if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) {
> dev_dbg(nor->dev, "address width is too large: %u\n",
> nor->addr_width);
> --
> 2.17.1
>

2020-10-07 02:09:35

by Joel Stanley

Subject: Re: [PATCH v2] mtd: spi-nor: Fix address width on flash chips > 16MB

On Sun, 4 Oct 2020 at 21:33, Bert Vermeulen <[email protected]> wrote:
>
> If a flash chip has more than 16MB capacity but its BFPT reports
> BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3.
>
> The check in spi_nor_set_addr_width() doesn't catch it because addr_width
> did get set. This fixes that check.
>
> Signed-off-by: Bert Vermeulen <[email protected]>

After replying to the other thread, I just saw this one.

Reviewed-by: Joel Stanley <[email protected]>
Tested-by: Joel Stanley <[email protected]>

Thanks Bert!

Cheers,

Joel

> ---
> drivers/mtd/spi-nor/core.c | 8 +++++---
> 1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
> index 0369d98b2d12..a2c35ad9645c 100644
> --- a/drivers/mtd/spi-nor/core.c
> +++ b/drivers/mtd/spi-nor/core.c
> @@ -3009,13 +3009,15 @@ static int spi_nor_set_addr_width(struct spi_nor *nor)
> /* already configured from SFDP */
> } else if (nor->info->addr_width) {
> nor->addr_width = nor->info->addr_width;
> - } else if (nor->mtd.size > 0x1000000) {
> - /* enable 4-byte addressing if the device exceeds 16MiB */
> - nor->addr_width = 4;
> } else {
> nor->addr_width = 3;
> }
>
> + if (nor->addr_width == 3 && nor->mtd.size > 0x1000000) {
> + /* enable 4-byte addressing if the device exceeds 16MiB */
> + nor->addr_width = 4;
> + }
> +
> if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) {
> dev_dbg(nor->dev, "address width is too large: %u\n",
> nor->addr_width);
> --
> 2.17.1
>

2020-10-07 06:35:52

by Cédric Le Goater

Subject: Re: [PATCH v2] mtd: spi-nor: Fix address width on flash chips > 16MB

On 10/7/20 3:51 AM, Joel Stanley wrote:
> On Sun, 4 Oct 2020 at 21:33, Bert Vermeulen <[email protected]> wrote:
>>
>> If a flash chip has more than 16MB capacity but its BFPT reports
>> BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3.
>>
>> The check in spi_nor_set_addr_width() doesn't catch it because addr_width
>> did get set. This fixes that check.
>>
>> Signed-off-by: Bert Vermeulen <[email protected]>
>
> After replying to the other thread, I just saw this one.
>
> Reviewed-by: Joel Stanley <[email protected]>
> Tested-by: Joel Stanley <[email protected]>
>
> Thanks Bert!


Yes. I was starting to add bfpt-fixups for all chips we use on Aspeed
based system.

Reviewed-by: Cédric Le Goater <[email protected]>
Tested-by: Cédric Le Goater <[email protected]>

Thanks,

C.



> Cheers,
>
> Joel
>
>> ---
>> drivers/mtd/spi-nor/core.c | 8 +++++---
>> 1 file changed, 5 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
>> index 0369d98b2d12..a2c35ad9645c 100644
>> --- a/drivers/mtd/spi-nor/core.c
>> +++ b/drivers/mtd/spi-nor/core.c
>> @@ -3009,13 +3009,15 @@ static int spi_nor_set_addr_width(struct spi_nor *nor)
>> /* already configured from SFDP */
>> } else if (nor->info->addr_width) {
>> nor->addr_width = nor->info->addr_width;
>> - } else if (nor->mtd.size > 0x1000000) {
>> - /* enable 4-byte addressing if the device exceeds 16MiB */
>> - nor->addr_width = 4;
>> } else {
>> nor->addr_width = 3;
>> }
>>
>> + if (nor->addr_width == 3 && nor->mtd.size > 0x1000000) {
>> + /* enable 4-byte addressing if the device exceeds 16MiB */
>> + nor->addr_width = 4;
>> + }
>> +
>> if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) {
>> dev_dbg(nor->dev, "address width is too large: %u\n",
>> nor->addr_width);
>> --
>> 2.17.1
>>