2023-01-21 11:30:07

by Johan Jonker

[permalink] [raw]
Subject: [PATCH v2 1/8] dt-bindings: gpio: rockchip,gpio-bank: add compatible string per SoC

Currently all Rockchip gpio nodes have the same compatible.
Compatible strings should be SoC related.

Signed-off-by: Johan Jonker <[email protected]>
---
.../bindings/gpio/rockchip,gpio-bank.yaml | 26 ++++++++++++++++---
1 file changed, 22 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
index affd823c8..a604c3638 100644
--- a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
+++ b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
@@ -11,9 +11,27 @@ maintainers:

properties:
compatible:
- enum:
- - rockchip,gpio-bank
- - rockchip,rk3188-gpio-bank0
+ oneOf:
+ - const: rockchip,gpio-bank
+ - const: rockchip,rk3188-gpio-bank0
+ - items:
+ - enum:
+ - rockchip,px30-gpio-bank
+ - rockchip,rk3036-gpio-bank
+ - rockchip,rk3066a-gpio-bank
+ - rockchip,rk3128-gpio-bank
+ - rockchip,rk3188-gpio-bank
+ - rockchip,rk3228-gpio-bank
+ - rockchip,rk3288-gpio-bank
+ - rockchip,rk3328-gpio-bank
+ - rockchip,rk3308-gpio-bank
+ - rockchip,rk3368-gpio-bank
+ - rockchip,rk3399-gpio-bank
+ - rockchip,rk3568-gpio-bank
+ - rockchip,rk3588-gpio-bank
+ - rockchip,rv1108-gpio-bank
+ - rockchip,rv1126-gpio-bank
+ - const: rockchip,gpio-bank

reg:
maxItems: 1
@@ -75,7 +93,7 @@ examples:
};

gpio1: gpio@2003c000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3188-gpio-bank", "rockchip,gpio-bank";
reg = <0x2003c000 0x100>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_gates8 10>;
--
2.20.1


2023-01-21 11:54:02

by Johan Jonker

[permalink] [raw]
Subject: [PATCH v2 7/8] arm64: dts: rockchip: replace compatible gpio nodes

Currently all Rockchip gpio nodes have the same compatible.
Compatible strings should be SoC related.

Signed-off-by: Johan Jonker <[email protected]>
---
arch/arm64/boot/dts/rockchip/px30.dtsi | 8 ++++----
arch/arm64/boot/dts/rockchip/rk3308.dtsi | 10 +++++-----
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 8 ++++----
arch/arm64/boot/dts/rockchip/rk3368.dtsi | 8 ++++----
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 10 +++++-----
arch/arm64/boot/dts/rockchip/rk356x.dtsi | 10 +++++-----
arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 10 +++++-----
7 files changed, 32 insertions(+), 32 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi
index 9fcc0d0f3..5f8886623 100644
--- a/arch/arm64/boot/dts/rockchip/px30.dtsi
+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
@@ -1382,7 +1382,7 @@
ranges;

gpio0: gpio@ff040000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,px30-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff040000 0x0 0x100>;
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pmucru PCLK_GPIO0_PMU>;
@@ -1395,7 +1395,7 @@
};

gpio1: gpio@ff250000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,px30-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff250000 0x0 0x100>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
@@ -1408,7 +1408,7 @@
};

gpio2: gpio@ff260000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,px30-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff260000 0x0 0x100>;
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
@@ -1421,7 +1421,7 @@
};

gpio3: gpio@ff270000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,px30-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff270000 0x0 0x100>;
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>;
diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
index 38976f413..1e5742441 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
@@ -793,7 +793,7 @@
ranges;

gpio0: gpio@ff220000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3308-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff220000 0x0 0x100>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO0>;
@@ -805,7 +805,7 @@
};

gpio1: gpio@ff230000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3308-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff230000 0x0 0x100>;
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
@@ -817,7 +817,7 @@
};

gpio2: gpio@ff240000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3308-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff240000 0x0 0x100>;
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
@@ -829,7 +829,7 @@
};

gpio3: gpio@ff250000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3308-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff250000 0x0 0x100>;
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>;
@@ -841,7 +841,7 @@
};

gpio4: gpio@ff260000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3308-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff260000 0x0 0x100>;
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO4>;
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 7ba695728..b99bef14f 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -1045,7 +1045,7 @@
ranges;

gpio0: gpio@ff210000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3328-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff210000 0x0 0x100>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO0>;
@@ -1059,7 +1059,7 @@
};

gpio1: gpio@ff220000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3328-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff220000 0x0 0x100>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
@@ -1073,7 +1073,7 @@
};

gpio2: gpio@ff230000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3328-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff230000 0x0 0x100>;
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
@@ -1087,7 +1087,7 @@
};

gpio3: gpio@ff240000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3328-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff240000 0x0 0x100>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>;
diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index 5a008ed18..1ece57343 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -978,7 +978,7 @@
ranges;

gpio0: gpio@ff750000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3368-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff750000 0x0 0x100>;
clocks = <&cru PCLK_GPIO0>;
interrupts = <GIC_SPI 0x51 IRQ_TYPE_LEVEL_HIGH>;
@@ -992,7 +992,7 @@
};

gpio1: gpio@ff780000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3368-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff780000 0x0 0x100>;
clocks = <&cru PCLK_GPIO1>;
interrupts = <GIC_SPI 0x52 IRQ_TYPE_LEVEL_HIGH>;
@@ -1006,7 +1006,7 @@
};

gpio2: gpio@ff790000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3368-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff790000 0x0 0x100>;
clocks = <&cru PCLK_GPIO2>;
interrupts = <GIC_SPI 0x53 IRQ_TYPE_LEVEL_HIGH>;
@@ -1020,7 +1020,7 @@
};

gpio3: gpio@ff7a0000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3368-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff7a0000 0x0 0x100>;
clocks = <&cru PCLK_GPIO3>;
interrupts = <GIC_SPI 0x54 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 7eb96fcc6..e60917fff 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -2085,7 +2085,7 @@
ranges;

gpio0: gpio@ff720000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3399-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff720000 0x0 0x100>;
clocks = <&pmucru PCLK_GPIO0_PMU>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH 0>;
@@ -2099,7 +2099,7 @@
};

gpio1: gpio@ff730000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3399-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff730000 0x0 0x100>;
clocks = <&pmucru PCLK_GPIO1_PMU>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH 0>;
@@ -2113,7 +2113,7 @@
};

gpio2: gpio@ff780000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3399-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff780000 0x0 0x100>;
clocks = <&cru PCLK_GPIO2>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH 0>;
@@ -2127,7 +2127,7 @@
};

gpio3: gpio@ff788000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3399-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff788000 0x0 0x100>;
clocks = <&cru PCLK_GPIO3>;
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH 0>;
@@ -2141,7 +2141,7 @@
};

gpio4: gpio@ff790000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3399-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff790000 0x0 0x100>;
clocks = <&cru PCLK_GPIO4>;
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 0>;
diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
index 870b4d9c6..892afccfd 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -1803,7 +1803,7 @@
ranges;

gpio0: gpio@fdd60000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3568-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xfdd60000 0x0 0x100>;
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pmucru PCLK_GPIO0>, <&pmucru DBCLK_GPIO0>;
@@ -1815,7 +1815,7 @@
};

gpio1: gpio@fe740000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3568-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xfe740000 0x0 0x100>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>;
@@ -1827,7 +1827,7 @@
};

gpio2: gpio@fe750000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3568-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xfe750000 0x0 0x100>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>;
@@ -1839,7 +1839,7 @@
};

gpio3: gpio@fe760000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3568-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xfe760000 0x0 0x100>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>;
@@ -1851,7 +1851,7 @@
};

gpio4: gpio@fe770000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3568-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xfe770000 0x0 0x100>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>;
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
index 005cde61b..09bd4a508 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -1639,7 +1639,7 @@
#size-cells = <2>;

gpio0: gpio@fd8a0000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3588-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xfd8a0000 0x0 0x100>;
interrupts = <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru PCLK_GPIO0>, <&cru DBCLK_GPIO0>;
@@ -1651,7 +1651,7 @@
};

gpio1: gpio@fec20000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3588-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xfec20000 0x0 0x100>;
interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>;
@@ -1663,7 +1663,7 @@
};

gpio2: gpio@fec30000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3588-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xfec30000 0x0 0x100>;
interrupts = <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>;
@@ -1675,7 +1675,7 @@
};

gpio3: gpio@fec40000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3588-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xfec40000 0x0 0x100>;
interrupts = <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>;
@@ -1687,7 +1687,7 @@
};

gpio4: gpio@fec50000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3588-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xfec50000 0x0 0x100>;
interrupts = <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>;
--
2.20.1

2023-01-22 13:52:47

by Krzysztof Kozlowski

[permalink] [raw]
Subject: Re: [PATCH v2 1/8] dt-bindings: gpio: rockchip,gpio-bank: add compatible string per SoC

On 21/01/2023 12:06, Johan Jonker wrote:
> Currently all Rockchip gpio nodes have the same compatible.
> Compatible strings should be SoC related.
>
> Signed-off-by: Johan Jonker <[email protected]>
> ---
> .../bindings/gpio/rockchip,gpio-bank.yaml | 26 ++++++++++++++++---
> 1 file changed, 22 insertions(+), 4 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
> index affd823c8..a604c3638 100644
> --- a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
> +++ b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
> @@ -11,9 +11,27 @@ maintainers:
>
> properties:
> compatible:
> - enum:
> - - rockchip,gpio-bank
> - - rockchip,rk3188-gpio-bank0
> + oneOf:
> + - const: rockchip,gpio-bank
> + - const: rockchip,rk3188-gpio-bank0

That's an enum so keep them like that

> + - items:

Acked-by: Krzysztof Kozlowski <[email protected]>

Best regards,
Krzysztof


2023-01-26 13:44:38

by Linus Walleij

[permalink] [raw]
Subject: Re: [PATCH v2 1/8] dt-bindings: gpio: rockchip,gpio-bank: add compatible string per SoC

On Sat, Jan 21, 2023 at 12:06 PM Johan Jonker <[email protected]> wrote:

> Currently all Rockchip gpio nodes have the same compatible.
> Compatible strings should be SoC related.
>
> Signed-off-by: Johan Jonker <[email protected]>

Reviewed-by: Linus Walleij <[email protected]>

Yours,
Linus Walleij

2023-02-08 11:08:27

by Linus Walleij

[permalink] [raw]
Subject: Re: [PATCH v2 1/8] dt-bindings: gpio: rockchip,gpio-bank: add compatible string per SoC

On Sat, Jan 21, 2023 at 12:06 PM Johan Jonker <[email protected]> wrote:

> Currently all Rockchip gpio nodes have the same compatible.
> Compatible strings should be SoC related.
>
> Signed-off-by: Johan Jonker <[email protected]>

Bartosz can you merge this one patch and keep the rest back
so we get a more defined DT binding baseline?

Yours,
Linus Walleij

2023-02-10 20:03:43

by Bartosz Golaszewski

[permalink] [raw]
Subject: Re: [PATCH v2 1/8] dt-bindings: gpio: rockchip,gpio-bank: add compatible string per SoC

On Wed, Feb 8, 2023 at 12:08 PM Linus Walleij <[email protected]> wrote:
>
> On Sat, Jan 21, 2023 at 12:06 PM Johan Jonker <[email protected]> wrote:
>
> > Currently all Rockchip gpio nodes have the same compatible.
> > Compatible strings should be SoC related.
> >
> > Signed-off-by: Johan Jonker <[email protected]>
>
> Bartosz can you merge this one patch and keep the rest back
> so we get a more defined DT binding baseline?
>
> Yours,
> Linus Walleij

Krzysztof, you left your ack but seem to also have pointed out an
issue - do you want me to fix it up somehow before applying? Drop the
oneOf and turn it back into an enum?

Bart

2023-02-12 16:14:58

by Krzysztof Kozlowski

[permalink] [raw]
Subject: Re: [PATCH v2 1/8] dt-bindings: gpio: rockchip,gpio-bank: add compatible string per SoC

On 10/02/2023 21:03, Bartosz Golaszewski wrote:
> On Wed, Feb 8, 2023 at 12:08 PM Linus Walleij <[email protected]> wrote:
>>
>> On Sat, Jan 21, 2023 at 12:06 PM Johan Jonker <[email protected]> wrote:
>>
>>> Currently all Rockchip gpio nodes have the same compatible.
>>> Compatible strings should be SoC related.
>>>
>>> Signed-off-by: Johan Jonker <[email protected]>
>>
>> Bartosz can you merge this one patch and keep the rest back
>> so we get a more defined DT binding baseline?
>>
>> Yours,
>> Linus Walleij
>
> Krzysztof, you left your ack but seem to also have pointed out an
> issue - do you want me to fix it up somehow before applying? Drop the
> oneOf and turn it back into an enum?


Sure, you can apply with my comment fixed but then just please check
with `make dt_binding_check DT_SCHEMA_FILES="xxx.yaml"`, that
indentation is not mixed up.

Best regards,
Krzysztof


2023-02-15 15:03:01

by Bartosz Golaszewski

[permalink] [raw]
Subject: Re: [PATCH v2 1/8] dt-bindings: gpio: rockchip,gpio-bank: add compatible string per SoC

On Sun, Feb 12, 2023 at 5:14 PM Krzysztof Kozlowski
<[email protected]> wrote:
>
> On 10/02/2023 21:03, Bartosz Golaszewski wrote:
> > On Wed, Feb 8, 2023 at 12:08 PM Linus Walleij <[email protected]> wrote:
> >>
> >> On Sat, Jan 21, 2023 at 12:06 PM Johan Jonker <[email protected]> wrote:
> >>
> >>> Currently all Rockchip gpio nodes have the same compatible.
> >>> Compatible strings should be SoC related.
> >>>
> >>> Signed-off-by: Johan Jonker <[email protected]>
> >>
> >> Bartosz can you merge this one patch and keep the rest back
> >> so we get a more defined DT binding baseline?
> >>
> >> Yours,
> >> Linus Walleij
> >
> > Krzysztof, you left your ack but seem to also have pointed out an
> > issue - do you want me to fix it up somehow before applying? Drop the
> > oneOf and turn it back into an enum?
>
>
> Sure, you can apply with my comment fixed but then just please check
> with `make dt_binding_check DT_SCHEMA_FILES="xxx.yaml"`, that
> indentation is not mixed up.
>
> Best regards,
> Krzysztof
>

I prefer to get your ack on the final version really.

Johan, please address the enum issue and resend just this patch.

Bart

2023-02-15 16:14:13

by Johan Jonker

[permalink] [raw]
Subject: Re: [PATCH v2 1/8] dt-bindings: gpio: rockchip,gpio-bank: add compatible string per SoC



On 2/15/23 16:02, Bartosz Golaszewski wrote:
> On Sun, Feb 12, 2023 at 5:14 PM Krzysztof Kozlowski
> <[email protected]> wrote:
>>
>> On 10/02/2023 21:03, Bartosz Golaszewski wrote:
>>> On Wed, Feb 8, 2023 at 12:08 PM Linus Walleij <[email protected]> wrote:
>>>>
>>>> On Sat, Jan 21, 2023 at 12:06 PM Johan Jonker <[email protected]> wrote:
>>>>
>>>>> Currently all Rockchip gpio nodes have the same compatible.
>>>>> Compatible strings should be SoC related.
>>>>>
>>>>> Signed-off-by: Johan Jonker <[email protected]>
>>>>
>>>> Bartosz can you merge this one patch and keep the rest back
>>>> so we get a more defined DT binding baseline?
>>>>
>>>> Yours,
>>>> Linus Walleij
>>>
>>> Krzysztof, you left your ack but seem to also have pointed out an
>>> issue - do you want me to fix it up somehow before applying? Drop the
>>> oneOf and turn it back into an enum?
>>
>>
>> Sure, you can apply with my comment fixed but then just please check
>> with `make dt_binding_check DT_SCHEMA_FILES="xxx.yaml"`, that
>> indentation is not mixed up.
>>
>> Best regards,
>> Krzysztof
>>
>
> I prefer to get your ack on the final version really.
>

> Johan, please address the enum issue and resend just this patch.

I changed to oneOf, because with enum I didn't get it working.
With 2 enum's it complains about: is not of type 'string'.
I'm out of ideas...
Maybe it's something simple that I overlook.
Could Krzysztof give an example?

Johan


>
> Bart

2023-02-15 20:15:20

by Krzysztof Kozlowski

[permalink] [raw]
Subject: Re: [PATCH v2 1/8] dt-bindings: gpio: rockchip,gpio-bank: add compatible string per SoC

On 15/02/2023 17:14, Johan Jonker wrote:

>
>> Johan, please address the enum issue and resend just this patch.
>
> I changed to oneOf, because with enum I didn't get it working.
> With 2 enum's it complains about: is not of type 'string'.
> I'm out of ideas...
> Maybe it's something simple that I overlook.
> Could Krzysztof give an example?

Documentation/devicetree/bindings/arm/l2c2x0.yaml

It should look like this, if my email did not mess up indents:

+ oneOf:
+ - enum:
+ - rockchip,gpio-bank
+ - rockchip,rk3188-gpio-bank0
+ - items:
+ - enum:

Best regards,
Krzysztof


2023-02-15 21:03:22

by Johan Jonker

[permalink] [raw]
Subject: [PATCH v3] dt-bindings: gpio: rockchip,gpio-bank: add compatible string per SoC

Currently all Rockchip gpio nodes have the same compatible.
Compatible strings should be SoC related.

Signed-off-by: Johan Jonker <[email protected]>
Reviewed-by: Linus Walleij <[email protected]>
---

Changed V3:
Keep enum
---
.../bindings/gpio/rockchip,gpio-bank.yaml | 27 ++++++++++++++++---
1 file changed, 23 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
index affd823c8..2e9a5179c 100644
--- a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
+++ b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
@@ -11,9 +11,28 @@ maintainers:

properties:
compatible:
- enum:
- - rockchip,gpio-bank
- - rockchip,rk3188-gpio-bank0
+ oneOf:
+ - enum:
+ - rockchip,gpio-bank
+ - rockchip,rk3188-gpio-bank0
+ - items:
+ - enum:
+ - rockchip,px30-gpio-bank
+ - rockchip,rk3036-gpio-bank
+ - rockchip,rk3066a-gpio-bank
+ - rockchip,rk3128-gpio-bank
+ - rockchip,rk3188-gpio-bank
+ - rockchip,rk3228-gpio-bank
+ - rockchip,rk3288-gpio-bank
+ - rockchip,rk3328-gpio-bank
+ - rockchip,rk3308-gpio-bank
+ - rockchip,rk3368-gpio-bank
+ - rockchip,rk3399-gpio-bank
+ - rockchip,rk3568-gpio-bank
+ - rockchip,rk3588-gpio-bank
+ - rockchip,rv1108-gpio-bank
+ - rockchip,rv1126-gpio-bank
+ - const: rockchip,gpio-bank

reg:
maxItems: 1
@@ -75,7 +94,7 @@ examples:
};

gpio1: gpio@2003c000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3188-gpio-bank", "rockchip,gpio-bank";
reg = <0x2003c000 0x100>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_gates8 10>;
--
2.20.1


2023-02-16 10:42:26

by Krzysztof Kozlowski

[permalink] [raw]
Subject: Re: [PATCH v3] dt-bindings: gpio: rockchip,gpio-bank: add compatible string per SoC

On 15/02/2023 22:01, Johan Jonker wrote:
> Currently all Rockchip gpio nodes have the same compatible.
> Compatible strings should be SoC related.
>
> Signed-off-by: Johan Jonker <[email protected]>
> Reviewed-by: Linus Walleij <[email protected]>
> ---


Reviewed-by: Krzysztof Kozlowski <[email protected]>

Best regards,
Krzysztof