2022-11-28 09:05:42

by Jayesh Choudhary

[permalink] [raw]
Subject: [PATCH] dmaengine: ti: k3-udma: Do conditional decrement of UDMA_CHAN_RT_PEER_BCNT_REG

PSIL_EP_NATIVE endpoints may not have PEER registers for BCNT and thus
udma_decrement_byte_counters() should not try to decrement these counters.
This fixes the issue of crypto IPERF testing where the client side (EVM)
hangs without transfer of packets to the server side, seen since this
function was added.

Fixes: 7c94dcfa8fcf ("dmaengine: ti: k3-udma: Reset UDMA_CHAN_RT byte counters to prevent overflow")
Signed-off-by: Jayesh Choudhary <[email protected]>
---
drivers/dma/ti/k3-udma.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c
index ce8b80bb34d7..4c62274e0b33 100644
--- a/drivers/dma/ti/k3-udma.c
+++ b/drivers/dma/ti/k3-udma.c
@@ -762,11 +762,12 @@ static void udma_decrement_byte_counters(struct udma_chan *uc, u32 val)
if (uc->desc->dir == DMA_DEV_TO_MEM) {
udma_rchanrt_write(uc, UDMA_CHAN_RT_BCNT_REG, val);
udma_rchanrt_write(uc, UDMA_CHAN_RT_SBCNT_REG, val);
- udma_rchanrt_write(uc, UDMA_CHAN_RT_PEER_BCNT_REG, val);
+ if (uc->config.ep_type != PSIL_EP_NATIVE)
+ udma_rchanrt_write(uc, UDMA_CHAN_RT_PEER_BCNT_REG, val);
} else {
udma_tchanrt_write(uc, UDMA_CHAN_RT_BCNT_REG, val);
udma_tchanrt_write(uc, UDMA_CHAN_RT_SBCNT_REG, val);
- if (!uc->bchan)
+ if (!uc->bchan && uc->config.ep_type != PSIL_EP_NATIVE)
udma_tchanrt_write(uc, UDMA_CHAN_RT_PEER_BCNT_REG, val);
}
}
--
2.25.1


2022-11-29 16:37:06

by Péter Ujfalusi

[permalink] [raw]
Subject: Re: [PATCH] dmaengine: ti: k3-udma: Do conditional decrement of UDMA_CHAN_RT_PEER_BCNT_REG



On 28/11/2022 10:50, Jayesh Choudhary wrote:
> PSIL_EP_NATIVE endpoints may not have PEER registers for BCNT and thus
> udma_decrement_byte_counters() should not try to decrement these counters.
> This fixes the issue of crypto IPERF testing where the client side (EVM)
> hangs without transfer of packets to the server side, seen since this
> function was added.

Right, the BCNT is available on PDMA_XY for sure, I don't know if it is
on AASRC/MCAN type tho, but they are not used right now.

I might clarify and use ep_type == PSIL_EP_PDMA_XY to be sure that only
the known variant is handled, but this is fine as well.

Acked-by: Peter Ujfalusi <[email protected]>

>
> Fixes: 7c94dcfa8fcf ("dmaengine: ti: k3-udma: Reset UDMA_CHAN_RT byte counters to prevent overflow")
> Signed-off-by: Jayesh Choudhary <[email protected]>
> ---
> drivers/dma/ti/k3-udma.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c
> index ce8b80bb34d7..4c62274e0b33 100644
> --- a/drivers/dma/ti/k3-udma.c
> +++ b/drivers/dma/ti/k3-udma.c
> @@ -762,11 +762,12 @@ static void udma_decrement_byte_counters(struct udma_chan *uc, u32 val)
> if (uc->desc->dir == DMA_DEV_TO_MEM) {
> udma_rchanrt_write(uc, UDMA_CHAN_RT_BCNT_REG, val);
> udma_rchanrt_write(uc, UDMA_CHAN_RT_SBCNT_REG, val);
> - udma_rchanrt_write(uc, UDMA_CHAN_RT_PEER_BCNT_REG, val);
> + if (uc->config.ep_type != PSIL_EP_NATIVE)
> + udma_rchanrt_write(uc, UDMA_CHAN_RT_PEER_BCNT_REG, val);
> } else {
> udma_tchanrt_write(uc, UDMA_CHAN_RT_BCNT_REG, val);
> udma_tchanrt_write(uc, UDMA_CHAN_RT_SBCNT_REG, val);
> - if (!uc->bchan)
> + if (!uc->bchan && uc->config.ep_type != PSIL_EP_NATIVE)
> udma_tchanrt_write(uc, UDMA_CHAN_RT_PEER_BCNT_REG, val);
> }
> }

--
Péter

2022-12-28 11:12:55

by Vinod Koul

[permalink] [raw]
Subject: Re: [PATCH] dmaengine: ti: k3-udma: Do conditional decrement of UDMA_CHAN_RT_PEER_BCNT_REG

On 28-11-22, 14:20, Jayesh Choudhary wrote:
> PSIL_EP_NATIVE endpoints may not have PEER registers for BCNT and thus
> udma_decrement_byte_counters() should not try to decrement these counters.
> This fixes the issue of crypto IPERF testing where the client side (EVM)
> hangs without transfer of packets to the server side, seen since this
> function was added.

Applied, thanks

--
~Vinod