From: Pavel Pisa <[email protected]>
The patch update, added separate patch to add Czech Technical University
to the vendors list. Change ctu_can_fd_0 instance string to lowercase
(originally uppercase because build from official abbreviations).
Clarify that clock-names are not used for now but can be used in future.
Pavel Pisa (2):
dt-bindings: vendor-prefix: add prefix for Czech Technical University
in Prague.
dt-bindings: net: can: binding for CTU CAN FD open-source IP core.
The corresponding sources for testing program from user-space
and for Linux kernel driver for platform and PCIe IP core
integrations are available there
https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/tree/master/driver/
.../devicetree/bindings/net/can/ctu,ctucanfd.txt | 108 +++++++++++++++++++++
.../devicetree/bindings/vendor-prefixes.txt | 1 +
2 files changed, 109 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/can/ctu,ctucanfd.txt
--
2.11.0
From: Pavel Pisa <[email protected]>
Signed-off-by: Pavel Pisa <[email protected]>
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index 389508584f48..07de8df03c57 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -86,6 +86,7 @@ crane Crane Connectivity Solutions
creative Creative Technology Ltd
crystalfontz Crystalfontz America, Inc.
csky Hangzhou C-SKY Microsystems Co., Ltd
+ctu Czech Technical University in Prague
cubietech Cubietech, Ltd.
cypress Cypress Semiconductor Corporation
cznic CZ.NIC, z.s.p.o.
--
2.11.0
From: Pavel Pisa <[email protected]>
Signed-off-by: Pavel Pisa <[email protected]>
---
.../devicetree/bindings/net/can/ctu,ctucanfd.txt | 108 +++++++++++++++++++++
1 file changed, 108 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/can/ctu,ctucanfd.txt
diff --git a/Documentation/devicetree/bindings/net/can/ctu,ctucanfd.txt b/Documentation/devicetree/bindings/net/can/ctu,ctucanfd.txt
new file mode 100644
index 000000000000..fea9c08b79ec
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/can/ctu,ctucanfd.txt
@@ -0,0 +1,108 @@
+Memory mapped CTU CAN FD open-source IP core
+
+The core sources and documentation on project page
+
+ https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core
+ http://canbus.pages.fel.cvut.cz/ctucanfd_ip_core/Progdokum.pdf
+
+Integration in Xilinx Zynq SoC based system together with
+OpenCores SJA1000 compatible controllers
+
+ https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top
+
+Martin Jerabek's dimploma thesis with integration and testing
+framework description
+
+ https://dspace.cvut.cz/bitstream/handle/10467/80366/F3-DP-2019-Jerabek-Martin-Jerabek-thesis-2019-canfd.pdf
+
+Required properties:
+
+- compatible : should be one of "ctu,ctucanfd", "ctu,canfd-2".
+ The "canfd-2" has been reserved for older revision of the IP core.
+ The revision can be read from the IP core register as well.
+
+- reg = <(baseaddr) (size)> : specify mapping into physical address
+ space of the processor system.
+
+- interrupts : property with a value describing the interrupt source
+ required for the CTU CAN FD. For Zynq SoC system format is
+ <(is_spi) (number) (type)> where is_spi defines if it is SPI
+ (shared peripheral) interrupt, the second number is translated
+ to the vector by addition of 32 on Zynq-7000 systems and type
+ is IRQ_TYPE_LEVEL_HIGH (4) for Zynq.
+
+- interrupt-parent = <&interrupt-controller-phandle> :
+ is required for Zynq SoC to find map interrupt
+ to the correct controller
+
+- clocks: phandle of reference clock (100 MHz is appropriate
+ for FPGA implementation on Zynq-7000 system).
+
+Optional properties:
+
+- clock-names: not used in actual design but if more clocks are used
+ by cores then "can_clk" would be clock source name for the clocks
+ used to define CAN time-quanta.
+
+Example when integrated to Zynq-7000 system DTS:
+
+ / {
+ /* ... */
+ amba: amba {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "simple-bus";
+
+ ctu_can_fd_0: ctu_can_fd@43c30000 {
+ compatible = "ctu,ctucanfd";
+ interrupt-parent = <&intc>;
+ interrupts = <0 30 4>;
+ clocks = <&clkc 15>;
+ reg = <0x43c30000 0x10000>;
+ };
+ };
+ };
+
+
+Example when used as DTS overlay on Zynq-7000 system:
+
+
+// Device Tree Example: Full Reconfiguration without Bridges
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ target-path = "/fpga-full";
+
+ __overlay__ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ firmware-name = "system.bit.bin";
+ };
+ };
+
+ fragment@1 {
+ target-path = "/amba";
+ __overlay__ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ ctu_can_fd_0: ctu_can_fd@43c30000 {
+ compatible = "ctu,ctucanfd";
+ interrupt-parent = <&intc>;
+ interrupts = <0 30 4>;
+ clocks = <&clkc 15>;
+ reg = <0x43c30000 0x10000>;
+ };
+ ctu_can_fd_1: ctu_can_fd@43c70000 {
+ compatible = "ctu,ctucanfd";
+ interrupt-parent = <&intc>;
+ interrupts = <0 31 4>;
+ clocks = <&clkc 15>;
+ reg = <0x43c70000 0x10000>;
+ };
+ };
+ };
+};
--
2.11.0
On 27. 02. 19 18:26, [email protected] wrote:
> From: Pavel Pisa <[email protected]>
Ahoj Pavle,
I can not comment on the content of the binding but it is a good
practice to add at least a short description to each commit even
if it should be the subject said differently.
Anyway, hats off to all of you, great work!
Greetings back to my alma mater,
Michal
>
> Signed-off-by: Pavel Pisa <[email protected]>
> ---
On Wed, 27 Feb 2019 18:26:28 +0100, [email protected] wrote:
> From: Pavel Pisa <[email protected]>
>
> Signed-off-by: Pavel Pisa <[email protected]>
> ---
> Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
> 1 file changed, 1 insertion(+)
>
Reviewed-by: Rob Herring <[email protected]>
On Wed, Feb 27, 2019 at 06:26:29PM +0100, [email protected] wrote:
> From: Pavel Pisa <[email protected]>
>
> Signed-off-by: Pavel Pisa <[email protected]>
> ---
> .../devicetree/bindings/net/can/ctu,ctucanfd.txt | 108 +++++++++++++++++++++
> 1 file changed, 108 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/net/can/ctu,ctucanfd.txt
>
> diff --git a/Documentation/devicetree/bindings/net/can/ctu,ctucanfd.txt b/Documentation/devicetree/bindings/net/can/ctu,ctucanfd.txt
> new file mode 100644
> index 000000000000..fea9c08b79ec
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/can/ctu,ctucanfd.txt
> @@ -0,0 +1,108 @@
> +Memory mapped CTU CAN FD open-source IP core
> +
> +The core sources and documentation on project page
> +
> + https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core
> + http://canbus.pages.fel.cvut.cz/ctucanfd_ip_core/Progdokum.pdf
> +
> +Integration in Xilinx Zynq SoC based system together with
> +OpenCores SJA1000 compatible controllers
> +
> + https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top
> +
> +Martin Jerabek's dimploma thesis with integration and testing
> +framework description
> +
> + https://dspace.cvut.cz/bitstream/handle/10467/80366/F3-DP-2019-Jerabek-Martin-Jerabek-thesis-2019-canfd.pdf
> +
> +Required properties:
> +
> +- compatible : should be one of "ctu,ctucanfd", "ctu,canfd-2".
> + The "canfd-2" has been reserved for older revision of the IP core.
> + The revision can be read from the IP core register as well.
> +
> +- reg = <(baseaddr) (size)> : specify mapping into physical address
> + space of the processor system.
> +
> +- interrupts : property with a value describing the interrupt source
> + required for the CTU CAN FD. For Zynq SoC system format is
> + <(is_spi) (number) (type)> where is_spi defines if it is SPI
> + (shared peripheral) interrupt, the second number is translated
> + to the vector by addition of 32 on Zynq-7000 systems and type
> + is IRQ_TYPE_LEVEL_HIGH (4) for Zynq.
> +
> +- interrupt-parent = <&interrupt-controller-phandle> :
> + is required for Zynq SoC to find map interrupt
> + to the correct controller
Remove as this is implied and could be in a parent node.
> +
> +- clocks: phandle of reference clock (100 MHz is appropriate
> + for FPGA implementation on Zynq-7000 system).
> +
> +Optional properties:
> +
> +- clock-names: not used in actual design but if more clocks are used
> + by cores then "can_clk" would be clock source name for the clocks
> + used to define CAN time-quanta.
> +
> +Example when integrated to Zynq-7000 system DTS:
> +
> + / {
> + /* ... */
> + amba: amba {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "simple-bus";
> +
> + ctu_can_fd_0: ctu_can_fd@43c30000 {
can@...
> + compatible = "ctu,ctucanfd";
> + interrupt-parent = <&intc>;
> + interrupts = <0 30 4>;
> + clocks = <&clkc 15>;
> + reg = <0x43c30000 0x10000>;
> + };
> + };
> + };
> +
> +
> +Example when used as DTS overlay on Zynq-7000 system:
> +
> +
> +// Device Tree Example: Full Reconfiguration without Bridges
Drop this example. Overlays are outside the scope of bindings.
> +/dts-v1/;
> +/plugin/;
> +
> +/ {
> + fragment@0 {
> + target-path = "/fpga-full";
> +
> + __overlay__ {
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + firmware-name = "system.bit.bin";
> + };
> + };
> +
> + fragment@1 {
> + target-path = "/amba";
> + __overlay__ {
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + ctu_can_fd_0: ctu_can_fd@43c30000 {
> + compatible = "ctu,ctucanfd";
> + interrupt-parent = <&intc>;
> + interrupts = <0 30 4>;
> + clocks = <&clkc 15>;
> + reg = <0x43c30000 0x10000>;
> + };
> + ctu_can_fd_1: ctu_can_fd@43c70000 {
> + compatible = "ctu,ctucanfd";
> + interrupt-parent = <&intc>;
> + interrupts = <0 31 4>;
> + clocks = <&clkc 15>;
> + reg = <0x43c70000 0x10000>;
> + };
> + };
> + };
> +};
> --
> 2.11.0
>