This patch makes use of trap types in head_8xx.S
Signed-off-by: Christophe Leroy <[email protected]>
---
arch/powerpc/include/asm/interrupt.h | 29 ++++++++++++----
arch/powerpc/kernel/head_8xx.S | 49 ++++++++++++++--------------
2 files changed, 47 insertions(+), 31 deletions(-)
diff --git a/arch/powerpc/include/asm/interrupt.h b/arch/powerpc/include/asm/interrupt.h
index ed2c4042c3d1..cf2c5c3ae716 100644
--- a/arch/powerpc/include/asm/interrupt.h
+++ b/arch/powerpc/include/asm/interrupt.h
@@ -2,13 +2,6 @@
#ifndef _ASM_POWERPC_INTERRUPT_H
#define _ASM_POWERPC_INTERRUPT_H
-#include <linux/context_tracking.h>
-#include <linux/hardirq.h>
-#include <asm/cputime.h>
-#include <asm/ftrace.h>
-#include <asm/kprobes.h>
-#include <asm/runlatch.h>
-
/* BookE/4xx */
#define INTERRUPT_CRITICAL_INPUT 0x100
@@ -39,9 +32,11 @@
/* BookE/BookS/4xx/8xx */
#define INTERRUPT_DATA_STORAGE 0x300
#define INTERRUPT_INST_STORAGE 0x400
+#define INTERRUPT_EXTERNAL 0x500
#define INTERRUPT_ALIGNMENT 0x600
#define INTERRUPT_PROGRAM 0x700
#define INTERRUPT_SYSCALL 0xc00
+#define INTERRUPT_TRACE 0xd00
/* BookE/BookS/44x */
#define INTERRUPT_FP_UNAVAIL 0x800
@@ -53,6 +48,24 @@
#define INTERRUPT_PERFMON 0x0
#endif
+/* 8xx */
+#define INTERRUPT_SOFT_EMU_8xx 0x1000
+#define INTERRUPT_INST_TLB_MISS_8xx 0x1100
+#define INTERRUPT_DATA_TLB_MISS_8xx 0x1200
+#define INTERRUPT_INST_TLB_ERROR_8xx 0x1300
+#define INTERRUPT_DATA_TLB_ERROR_8xx 0x1400
+#define INTERRUPT_DATA_BREAKPOINT_8xx 0x1c00
+#define INTERRUPT_INST_BREAKPOINT_8xx 0x1d00
+
+#ifndef __ASSEMBLY__
+
+#include <linux/context_tracking.h>
+#include <linux/hardirq.h>
+#include <asm/cputime.h>
+#include <asm/ftrace.h>
+#include <asm/kprobes.h>
+#include <asm/runlatch.h>
+
static inline void nap_adjust_return(struct pt_regs *regs)
{
#ifdef CONFIG_PPC_970_NAP
@@ -514,4 +527,6 @@ static inline void interrupt_cond_local_irq_enable(struct pt_regs *regs)
local_irq_enable();
}
+#endif /* __ASSEMBLY__ */
+
#endif /* _ASM_POWERPC_INTERRUPT_H */
diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index e3b066703eab..7d445e4342c0 100644
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -29,6 +29,7 @@
#include <asm/ptrace.h>
#include <asm/export.h>
#include <asm/code-patching-asm.h>
+#include <asm/interrupt.h>
/*
* Value for the bits that have fixed value in RPN entries.
@@ -118,49 +119,49 @@ instruction_counter:
#endif
/* System reset */
- EXCEPTION(0x100, Reset, system_reset_exception)
+ EXCEPTION(INTERRUPT_SYSTEM_RESET, Reset, system_reset_exception)
/* Machine check */
- START_EXCEPTION(0x200, MachineCheck)
- EXCEPTION_PROLOG 0x200 MachineCheck handle_dar_dsisr=1
+ START_EXCEPTION(INTERRUPT_MACHINE_CHECK, MachineCheck)
+ EXCEPTION_PROLOG INTERRUPT_MACHINE_CHECK MachineCheck handle_dar_dsisr=1
prepare_transfer_to_handler
bl machine_check_exception
b interrupt_return
/* External interrupt */
- EXCEPTION(0x500, HardwareInterrupt, do_IRQ)
+ EXCEPTION(INTERRUPT_EXTERNAL, HardwareInterrupt, do_IRQ)
/* Alignment exception */
- START_EXCEPTION(0x600, Alignment)
- EXCEPTION_PROLOG 0x600 Alignment handle_dar_dsisr=1
+ START_EXCEPTION(INTERRUPT_ALIGNMENT, Alignment)
+ EXCEPTION_PROLOG INTERRUPT_ALIGNMENT Alignment handle_dar_dsisr=1
prepare_transfer_to_handler
bl alignment_exception
REST_NVGPRS(r1)
b interrupt_return
/* Program check exception */
- START_EXCEPTION(0x700, ProgramCheck)
- EXCEPTION_PROLOG 0x700 ProgramCheck
+ START_EXCEPTION(INTERRUPT_PROGRAM, ProgramCheck)
+ EXCEPTION_PROLOG INTERRUPT_PROGRAM ProgramCheck
prepare_transfer_to_handler
bl program_check_exception
REST_NVGPRS(r1)
b interrupt_return
/* Decrementer */
- EXCEPTION(0x900, Decrementer, timer_interrupt)
+ EXCEPTION(INTERRUPT_DECREMENTER, Decrementer, timer_interrupt)
/* System call */
- START_EXCEPTION(0xc00, SystemCall)
- SYSCALL_ENTRY 0xc00
+ START_EXCEPTION(INTERRUPT_SYSCALL, SystemCall)
+ SYSCALL_ENTRY INTERRUPT_SYSCALL
/* Single step - not used on 601 */
- EXCEPTION(0xd00, SingleStep, single_step_exception)
+ EXCEPTION(INTERRUPT_TRACE, SingleStep, single_step_exception)
/* On the MPC8xx, this is a software emulation interrupt. It occurs
* for all unimplemented and illegal instructions.
*/
- START_EXCEPTION(0x1000, SoftEmu)
- EXCEPTION_PROLOG 0x1000 SoftEmu
+ START_EXCEPTION(INTERRUPT_SOFT_EMU_8xx, SoftEmu)
+ EXCEPTION_PROLOG INTERRUPT_SOFT_EMU_8xx SoftEmu
prepare_transfer_to_handler
bl emulation_assist_interrupt
REST_NVGPRS(r1)
@@ -187,7 +188,7 @@ instruction_counter:
#define INVALIDATE_ADJACENT_PAGES_CPU15(addr, tmp)
#endif
- START_EXCEPTION(0x1100, InstructionTLBMiss)
+ START_EXCEPTION(INTERRUPT_INST_TLB_MISS_8xx, InstructionTLBMiss)
mtspr SPRN_SPRG_SCRATCH2, r10
mtspr SPRN_M_TW, r11
@@ -243,7 +244,7 @@ instruction_counter:
rfi
#endif
- START_EXCEPTION(0x1200, DataStoreTLBMiss)
+ START_EXCEPTION(INTERRUPT_DATA_TLB_MISS_8xx, DataStoreTLBMiss)
mtspr SPRN_SPRG_SCRATCH2, r10
mtspr SPRN_M_TW, r11
mfcr r11
@@ -306,9 +307,9 @@ instruction_counter:
* to many reasons, such as executing guarded memory or illegal instruction
* addresses. There is nothing to do but handle a big time error fault.
*/
- START_EXCEPTION(0x1300, InstructionTLBError)
+ START_EXCEPTION(INTERRUPT_INST_TLB_ERROR_8xx, InstructionTLBError)
/* 0x400 is InstructionAccess exception, needed by bad_page_fault() */
- EXCEPTION_PROLOG 0x400 InstructionTLBError
+ EXCEPTION_PROLOG INTERRUPT_INST_STORAGE InstructionTLBError
andis. r5,r9,DSISR_SRR1_MATCH_32S@h /* Filter relevant SRR1 bits */
andis. r10,r9,SRR1_ISI_NOPT@h
beq+ .Litlbie
@@ -324,7 +325,7 @@ instruction_counter:
* many reasons, including a dirty update to a pte. We bail out to
* a higher level function that can handle it.
*/
- START_EXCEPTION(0x1400, DataTLBError)
+ START_EXCEPTION(INTERRUPT_DATA_TLB_ERROR_8xx, DataTLBError)
EXCEPTION_PROLOG_0 handle_dar_dsisr=1
mfspr r11, SPRN_DAR
cmpwi cr1, r11, RPN_PATTERN
@@ -332,7 +333,7 @@ instruction_counter:
DARFixed:/* Return from dcbx instruction bug workaround */
EXCEPTION_PROLOG_1
/* 0x300 is DataAccess exception, needed by bad_page_fault() */
- EXCEPTION_PROLOG_2 0x300 DataTLBError handle_dar_dsisr=1
+ EXCEPTION_PROLOG_2 INTERRUPT_DATA_STORAGE DataTLBError handle_dar_dsisr=1
lwz r4, _DAR(r11)
lwz r5, _DSISR(r11)
andis. r10,r5,DSISR_NOHPTE@h
@@ -351,7 +352,7 @@ DARFixed:/* Return from dcbx instruction bug workaround */
* support of breakpoints and such. Someday I will get around to
* using them.
*/
- START_EXCEPTION(0x1c00, DataBreakpoint)
+ START_EXCEPTION(INTERRUPT_DATA_BREAKPOINT_8xx, DataBreakpoint)
EXCEPTION_PROLOG_0 handle_dar_dsisr=1
mfspr r11, SPRN_SRR0
cmplwi cr1, r11, (.Ldtlbie - PAGE_OFFSET)@l
@@ -364,7 +365,7 @@ DARFixed:/* Return from dcbx instruction bug workaround */
rfi
1: EXCEPTION_PROLOG_1
- EXCEPTION_PROLOG_2 0x1c00 DataBreakpoint handle_dar_dsisr=1
+ EXCEPTION_PROLOG_2 INTERRUPT_DATA_BREAKPOINT_8xx DataBreakpoint handle_dar_dsisr=1
mfspr r4,SPRN_BAR
stw r4,_DAR(r11)
prepare_transfer_to_handler
@@ -373,7 +374,7 @@ DARFixed:/* Return from dcbx instruction bug workaround */
b interrupt_return
#ifdef CONFIG_PERF_EVENTS
- START_EXCEPTION(0x1d00, InstructionBreakpoint)
+ START_EXCEPTION(INTERRUPT_INST_BREAKPOINT_8xx, InstructionBreakpoint)
mtspr SPRN_SPRG_SCRATCH0, r10
lwz r10, (instruction_counter - PAGE_OFFSET)@l(0)
addi r10, r10, -1
@@ -384,7 +385,7 @@ DARFixed:/* Return from dcbx instruction bug workaround */
mfspr r10, SPRN_SPRG_SCRATCH0
rfi
#else
- EXCEPTION(0x1d00, Trap_1d, unknown_exception)
+ EXCEPTION(INTERRUPT_INST_BREAKPOINT_8xx, Trap_1d, unknown_exception)
#endif
EXCEPTION(0x1e00, Trap_1e, unknown_exception)
EXCEPTION(0x1f00, Trap_1f, unknown_exception)
--
2.25.0
On Mon, Apr 19, 2021 at 11:48 PM Christophe Leroy
<[email protected]> wrote:
>
> This patch makes use of trap types in head_8xx.S
>
> Signed-off-by: Christophe Leroy <[email protected]>
> ---
> arch/powerpc/include/asm/interrupt.h | 29 ++++++++++++----
> arch/powerpc/kernel/head_8xx.S | 49 ++++++++++++++--------------
> 2 files changed, 47 insertions(+), 31 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/interrupt.h b/arch/powerpc/include/asm/interrupt.h
> index ed2c4042c3d1..cf2c5c3ae716 100644
> --- a/arch/powerpc/include/asm/interrupt.h
> +++ b/arch/powerpc/include/asm/interrupt.h
> @@ -2,13 +2,6 @@
> #ifndef _ASM_POWERPC_INTERRUPT_H
> #define _ASM_POWERPC_INTERRUPT_H
>
> -#include <linux/context_tracking.h>
> -#include <linux/hardirq.h>
> -#include <asm/cputime.h>
> -#include <asm/ftrace.h>
> -#include <asm/kprobes.h>
> -#include <asm/runlatch.h>
> -
> /* BookE/4xx */
> #define INTERRUPT_CRITICAL_INPUT 0x100
>
> @@ -39,9 +32,11 @@
> /* BookE/BookS/4xx/8xx */
> #define INTERRUPT_DATA_STORAGE 0x300
> #define INTERRUPT_INST_STORAGE 0x400
> +#define INTERRUPT_EXTERNAL 0x500
> #define INTERRUPT_ALIGNMENT 0x600
> #define INTERRUPT_PROGRAM 0x700
> #define INTERRUPT_SYSCALL 0xc00
> +#define INTERRUPT_TRACE 0xd00
The INTERRUPT_TRACE macro is defined in BookS section.
In BookE, 0xd00 stands for debug interrupt, so I defined it as
INTERRUPT_DEBUG. I understand they are similar things,
but the terminologies are different in reference manuals.
Regards,
Xiongwei
On Mon, 19 Apr 2021 15:48:09 +0000 (UTC), Christophe Leroy wrote:
> This patch makes use of trap types in head_8xx.S
Applied to powerpc/next.
[1/3] powerpc/8xx: Enhance readability of trap types
https://git.kernel.org/powerpc/c/0f5eb28a6ce6ab0882010e6727bfd6e8cd569273
[2/3] powerpc/32s: Enhance readability of trap types
https://git.kernel.org/powerpc/c/7fab639729ce4a0ecb3c528cd68b0c0598696ef9
[3/3] powerpc/irq: Enhance readability of trap types
https://git.kernel.org/powerpc/c/e522331173ec9af563461e0fae534e83ce39e8e3
cheers