2023-04-21 22:34:02

by Krzysztof Kozlowski

[permalink] [raw]

Subject: [PATCH] arm64: dts: broadcom: add missing cache properties

---

As all level 2 and level 3 caches are unified, add required
cache-unified properties to fix warnings like:

bcm94908.dtb: l2-cache0: 'cache-unified' is a required property

Signed-off-by: Krzysztof Kozlowski <[email protected]>

---

Please take the patch via sub-arch SoC tree.
---
arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi | 1 +
arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi | 1 +
arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi | 1 +
arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi | 1 +
arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi | 1 +
arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi | 1 +
arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi | 1 +
arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi | 1 +
arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi | 4 ++++
9 files changed, 12 insertions(+)

diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
index 457805efb385..f549bda8c48c 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
@@ -64,6 +64,7 @@ cpu3: cpu@3 {
l2: l2-cache0 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
};

diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi
index 46aa8c0b7971..d658c81f7285 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi
@@ -52,6 +52,7 @@ B53_3: cpu@3 {
L2_0: l2-cache0 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
};

diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi
index 7020f2e995e2..4f474d47022e 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi
@@ -36,6 +36,7 @@ B53_1: cpu@1 {
L2_0: l2-cache0 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
};

diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi
index 6a0242cbea57..909f254dc47d 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi
@@ -52,6 +52,7 @@ B53_3: cpu@3 {
L2_0: l2-cache0 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
};

diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi
index 1a12905266ef..685ae32951c9 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi
@@ -52,6 +52,7 @@ B53_3: cpu@3 {
L2_0: l2-cache0 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
};

diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi
index f41ebc30666f..820553ce541b 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi
@@ -36,6 +36,7 @@ B53_1: cpu@1 {
L2_0: l2-cache0 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
};

diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
index fa2688f41f06..0eb93c298297 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
@@ -51,6 +51,7 @@ B53_3: cpu@3 {
L2_0: l2-cache0 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
};

diff --git a/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi b/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi
index e1b80e569cdf..9dcd25ec2c04 100644
--- a/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi
+++ b/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi
@@ -80,6 +80,7 @@ A57_3: cpu@3 {
CLUSTER0_L2: l2-cache@0 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
};

diff --git a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
index 388424b3e1d3..7aece79bf882 100644
--- a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
+++ b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
@@ -109,21 +109,25 @@ cpu@301 {
CLUSTER0_L2: l2-cache@0 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};

CLUSTER1_L2: l2-cache@100 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};

CLUSTER2_L2: l2-cache@200 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};

CLUSTER3_L2: l2-cache@300 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
};

--
2.34.1

2023-04-24 16:45:52

by William Zhang

[permalink] [raw]

Subject: Re: [PATCH] arm64: dts: broadcom: add missing cache properties

---

On 04/21/2023 03:32 PM, Krzysztof Kozlowski wrote:
> As all level 2 and level 3 caches are unified, add required
> cache-unified properties to fix warnings like:
>
> bcm94908.dtb: l2-cache0: 'cache-unified' is a required property
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
>
> ---
>
> Please take the patch via sub-arch SoC tree.
> ---
> arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi | 1 +
> arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi | 1 +
> arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi | 1 +
> arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi | 1 +
> arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi | 1 +
> arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi | 1 +
> arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi | 1 +
> arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi | 1 +
> arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi | 4 ++++
> 9 files changed, 12 insertions(+)
>

Reviewed-by: William Zhang <[email protected]>

---

Attachments:

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2023-04-24 22:37:05

by Florian Fainelli

[permalink] [raw]

Subject: Re: [PATCH] arm64: dts: broadcom: add missing cache properties

---

On Sat, 22 Apr 2023 00:32:08 +0200, Krzysztof Kozlowski <[email protected]> wrote:
> As all level 2 and level 3 caches are unified, add required
> cache-unified properties to fix warnings like:
>
> bcm94908.dtb: l2-cache0: 'cache-unified' is a required property
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
>
> ---

Applied to https://github.com/Broadcom/stblinux/commits/devicetree-arm64/next, thanks!
--
Florian