2024-06-04 14:40:54

by Christophe Roullier

Subject: [PATCH v4 08/11] ARM: dts: stm32: add ethernet1 and ethernet2 support on stm32mp13

Both instances ethernet based on GMAC SNPS IP on stm32mp13.
GMAC IP version is SNPS 4.20.

Signed-off-by: Christophe Roullier <[email protected]>
---
arch/arm/boot/dts/st/stm32mp131.dtsi | 38 ++++++++++++++++++++++++++++
arch/arm/boot/dts/st/stm32mp133.dtsi | 31 +++++++++++++++++++++++
2 files changed, 69 insertions(+)

diff --git a/arch/arm/boot/dts/st/stm32mp131.dtsi b/arch/arm/boot/dts/st/stm32mp131.dtsi
index 6704ceef284d3..9d05853ececf7 100644
--- a/arch/arm/boot/dts/st/stm32mp131.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp131.dtsi
@@ -979,6 +979,12 @@ ts_cal1: calib@5c {
ts_cal2: calib@5e {
reg = <0x5e 0x2>;
};
+ ethernet_mac1_address: mac1@e4 {
+ reg = <0xe4 0x6>;
+ };
+ ethernet_mac2_address: mac2@ea {
+ reg = <0xea 0x6>;
+ };
};

etzpc: bus@5c007000 {
@@ -1505,6 +1511,38 @@ sdmmc2: mmc@58007000 {
status = "disabled";
};

+ ethernet1: ethernet@5800a000 {
+ compatible = "st,stm32mp13-dwmac", "snps,dwmac-4.20a";
+ reg = <0x5800a000 0x2000>;
+ reg-names = "stmmaceth";
+ interrupts-extended = <&intc GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
+ <&exti 68 1>;
+ interrupt-names = "macirq", "eth_wake_irq";
+ clock-names = "stmmaceth",
+ "mac-clk-tx",
+ "mac-clk-rx",
+ "ethstp",
+ "eth-ck";
+ clocks = <&rcc ETH1MAC>,
+ <&rcc ETH1TX>,
+ <&rcc ETH1RX>,
+ <&rcc ETH1STP>,
+ <&rcc ETH1CK_K>;
+ st,syscon = <&syscfg 0x4 0xff0000>;
+ snps,mixed-burst;
+ snps,pbl = <2>;
+ snps,axi-config = <&stmmac_axi_config_1>;
+ snps,tso;
+ access-controllers = <&etzpc 48>;
+ status = "disabled";
+
+ stmmac_axi_config_1: stmmac-axi-config {
+ snps,wr_osr_lmt = <0x7>;
+ snps,rd_osr_lmt = <0x7>;
+ snps,blen = <0 0 0 0 16 8 4>;
+ };
+ };
+
usbphyc: usbphyc@5a006000 {
#address-cells = <1>;
#size-cells = <0>;
diff --git a/arch/arm/boot/dts/st/stm32mp133.dtsi b/arch/arm/boot/dts/st/stm32mp133.dtsi
index 3e394c8e58b92..09c7da1a2eda8 100644
--- a/arch/arm/boot/dts/st/stm32mp133.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp133.dtsi
@@ -67,5 +67,36 @@ channel@18 {
label = "vrefint";
};
};
+
+ ethernet2: ethernet@5800e000 {
+ compatible = "st,stm32mp13-dwmac", "snps,dwmac-4.20a";
+ reg = <0x5800e000 0x2000>;
+ reg-names = "stmmaceth";
+ interrupts-extended = <&intc GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq";
+ clock-names = "stmmaceth",
+ "mac-clk-tx",
+ "mac-clk-rx",
+ "ethstp",
+ "eth-ck";
+ clocks = <&rcc ETH2MAC>,
+ <&rcc ETH2TX>,
+ <&rcc ETH2RX>,
+ <&rcc ETH2STP>,
+ <&rcc ETH2CK_K>;
+ st,syscon = <&syscfg 0x4 0xff000000>;
+ snps,mixed-burst;
+ snps,pbl = <2>;
+ snps,axi-config = <&stmmac_axi_config_2>;
+ snps,tso;
+ access-controllers = <&etzpc 49>;
+ status = "disabled";
+
+ stmmac_axi_config_2: stmmac-axi-config {
+ snps,wr_osr_lmt = <0x7>;
+ snps,rd_osr_lmt = <0x7>;
+ snps,blen = <0 0 0 0 16 8 4>;
+ };
+ };
};
};
--
2.25.1

2024-06-04 18:04:14

by Marek Vasut

Subject: Re: [PATCH v4 08/11] ARM: dts: stm32: add ethernet1 and ethernet2 support on stm32mp13

On 6/4/24 4:34 PM, Christophe Roullier wrote:
> Both instances ethernet based on GMAC SNPS IP on stm32mp13.
> GMAC IP version is SNPS 4.20.
>
> Signed-off-by: Christophe Roullier <[email protected]>
> ---
> arch/arm/boot/dts/st/stm32mp131.dtsi | 38 ++++++++++++++++++++++++++++
> arch/arm/boot/dts/st/stm32mp133.dtsi | 31 +++++++++++++++++++++++
> 2 files changed, 69 insertions(+)
>
> diff --git a/arch/arm/boot/dts/st/stm32mp131.dtsi b/arch/arm/boot/dts/st/stm32mp131.dtsi
> index 6704ceef284d3..9d05853ececf7 100644
> --- a/arch/arm/boot/dts/st/stm32mp131.dtsi
> +++ b/arch/arm/boot/dts/st/stm32mp131.dtsi
> @@ -979,6 +979,12 @@ ts_cal1: calib@5c {
> ts_cal2: calib@5e {
> reg = <0x5e 0x2>;
> };
> + ethernet_mac1_address: mac1@e4 {
> + reg = <0xe4 0x6>;
> + };
> + ethernet_mac2_address: mac2@ea {
> + reg = <0xea 0x6>;
> + };
> };
>
> etzpc: bus@5c007000 {
> @@ -1505,6 +1511,38 @@ sdmmc2: mmc@58007000 {
> status = "disabled";
> };
>
> + ethernet1: ethernet@5800a000 {
> + compatible = "st,stm32mp13-dwmac", "snps,dwmac-4.20a";
> + reg = <0x5800a000 0x2000>;
> + reg-names = "stmmaceth";
> + interrupts-extended = <&intc GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
> + <&exti 68 1>;
> + interrupt-names = "macirq", "eth_wake_irq";
> + clock-names = "stmmaceth",
> + "mac-clk-tx",
> + "mac-clk-rx",
> + "ethstp",
> + "eth-ck";
> + clocks = <&rcc ETH1MAC>,
> + <&rcc ETH1TX>,
> + <&rcc ETH1RX>,
> + <&rcc ETH1STP>,
> + <&rcc ETH1CK_K>;
> + st,syscon = <&syscfg 0x4 0xff0000>;
> + snps,mixed-burst;
> + snps,pbl = <2>;
> + snps,axi-config = <&stmmac_axi_config_1>;
> + snps,tso;
> + access-controllers = <&etzpc 48>;

Please keep the list of properties sorted.

> + status = "disabled";
> +
> + stmmac_axi_config_1: stmmac-axi-config {
> + snps,wr_osr_lmt = <0x7>;
> + snps,rd_osr_lmt = <0x7>;
> + snps,blen = <0 0 0 0 16 8 4>;

Sort here too.

> + };
> + };
> +
> usbphyc: usbphyc@5a006000 {
> #address-cells = <1>;
> #size-cells = <0>;
> diff --git a/arch/arm/boot/dts/st/stm32mp133.dtsi b/arch/arm/boot/dts/st/stm32mp133.dtsi
> index 3e394c8e58b92..09c7da1a2eda8 100644
> --- a/arch/arm/boot/dts/st/stm32mp133.dtsi
> +++ b/arch/arm/boot/dts/st/stm32mp133.dtsi
> @@ -67,5 +67,36 @@ channel@18 {
> label = "vrefint";
> };
> };
> +
> + ethernet2: ethernet@5800e000 {
> + compatible = "st,stm32mp13-dwmac", "snps,dwmac-4.20a";
> + reg = <0x5800e000 0x2000>;
> + reg-names = "stmmaceth";
> + interrupts-extended = <&intc GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "macirq";
> + clock-names = "stmmaceth",
> + "mac-clk-tx",
> + "mac-clk-rx",
> + "ethstp",
> + "eth-ck";
> + clocks = <&rcc ETH2MAC>,
> + <&rcc ETH2TX>,
> + <&rcc ETH2RX>,
> + <&rcc ETH2STP>,
> + <&rcc ETH2CK_K>;
> + st,syscon = <&syscfg 0x4 0xff000000>;
> + snps,mixed-burst;
> + snps,pbl = <2>;
> + snps,axi-config = <&stmmac_axi_config_2>;
> + snps,tso;
> + access-controllers = <&etzpc 49>;

Sort here too.

> + status = "disabled";
> +
> + stmmac_axi_config_2: stmmac-axi-config {
> + snps,wr_osr_lmt = <0x7>;
> + snps,rd_osr_lmt = <0x7>;
> + snps,blen = <0 0 0 0 16 8 4>;

Sort here too.

[...]

2024-06-07 09:20:37

by Christophe Roullier

Subject: Re: [PATCH v4 08/11] ARM: dts: stm32: add ethernet1 and ethernet2 support on stm32mp13

Hi

On 6/4/24 18:49, Marek Vasut wrote:
> On 6/4/24 4:34 PM, Christophe Roullier wrote:
>> Both instances ethernet based on GMAC SNPS IP on stm32mp13.
>> GMAC IP version is SNPS 4.20.
>>
>> Signed-off-by: Christophe Roullier <[email protected]>
>> ---
>>   arch/arm/boot/dts/st/stm32mp131.dtsi | 38 ++++++++++++++++++++++++++++
>>   arch/arm/boot/dts/st/stm32mp133.dtsi | 31 +++++++++++++++++++++++
>>   2 files changed, 69 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/st/stm32mp131.dtsi
>> b/arch/arm/boot/dts/st/stm32mp131.dtsi
>> index 6704ceef284d3..9d05853ececf7 100644
>> --- a/arch/arm/boot/dts/st/stm32mp131.dtsi
>> +++ b/arch/arm/boot/dts/st/stm32mp131.dtsi
>> @@ -979,6 +979,12 @@ ts_cal1: calib@5c {
>>               ts_cal2: calib@5e {
>>                   reg = <0x5e 0x2>;
>>               };
>> +            ethernet_mac1_address: mac1@e4 {
>> +                reg = <0xe4 0x6>;
>> +            };
>> +            ethernet_mac2_address: mac2@ea {
>> +                reg = <0xea 0x6>;
>> +            };
>>           };
>>             etzpc: bus@5c007000 {
>> @@ -1505,6 +1511,38 @@ sdmmc2: mmc@58007000 {
>>                   status = "disabled";
>>               };
>>   +            ethernet1: ethernet@5800a000 {
>> +                compatible = "st,stm32mp13-dwmac", "snps,dwmac-4.20a";
>> +                reg = <0x5800a000 0x2000>;
>> +                reg-names = "stmmaceth";
>> +                interrupts-extended = <&intc GIC_SPI 62
>> IRQ_TYPE_LEVEL_HIGH>,
>> +                              <&exti 68 1>;
>> +                interrupt-names = "macirq", "eth_wake_irq";
>> +                clock-names = "stmmaceth",
>> +                          "mac-clk-tx",
>> +                          "mac-clk-rx",
>> +                          "ethstp",
>> +                          "eth-ck";
>> +                clocks = <&rcc ETH1MAC>,
>> +                     <&rcc ETH1TX>,
>> +                     <&rcc ETH1RX>,
>> +                     <&rcc ETH1STP>,
>> +                     <&rcc ETH1CK_K>;
>> +                st,syscon = <&syscfg 0x4 0xff0000>;
>> +                snps,mixed-burst;
>> +                snps,pbl = <2>;
>> +                snps,axi-config = <&stmmac_axi_config_1>;
>> +                snps,tso;
>> +                access-controllers = <&etzpc 48>;
>
> Please keep the list of properties sorted.
>
To be coherent with all other IP, I will keep "access-controllers"
property just before "status" property.
>> +                status = "disabled";
>> +
>> +                stmmac_axi_config_1: stmmac-axi-config {
>> +                    snps,wr_osr_lmt = <0x7>;
>> +                    snps,rd_osr_lmt = <0x7>;
>> +                    snps,blen = <0 0 0 0 16 8 4>;
>
> Sort here too.
ok
>
>> +                };
>> +            };
>> +
>>               usbphyc: usbphyc@5a006000 {
>>                   #address-cells = <1>;
>>                   #size-cells = <0>;
>> diff --git a/arch/arm/boot/dts/st/stm32mp133.dtsi
>> b/arch/arm/boot/dts/st/stm32mp133.dtsi
>> index 3e394c8e58b92..09c7da1a2eda8 100644
>> --- a/arch/arm/boot/dts/st/stm32mp133.dtsi
>> +++ b/arch/arm/boot/dts/st/stm32mp133.dtsi
>> @@ -67,5 +67,36 @@ channel@18 {
>>                   label = "vrefint";
>>               };
>>           };
>> +
>> +        ethernet2: ethernet@5800e000 {
>> +            compatible = "st,stm32mp13-dwmac", "snps,dwmac-4.20a";
>> +            reg = <0x5800e000 0x2000>;
>> +            reg-names = "stmmaceth";
>> +            interrupts-extended = <&intc GIC_SPI 97
>> IRQ_TYPE_LEVEL_HIGH>;
>> +            interrupt-names = "macirq";
>> +            clock-names = "stmmaceth",
>> +                      "mac-clk-tx",
>> +                      "mac-clk-rx",
>> +                      "ethstp",
>> +                      "eth-ck";
>> +            clocks = <&rcc ETH2MAC>,
>> +                 <&rcc ETH2TX>,
>> +                 <&rcc ETH2RX>,
>> +                 <&rcc ETH2STP>,
>> +                 <&rcc ETH2CK_K>;
>> +            st,syscon = <&syscfg 0x4 0xff000000>;
>> +            snps,mixed-burst;
>> +            snps,pbl = <2>;
>> +            snps,axi-config = <&stmmac_axi_config_2>;
>> +            snps,tso;
>> +            access-controllers = <&etzpc 49>;
>
> Sort here too.
>
>> +            status = "disabled";
>> +
>> +            stmmac_axi_config_2: stmmac-axi-config {
>> +                snps,wr_osr_lmt = <0x7>;
>> +                snps,rd_osr_lmt = <0x7>;
>> +                snps,blen = <0 0 0 0 16 8 4>;
>
> Sort here too.
>
> [...]