The goal is to have slim entries for *new* entries and to have a
flexible macro to specify the flash ID and get rid of the former
INFOx() macros with the hardcoded ID length.
Here is are some examples how an entry of flash_info will look like
after the conversion:
{
.id = SNOR_ID(0xef, 0x80, 0x20),
.name = "w25q512nwm",
.otp = SNOR_OTP(256, 3, 0x1000, 0x1000),
}
{
.id = SNOR_ID(0x01, 0x02, 0x19, 0x4d, 0x00, 0x80),
.name = "s25fl256s0",
.size = SZ_32M,
.sector_size = SZ_256K,
.no_sfdp_flags = SPI_NOR_SKIP_SFDP | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
.mfr_flags = USE_CLSR,
}
Please note that the second entry might even be slimmed down if the
flash supports SFDP, which is very likely. But apart from one
exception, this patchset shouldn't change any information in the
flash_info database.
The exception is the removal of very old SPI EEPROMs and a Fujitsu MRAM.
Both should use the at25 EEPROM driver. The latter even has device tree
bindings for the at25 driver.
To make the entries as slim as possible, we introduce sane default
values so the actual flash_info entries, doesn't need to specify them.
This mostly applies to old non-SFDP flashes anyway.
Patches 01-02 remove the old catalyst EEPROMs and the Fujitsu MRAM.
Patches 03-16 are preparation patches to either convert properties
(like .n_sectors) or to make properties optional. These patches will
also modify the old INFOx() macros. This is important because with this
we can actually make sure, the conversion doesn't have any unwanted
changes. We can compare the .rodata segment before and after the
conversion to make sure, there are no mistakes in the patches, because
they are impossible to review.
To make sure there are no changes you can compare the output of
objdump -j.rodata -s drivers/mtd/spi-nor/built-in.a
(or individual objects like drivers/mtd/spi-nor/winbond.o) before and
after the conversion, that is before patch 17 and after patch 30.
FWIW, before the conversion it was impossible to use coccinelle, eg.
"spatch --parse-c winbond.c" flagged almost all lines in the flash_info
structure as bad.
Now after the conversion is completed, patches 31-39 sort the
entries by their IDs.
Patch 40 removes a duplicate entry in atmel which surfaced during the
sorting.
Patch 41 then finally removes the old INFOx() macros.
Signed-off-by: Michael Walle <[email protected]>
---
Michael Walle (41):
mtd: spi-nor: remove catalyst 'flashes'
mtd: spi-nor: remove Fujitsu MB85RS1MT support
mtd: spi-nor: xilinx: use SPI_NOR_ID() in S3AN_INFO()
mtd: spi-nor: xilinx: remove addr_nbytes from S3AN_INFO()
mtd: spi-nor: convert .n_sectors to .size
mtd: spi-nor: default page_size to 256 bytes
mtd: spi-nor: store .n_banks in struct spi_nor_flash_parameter
mtd: spi-nor: default .n_banks to 1
mtd: spi-nor: push 4k SE handling into spi_nor_select_uniform_erase()
mtd: spi-nor: make sector_size optional
mtd: spi-nor: drop .parse_sfdp
mtd: spi-nor: introduce (temporary) INFO0()
mtd: spi-nor: move the .id and .id_len into an own structure
mtd: spi-nor: rename .otp_org to .otp and make it a pointer
mtd: spi-nor: add SNOR_ID() and SNOR_OTP()
mtd: spi-nor: remove or move flash_info comments
mtd: spi-nor: atmel: convert flash_info to new format
mtd: spi-nor: eon: convert flash_info to new format
mtd: spi-nor: esmt: convert flash_info to new format
mtd: spi-nor: everspin: convert flash_info to new format
mtd: spi-nor: gigadevice: convert flash_info to new format
mtd: spi-nor: intel: convert flash_info to new format
mtd: spi-nor: issi: convert flash_info to new format
mtd: spi-nor: macronix: convert flash_info to new format
mtd: spi-nor: micron-st: convert flash_info to new format
mtd: spi-nor: spansion: convert flash_info to new format
mtd: spi-nor: sst: convert flash_info to new format
mtd: spi-nor: winbond: convert flash_info to new format
mtd: spi-nor: xilinx: use new macros in S3AN_INFO()
mtd: spi-nor: xmc: convert flash_info to new format
mtd: spi-nor: atmel: sort flash_info database
mtd: spi-nor: eon: sort flash_info database
mtd: spi-nor: gigadevice: sort flash_info database
mtd: spi-nor: issi: sort flash_info database
mtd: spi-nor: macronix: sort flash_info database
mtd: spi-nor: micron-st: sort flash_info database
mtd: spi-nor: spansion: sort flash_info database
mtd: spi-nor: sst: sort flash_info database
mtd: spi-nor: winbond: sort flash_info entries
mtd: spi-nor: atmel: drop duplicate entry
mtd: spi-nor: core: get rid of the INFOx() macros
drivers/mtd/spi-nor/atmel.c | 116 +++++++----
drivers/mtd/spi-nor/catalyst.c | 24 ---
drivers/mtd/spi-nor/core.c | 63 +++---
drivers/mtd/spi-nor/core.h | 136 ++++++-------
drivers/mtd/spi-nor/eon.c | 74 +++++--
drivers/mtd/spi-nor/esmt.c | 29 ++-
drivers/mtd/spi-nor/everspin.c | 34 +++-
drivers/mtd/spi-nor/fujitsu.c | 21 --
drivers/mtd/spi-nor/gigadevice.c | 82 ++++----
drivers/mtd/spi-nor/intel.c | 23 ++-
drivers/mtd/spi-nor/issi.c | 118 +++++++----
drivers/mtd/spi-nor/macronix.c | 220 ++++++++++++++-------
drivers/mtd/spi-nor/micron-st.c | 411 ++++++++++++++++++++++++++-------------
drivers/mtd/spi-nor/spansion.c | 389 ++++++++++++++++++++++--------------
drivers/mtd/spi-nor/sst.c | 156 +++++++++------
drivers/mtd/spi-nor/swp.c | 13 +-
drivers/mtd/spi-nor/sysfs.c | 6 +-
drivers/mtd/spi-nor/winbond.c | 286 +++++++++++++++++----------
drivers/mtd/spi-nor/xilinx.c | 32 ++-
drivers/mtd/spi-nor/xmc.c | 19 +-
20 files changed, 1387 insertions(+), 865 deletions(-)
---
base-commit: f7dc24b3413851109c4047b22997bd0d95ed52a2
change-id: 20230807-mtd-flash-info-db-rework-8a52d60f0023
.n_sectors is rarely used. In fact it is only used in swp.c and to
calculate the flash size in the core. The use in swp.c might be
converted to use the (largest) flash erase size. For now, we just
locally calculate the sector size.
Simplify the flash_info database and set the size of the flash directly.
This also let us use the SZ_x macros.
Signed-off-by: Michael Walle <[email protected]>
---
drivers/mtd/spi-nor/core.c | 2 +-
drivers/mtd/spi-nor/core.h | 8 ++++----
drivers/mtd/spi-nor/swp.c | 9 +++++----
drivers/mtd/spi-nor/xilinx.c | 4 ++--
4 files changed, 12 insertions(+), 11 deletions(-)
diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index a9ad55aab821..c504a5af4032 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -2998,7 +2998,7 @@ static void spi_nor_init_default_params(struct spi_nor *nor)
/* Set SPI NOR sizes. */
params->writesize = 1;
- params->size = (u64)info->sector_size * info->n_sectors;
+ params->size = info->size;
params->bank_size = params->size;
params->page_size = info->page_size;
diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
index dfc20a3296fb..12c35409493b 100644
--- a/drivers/mtd/spi-nor/core.h
+++ b/drivers/mtd/spi-nor/core.h
@@ -443,9 +443,9 @@ struct spi_nor_fixups {
* @id: the flash's ID bytes. The first three bytes are the
* JEDIC ID. JEDEC ID zero means "no ID" (mostly older chips).
* @id_len: the number of bytes of ID.
+ * @size: the size of the flash in bytes.
* @sector_size: the size listed here is what works with SPINOR_OP_SE, which
* isn't necessarily called a "sector" by the vendor.
- * @n_sectors: the number of sectors.
* @n_banks: the number of banks.
* @page_size: the flash's page size.
* @addr_nbytes: number of address bytes to send.
@@ -505,8 +505,8 @@ struct flash_info {
char *name;
u8 id[SPI_NOR_MAX_ID_LEN];
u8 id_len;
+ size_t size;
unsigned sector_size;
- u16 n_sectors;
u16 page_size;
u8 n_banks;
u8 addr_nbytes;
@@ -556,8 +556,8 @@ struct flash_info {
.id_len = 6
#define SPI_NOR_GEOMETRY(_sector_size, _n_sectors, _n_banks) \
+ .size = (_sector_size) * (_n_sectors), \
.sector_size = (_sector_size), \
- .n_sectors = (_n_sectors), \
.page_size = 256, \
.n_banks = (_n_banks)
@@ -575,8 +575,8 @@ struct flash_info {
SPI_NOR_GEOMETRY((_sector_size), (_n_sectors), 1),
#define CAT25_INFO(_sector_size, _n_sectors, _page_size, _addr_nbytes) \
+ .size = (_sector_size) * (_n_sectors), \
.sector_size = (_sector_size), \
- .n_sectors = (_n_sectors), \
.page_size = (_page_size), \
.n_banks = 1, \
.addr_nbytes = (_addr_nbytes), \
diff --git a/drivers/mtd/spi-nor/swp.c b/drivers/mtd/spi-nor/swp.c
index 5ab9d5324860..40bf52867095 100644
--- a/drivers/mtd/spi-nor/swp.c
+++ b/drivers/mtd/spi-nor/swp.c
@@ -34,17 +34,18 @@ static u8 spi_nor_get_sr_tb_mask(struct spi_nor *nor)
static u64 spi_nor_get_min_prot_length_sr(struct spi_nor *nor)
{
unsigned int bp_slots, bp_slots_needed;
+ unsigned int sector_size = nor->info->sector_size;
+ u64 n_sectors = div_u64(nor->params->size, sector_size);
u8 mask = spi_nor_get_sr_bp_mask(nor);
/* Reserved one for "protect none" and one for "protect all". */
bp_slots = (1 << hweight8(mask)) - 2;
- bp_slots_needed = ilog2(nor->info->n_sectors);
+ bp_slots_needed = ilog2(n_sectors);
if (bp_slots_needed > bp_slots)
- return nor->info->sector_size <<
- (bp_slots_needed - bp_slots);
+ return sector_size << (bp_slots_needed - bp_slots);
else
- return nor->info->sector_size;
+ return sector_size;
}
static void spi_nor_get_locked_range_sr(struct spi_nor *nor, u8 sr, loff_t *ofs,
diff --git a/drivers/mtd/spi-nor/xilinx.c b/drivers/mtd/spi-nor/xilinx.c
index 34267591282c..284e2e4970ab 100644
--- a/drivers/mtd/spi-nor/xilinx.c
+++ b/drivers/mtd/spi-nor/xilinx.c
@@ -23,8 +23,8 @@
#define S3AN_INFO(_jedec_id, _n_sectors, _page_size) \
SPI_NOR_ID(_jedec_id, 0), \
+ .size = 8 * (_page_size) * (_n_sectors), \
.sector_size = (8 * (_page_size)), \
- .n_sectors = (_n_sectors), \
.page_size = (_page_size), \
.n_banks = 1, \
.flags = SPI_NOR_NO_FR
@@ -138,7 +138,7 @@ static int xilinx_nor_setup(struct spi_nor *nor,
page_size = (nor->params->page_size == 264) ? 256 : 512;
nor->params->page_size = page_size;
nor->mtd.writebufsize = page_size;
- nor->params->size = 8 * page_size * nor->info->n_sectors;
+ nor->params->size = nor->info->size;
nor->mtd.erasesize = 8 * page_size;
} else {
/* Flash in Default addressing mode */
--
2.39.2
The Atmel AT26DF321 and AT25DF321 have the same ID. Both were just
discovered by reading their IDs, that is, there is no probing by name.
Thus only the first one in the list was ever probed. The AT25DF is the
newer series. Drop the older one.
Signed-off-by: Michael Walle <[email protected]>
---
drivers/mtd/spi-nor/atmel.c | 7 -------
1 file changed, 7 deletions(-)
diff --git a/drivers/mtd/spi-nor/atmel.c b/drivers/mtd/spi-nor/atmel.c
index 18e904962d0e..95f0e139284e 100644
--- a/drivers/mtd/spi-nor/atmel.c
+++ b/drivers/mtd/spi-nor/atmel.c
@@ -206,13 +206,6 @@ static const struct flash_info atmel_nor_parts[] = {
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE,
.no_sfdp_flags = SECT_4K,
.fixups = &atmel_nor_global_protection_fixups
- }, {
- .id = SNOR_ID(0x1f, 0x47, 0x00),
- .name = "at26df321",
- .size = SZ_4M,
- .flags = SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE,
- .no_sfdp_flags = SECT_4K,
- .fixups = &atmel_nor_global_protection_fixups
}, {
.id = SNOR_ID(0x1f, 0x47, 0x01),
.name = "at25df321a",
--
2.39.2
The default value of addr_nbytes is already 3. Drop it.
Signed-off-by: Michael Walle <[email protected]>
---
drivers/mtd/spi-nor/xilinx.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/mtd/spi-nor/xilinx.c b/drivers/mtd/spi-nor/xilinx.c
index de5189c38432..34267591282c 100644
--- a/drivers/mtd/spi-nor/xilinx.c
+++ b/drivers/mtd/spi-nor/xilinx.c
@@ -27,7 +27,6 @@
.n_sectors = (_n_sectors), \
.page_size = (_page_size), \
.n_banks = 1, \
- .addr_nbytes = 3, \
.flags = SPI_NOR_NO_FR
/* Xilinx S3AN share MFR with Atmel SPI NOR */
--
2.39.2
The INFOx() macros are going away. Convert the flash_info database to
the new format.
Signed-off-by: Michael Walle <[email protected]>
---
drivers/mtd/spi-nor/sst.c | 155 ++++++++++++++++++++++++++++++----------------
1 file changed, 100 insertions(+), 55 deletions(-)
diff --git a/drivers/mtd/spi-nor/sst.c b/drivers/mtd/spi-nor/sst.c
index 42e29441a7f7..8defff00c35f 100644
--- a/drivers/mtd/spi-nor/sst.c
+++ b/drivers/mtd/spi-nor/sst.c
@@ -61,61 +61,106 @@ static const struct spi_nor_fixups sst26vf_nor_fixups = {
};
static const struct flash_info sst_nor_parts[] = {
- { "sst25vf040b", INFO(0xbf258d, 0, 64 * 1024, 8)
- FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE)
- NO_SFDP_FLAGS(SECT_4K)
- MFR_FLAGS(SST_WRITE) },
- { "sst25vf080b", INFO(0xbf258e, 0, 64 * 1024, 16)
- FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE)
- NO_SFDP_FLAGS(SECT_4K)
- MFR_FLAGS(SST_WRITE) },
- { "sst25vf016b", INFO(0xbf2541, 0, 64 * 1024, 32)
- FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE)
- NO_SFDP_FLAGS(SECT_4K)
- MFR_FLAGS(SST_WRITE) },
- { "sst25vf032b", INFO(0xbf254a, 0, 64 * 1024, 64)
- FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE)
- NO_SFDP_FLAGS(SECT_4K)
- MFR_FLAGS(SST_WRITE) },
- { "sst25vf064c", INFO(0xbf254b, 0, 64 * 1024, 128)
- FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_4BIT_BP |
- SPI_NOR_SWP_IS_VOLATILE)
- NO_SFDP_FLAGS(SECT_4K) },
- { "sst25wf512", INFO(0xbf2501, 0, 64 * 1024, 1)
- FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE)
- NO_SFDP_FLAGS(SECT_4K)
- MFR_FLAGS(SST_WRITE) },
- { "sst25wf010", INFO(0xbf2502, 0, 64 * 1024, 2)
- FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE)
- NO_SFDP_FLAGS(SECT_4K)
- MFR_FLAGS(SST_WRITE) },
- { "sst25wf020", INFO(0xbf2503, 0, 64 * 1024, 4)
- FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE)
- NO_SFDP_FLAGS(SECT_4K)
- MFR_FLAGS(SST_WRITE) },
- { "sst25wf020a", INFO(0x621612, 0, 64 * 1024, 4)
- FLAGS(SPI_NOR_HAS_LOCK)
- NO_SFDP_FLAGS(SECT_4K) },
- { "sst25wf040b", INFO(0x621613, 0, 64 * 1024, 8)
- FLAGS(SPI_NOR_HAS_LOCK)
- NO_SFDP_FLAGS(SECT_4K) },
- { "sst25wf040", INFO(0xbf2504, 0, 64 * 1024, 8)
- FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE)
- NO_SFDP_FLAGS(SECT_4K)
- MFR_FLAGS(SST_WRITE) },
- { "sst25wf080", INFO(0xbf2505, 0, 64 * 1024, 16)
- FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE)
- NO_SFDP_FLAGS(SECT_4K)
- MFR_FLAGS(SST_WRITE) },
- { "sst26wf016b", INFO(0xbf2651, 0, 64 * 1024, 32)
- NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
- SPI_NOR_QUAD_READ) },
- { "sst26vf016b", INFO(0xbf2641, 0, 64 * 1024, 32)
- NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ) },
- { "sst26vf064b", INFO(0xbf2643, 0, 64 * 1024, 128)
- FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE)
- NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
- .fixups = &sst26vf_nor_fixups },
+ {
+ .id = SNOR_ID(0xbf, 0x25, 0x8d),
+ .name = "sst25vf040b",
+ .size = SZ_512K,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE,
+ .no_sfdp_flags = SECT_4K,
+ .mfr_flags = SST_WRITE,
+ }, {
+ .id = SNOR_ID(0xbf, 0x25, 0x8e),
+ .name = "sst25vf080b",
+ .size = SZ_1M,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE,
+ .no_sfdp_flags = SECT_4K,
+ .mfr_flags = SST_WRITE,
+ }, {
+ .id = SNOR_ID(0xbf, 0x25, 0x41),
+ .name = "sst25vf016b",
+ .size = SZ_2M,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE,
+ .no_sfdp_flags = SECT_4K,
+ .mfr_flags = SST_WRITE,
+ }, {
+ .id = SNOR_ID(0xbf, 0x25, 0x4a),
+ .name = "sst25vf032b",
+ .size = SZ_4M,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE,
+ .no_sfdp_flags = SECT_4K,
+ .mfr_flags = SST_WRITE,
+ }, {
+ .id = SNOR_ID(0xbf, 0x25, 0x4b),
+ .name = "sst25vf064c",
+ .size = SZ_8M,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_4BIT_BP | SPI_NOR_SWP_IS_VOLATILE,
+ .no_sfdp_flags = SECT_4K,
+ }, {
+ .id = SNOR_ID(0xbf, 0x25, 0x01),
+ .name = "sst25wf512",
+ .size = SZ_64K,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE,
+ .no_sfdp_flags = SECT_4K,
+ .mfr_flags = SST_WRITE,
+ }, {
+ .id = SNOR_ID(0xbf, 0x25, 0x02),
+ .name = "sst25wf010",
+ .size = SZ_128K,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE,
+ .no_sfdp_flags = SECT_4K,
+ .mfr_flags = SST_WRITE,
+ }, {
+ .id = SNOR_ID(0xbf, 0x25, 0x03),
+ .name = "sst25wf020",
+ .size = SZ_256K,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE,
+ .no_sfdp_flags = SECT_4K,
+ .mfr_flags = SST_WRITE,
+ }, {
+ .id = SNOR_ID(0x62, 0x16, 0x12),
+ .name = "sst25wf020a",
+ .size = SZ_256K,
+ .flags = SPI_NOR_HAS_LOCK,
+ .no_sfdp_flags = SECT_4K,
+ }, {
+ .id = SNOR_ID(0x62, 0x16, 0x13),
+ .name = "sst25wf040b",
+ .size = SZ_512K,
+ .flags = SPI_NOR_HAS_LOCK,
+ .no_sfdp_flags = SECT_4K,
+ }, {
+ .id = SNOR_ID(0xbf, 0x25, 0x04),
+ .name = "sst25wf040",
+ .size = SZ_512K,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE,
+ .no_sfdp_flags = SECT_4K,
+ .mfr_flags = SST_WRITE,
+ }, {
+ .id = SNOR_ID(0xbf, 0x25, 0x05),
+ .name = "sst25wf080",
+ .size = SZ_1M,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE,
+ .no_sfdp_flags = SECT_4K,
+ .mfr_flags = SST_WRITE,
+ }, {
+ .id = SNOR_ID(0xbf, 0x26, 0x51),
+ .name = "sst26wf016b",
+ .size = SZ_2M,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ }, {
+ .id = SNOR_ID(0xbf, 0x26, 0x41),
+ .name = "sst26vf016b",
+ .size = SZ_2M,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ,
+ }, {
+ .id = SNOR_ID(0xbf, 0x26, 0x43),
+ .name = "sst26vf064b",
+ .size = SZ_8M,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ .fixups = &sst26vf_nor_fixups,
+ }
};
static int sst_nor_write(struct mtd_info *mtd, loff_t to, size_t len,
--
2.39.2
The INFOx() macros are going away. Convert the flash_info database to
the new format.
Signed-off-by: Michael Walle <[email protected]>
---
drivers/mtd/spi-nor/spansion.c | 370 +++++++++++++++++++++++++++--------------
1 file changed, 241 insertions(+), 129 deletions(-)
diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c
index 1a1d2368c462..5953df6aff93 100644
--- a/drivers/mtd/spi-nor/spansion.c
+++ b/drivers/mtd/spi-nor/spansion.c
@@ -756,140 +756,252 @@ static const struct spi_nor_fixups s25fs_s_nor_fixups = {
};
static const struct flash_info spansion_nor_parts[] = {
- { "s25sl032p", INFO(0x010215, 0x4d00, 64 * 1024, 64)
- NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
- { "s25sl064p", INFO(0x010216, 0x4d00, 64 * 1024, 128)
- NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
- { "s25fl128s0", INFO6(0x012018, 0x4d0080, 256 * 1024, 64)
- NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
- MFR_FLAGS(USE_CLSR)
- },
- { "s25fl128s1", INFO6(0x012018, 0x4d0180, 64 * 1024, 256)
- NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
- MFR_FLAGS(USE_CLSR)
- },
- { "s25fl256s0", INFO6(0x010219, 0x4d0080, 256 * 1024, 128)
- NO_SFDP_FLAGS(SPI_NOR_SKIP_SFDP | SPI_NOR_DUAL_READ |
- SPI_NOR_QUAD_READ)
- MFR_FLAGS(USE_CLSR)
- },
- { "s25fl256s1", INFO6(0x010219, 0x4d0180, 64 * 1024, 512)
- NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
- MFR_FLAGS(USE_CLSR)
- },
- { "s25fl512s", INFO6(0x010220, 0x4d0080, 256 * 1024, 256)
- FLAGS(SPI_NOR_HAS_LOCK)
- NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
- MFR_FLAGS(USE_CLSR)
- },
- { "s25fs128s1", INFO6(0x012018, 0x4d0181, 64 * 1024, 256)
- NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
- MFR_FLAGS(USE_CLSR)
- .fixups = &s25fs_s_nor_fixups, },
- { "s25fs256s0", INFO6(0x010219, 0x4d0081, 256 * 1024, 128)
- NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
- MFR_FLAGS(USE_CLSR)
- },
- { "s25fs256s1", INFO6(0x010219, 0x4d0181, 64 * 1024, 512)
- NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
- MFR_FLAGS(USE_CLSR)
- },
- { "s25fs512s", INFO6(0x010220, 0x4d0081, 256 * 1024, 256)
- NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
- MFR_FLAGS(USE_CLSR)
- .fixups = &s25fs_s_nor_fixups, },
- { "s25sl12800", INFO(0x012018, 0x0300, 256 * 1024, 64) },
- { "s25sl12801", INFO(0x012018, 0x0301, 64 * 1024, 256) },
- { "s25fl129p0", INFO(0x012018, 0x4d00, 256 * 1024, 64)
- NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
- MFR_FLAGS(USE_CLSR)
- },
- { "s25fl129p1", INFO(0x012018, 0x4d01, 64 * 1024, 256)
- NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
- MFR_FLAGS(USE_CLSR)
- },
- { "s25sl004a", INFO(0x010212, 0, 64 * 1024, 8) },
- { "s25sl008a", INFO(0x010213, 0, 64 * 1024, 16) },
- { "s25sl016a", INFO(0x010214, 0, 64 * 1024, 32) },
- { "s25sl032a", INFO(0x010215, 0, 64 * 1024, 64) },
- { "s25sl064a", INFO(0x010216, 0, 64 * 1024, 128) },
- { "s25fl004k", INFO(0xef4013, 0, 64 * 1024, 8)
- NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
- SPI_NOR_QUAD_READ) },
- { "s25fl008k", INFO(0xef4014, 0, 64 * 1024, 16)
- NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
- SPI_NOR_QUAD_READ) },
- { "s25fl016k", INFO(0xef4015, 0, 64 * 1024, 32)
- NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
- SPI_NOR_QUAD_READ) },
- { "s25fl064k", INFO(0xef4017, 0, 64 * 1024, 128)
- NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
- SPI_NOR_QUAD_READ) },
- { "s25fl116k", INFO(0x014015, 0, 64 * 1024, 32)
- NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
- SPI_NOR_QUAD_READ) },
- { "s25fl132k", INFO(0x014016, 0, 64 * 1024, 64)
- NO_SFDP_FLAGS(SECT_4K) },
- { "s25fl164k", INFO(0x014017, 0, 64 * 1024, 128)
- NO_SFDP_FLAGS(SECT_4K) },
- { "s25fl204k", INFO(0x014013, 0, 64 * 1024, 8)
- NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ) },
- { "s25fl208k", INFO(0x014014, 0, 64 * 1024, 16)
- NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ) },
- { "s25fl064l", INFO(0x016017, 0, 64 * 1024, 128)
- NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
- FIXUP_FLAGS(SPI_NOR_4B_OPCODES) },
- { "s25fl128l", INFO(0x016018, 0, 64 * 1024, 256)
- NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
- FIXUP_FLAGS(SPI_NOR_4B_OPCODES) },
- { "s25fl256l", INFO(0x016019, 0, 64 * 1024, 512)
- NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
- FIXUP_FLAGS(SPI_NOR_4B_OPCODES) },
- { "s25fs256t", INFO6(0x342b19, 0x0f0890, 0, 0)
- MFR_FLAGS(USE_CLPEF)
- .fixups = &s25fs256t_fixups },
- { "s25hl512t", INFO6(0x342a1a, 0x0f0390, 0, 0)
- MFR_FLAGS(USE_CLPEF)
- .fixups = &s25hx_t_fixups },
- { "s25hl01gt", INFO6(0x342a1b, 0x0f0390, 0, 0)
- MFR_FLAGS(USE_CLPEF)
- .fixups = &s25hx_t_fixups },
- { "s25hl02gt", INFO6(0x342a1c, 0x0f0090, 0, 0)
- MFR_FLAGS(USE_CLPEF)
- FLAGS(NO_CHIP_ERASE)
- .fixups = &s25hx_t_fixups },
- { "s25hs512t", INFO6(0x342b1a, 0x0f0390, 0, 0)
- MFR_FLAGS(USE_CLPEF)
- .fixups = &s25hx_t_fixups },
- { "s25hs01gt", INFO6(0x342b1b, 0x0f0390, 0, 0)
- MFR_FLAGS(USE_CLPEF)
- .fixups = &s25hx_t_fixups },
- { "s25hs02gt", INFO6(0x342b1c, 0x0f0090, 0, 0)
- MFR_FLAGS(USE_CLPEF)
- FLAGS(NO_CHIP_ERASE)
- .fixups = &s25hx_t_fixups },
- { "cy15x104q", INFO6(0x042cc2, 0x7f7f7f, 512 * 1024, 1)
- FLAGS(SPI_NOR_NO_ERASE) },
- { "s28hl512t", INFO(0x345a1a, 0, 0, 0)
- MFR_FLAGS(USE_CLPEF)
+ {
+ .id = SNOR_ID(0x01, 0x02, 0x15, 0x4d, 0x00),
+ .name = "s25sl032p",
+ .size = SZ_4M,
+ .no_sfdp_flags = SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ }, {
+ .id = SNOR_ID(0x01, 0x02, 0x16, 0x4d, 0x00),
+ .name = "s25sl064p",
+ .size = SZ_8M,
+ .no_sfdp_flags = SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ }, {
+ .id = SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x00, 0x80),
+ .name = "s25fl128s0",
+ .size = SZ_16M,
+ .sector_size = SZ_256K,
+ .no_sfdp_flags = SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ .mfr_flags = USE_CLSR,
+ }, {
+ .id = SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x01, 0x80),
+ .name = "s25fl128s1",
+ .size = SZ_16M,
+ .no_sfdp_flags = SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ .mfr_flags = USE_CLSR,
+ }, {
+ .id = SNOR_ID(0x01, 0x02, 0x19, 0x4d, 0x00, 0x80),
+ .name = "s25fl256s0",
+ .size = SZ_32M,
+ .sector_size = SZ_256K,
+ .no_sfdp_flags = SPI_NOR_SKIP_SFDP | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ .mfr_flags = USE_CLSR,
+ }, {
+ .id = SNOR_ID(0x01, 0x02, 0x19, 0x4d, 0x01, 0x80),
+ .name = "s25fl256s1",
+ .size = SZ_32M,
+ .no_sfdp_flags = SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ .mfr_flags = USE_CLSR,
+ }, {
+ .id = SNOR_ID(0x01, 0x02, 0x20, 0x4d, 0x00, 0x80),
+ .name = "s25fl512s",
+ .size = SZ_64M,
+ .sector_size = SZ_256K,
+ .flags = SPI_NOR_HAS_LOCK,
+ .no_sfdp_flags = SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ .mfr_flags = USE_CLSR,
+ }, {
+ .id = SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x01, 0x81),
+ .name = "s25fs128s1",
+ .size = SZ_16M,
+ .no_sfdp_flags = SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ .mfr_flags = USE_CLSR,
+ .fixups = &s25fs_s_nor_fixups,
+ }, {
+ .id = SNOR_ID(0x01, 0x02, 0x19, 0x4d, 0x00, 0x81),
+ .name = "s25fs256s0",
+ .size = SZ_32M,
+ .sector_size = SZ_256K,
+ .no_sfdp_flags = SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ .mfr_flags = USE_CLSR,
+ }, {
+ .id = SNOR_ID(0x01, 0x02, 0x19, 0x4d, 0x01, 0x81),
+ .name = "s25fs256s1",
+ .size = SZ_32M,
+ .no_sfdp_flags = SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ .mfr_flags = USE_CLSR,
+ }, {
+ .id = SNOR_ID(0x01, 0x02, 0x20, 0x4d, 0x00, 0x81),
+ .name = "s25fs512s",
+ .size = SZ_64M,
+ .sector_size = SZ_256K,
+ .no_sfdp_flags = SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ .mfr_flags = USE_CLSR,
+ .fixups = &s25fs_s_nor_fixups,
+ }, {
+ .id = SNOR_ID(0x01, 0x20, 0x18, 0x03, 0x00),
+ .name = "s25sl12800",
+ .size = SZ_16M,
+ .sector_size = SZ_256K,
+ }, {
+ .id = SNOR_ID(0x01, 0x20, 0x18, 0x03, 0x01),
+ .name = "s25sl12801",
+ .size = SZ_16M,
+ }, {
+ .id = SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x00),
+ .name = "s25fl129p0",
+ .size = SZ_16M,
+ .sector_size = SZ_256K,
+ .no_sfdp_flags = SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ .mfr_flags = USE_CLSR,
+ }, {
+ .id = SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x01),
+ .name = "s25fl129p1",
+ .size = SZ_16M,
+ .no_sfdp_flags = SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ .mfr_flags = USE_CLSR,
+ }, {
+ .id = SNOR_ID(0x01, 0x02, 0x12),
+ .name = "s25sl004a",
+ .size = SZ_512K,
+ }, {
+ .id = SNOR_ID(0x01, 0x02, 0x13),
+ .name = "s25sl008a",
+ .size = SZ_1M,
+ }, {
+ .id = SNOR_ID(0x01, 0x02, 0x14),
+ .name = "s25sl016a",
+ .size = SZ_2M,
+ }, {
+ .id = SNOR_ID(0x01, 0x02, 0x15),
+ .name = "s25sl032a",
+ .size = SZ_4M,
+ }, {
+ .id = SNOR_ID(0x01, 0x02, 0x16),
+ .name = "s25sl064a",
+ .size = SZ_8M,
+ }, {
+ .id = SNOR_ID(0xef, 0x40, 0x13),
+ .name = "s25fl004k",
+ .size = SZ_512K,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ }, {
+ .id = SNOR_ID(0xef, 0x40, 0x14),
+ .name = "s25fl008k",
+ .size = SZ_1M,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ }, {
+ .id = SNOR_ID(0xef, 0x40, 0x15),
+ .name = "s25fl016k",
+ .size = SZ_2M,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ }, {
+ .id = SNOR_ID(0xef, 0x40, 0x17),
+ .name = "s25fl064k",
+ .size = SZ_8M,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ }, {
+ .id = SNOR_ID(0x01, 0x40, 0x15),
+ .name = "s25fl116k",
+ .size = SZ_2M,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ }, {
+ .id = SNOR_ID(0x01, 0x40, 0x16),
+ .name = "s25fl132k",
+ .size = SZ_4M,
+ .no_sfdp_flags = SECT_4K,
+ }, {
+ .id = SNOR_ID(0x01, 0x40, 0x17),
+ .name = "s25fl164k",
+ .size = SZ_8M,
+ .no_sfdp_flags = SECT_4K,
+ }, {
+ .id = SNOR_ID(0x01, 0x40, 0x13),
+ .name = "s25fl204k",
+ .size = SZ_512K,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ,
+ }, {
+ .id = SNOR_ID(0x01, 0x40, 0x14),
+ .name = "s25fl208k",
+ .size = SZ_1M,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ,
+ }, {
+ .id = SNOR_ID(0x01, 0x60, 0x17),
+ .name = "s25fl064l",
+ .size = SZ_8M,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ .fixup_flags = SPI_NOR_4B_OPCODES,
+ }, {
+ .id = SNOR_ID(0x01, 0x60, 0x18),
+ .name = "s25fl128l",
+ .size = SZ_16M,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ .fixup_flags = SPI_NOR_4B_OPCODES,
+ }, {
+ .id = SNOR_ID(0x01, 0x60, 0x19),
+ .name = "s25fl256l",
+ .size = SZ_32M,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ .fixup_flags = SPI_NOR_4B_OPCODES,
+ }, {
+ .id = SNOR_ID(0x34, 0x2b, 0x19, 0x0f, 0x08, 0x90),
+ .name = "s25fs256t",
+ .mfr_flags = USE_CLPEF,
+ .fixups = &s25fs256t_fixups
+ }, {
+ .id = SNOR_ID(0x34, 0x2a, 0x1a, 0x0f, 0x03, 0x90),
+ .name = "s25hl512t",
+ .mfr_flags = USE_CLPEF,
+ .fixups = &s25hx_t_fixups
+ }, {
+ .id = SNOR_ID(0x34, 0x2a, 0x1b, 0x0f, 0x03, 0x90),
+ .name = "s25hl01gt",
+ .mfr_flags = USE_CLPEF,
+ .fixups = &s25hx_t_fixups
+ }, {
+ .id = SNOR_ID(0x34, 0x2a, 0x1c, 0x0f, 0x00, 0x90),
+ .name = "s25hl02gt",
+ .mfr_flags = USE_CLPEF,
+ .flags = NO_CHIP_ERASE,
+ .fixups = &s25hx_t_fixups
+ }, {
+ .id = SNOR_ID(0x34, 0x2b, 0x1a, 0x0f, 0x03, 0x90),
+ .name = "s25hs512t",
+ .mfr_flags = USE_CLPEF,
+ .fixups = &s25hx_t_fixups
+ }, {
+ .id = SNOR_ID(0x34, 0x2b, 0x1b, 0x0f, 0x03, 0x90),
+ .name = "s25hs01gt",
+ .mfr_flags = USE_CLPEF,
+ .fixups = &s25hx_t_fixups
+ }, {
+ .id = SNOR_ID(0x34, 0x2b, 0x1c, 0x0f, 0x00, 0x90),
+ .name = "s25hs02gt",
+ .mfr_flags = USE_CLPEF,
+ .flags = NO_CHIP_ERASE,
+ .fixups = &s25hx_t_fixups
+ }, {
+ .id = SNOR_ID(0x04, 0x2c, 0xc2, 0x7f, 0x7f, 0x7f),
+ .name = "cy15x104q",
+ .size = SZ_512K,
+ .sector_size = SZ_512K,
+ .flags = SPI_NOR_NO_ERASE,
+ }, {
+ .id = SNOR_ID(0x34, 0x5a, 0x1a),
+ .name = "s28hl512t",
+ .mfr_flags = USE_CLPEF,
.fixups = &s28hx_t_fixups,
- },
- { "s28hl01gt", INFO(0x345a1b, 0, 0, 0)
- MFR_FLAGS(USE_CLPEF)
+ }, {
+ .id = SNOR_ID(0x34, 0x5a, 0x1b),
+ .name = "s28hl01gt",
+ .mfr_flags = USE_CLPEF,
.fixups = &s28hx_t_fixups,
- },
- { "s28hs512t", INFO(0x345b1a, 0, 0, 0)
- MFR_FLAGS(USE_CLPEF)
+ }, {
+ .id = SNOR_ID(0x34, 0x5b, 0x1a),
+ .name = "s28hs512t",
+ .mfr_flags = USE_CLPEF,
.fixups = &s28hx_t_fixups,
- },
- { "s28hs01gt", INFO(0x345b1b, 0, 0, 0)
- MFR_FLAGS(USE_CLPEF)
+ }, {
+ .id = SNOR_ID(0x34, 0x5b, 0x1b),
+ .name = "s28hs01gt",
+ .mfr_flags = USE_CLPEF,
.fixups = &s28hx_t_fixups,
- },
- { "s28hs02gt", INFO(0x345b1c, 0, 0, 0)
- MFR_FLAGS(USE_CLPEF)
+ }, {
+ .id = SNOR_ID(0x34, 0x5b, 0x1c),
+ .name = "s28hs02gt",
+ .mfr_flags = USE_CLPEF,
.fixups = &s28hx_t_fixups,
- },
+ }
};
/**
--
2.39.2
The flash ID is the new primary key into our database. Sort the entry by
it. Keep the most specific ones first, because there might be ID
collisions between shorter and longer ones.
Signed-off-by: Michael Walle <[email protected]>
---
drivers/mtd/spi-nor/spansion.c | 174 ++++++++++++++++++++---------------------
1 file changed, 87 insertions(+), 87 deletions(-)
diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c
index 5953df6aff93..fd2652aa6c1e 100644
--- a/drivers/mtd/spi-nor/spansion.c
+++ b/drivers/mtd/spi-nor/spansion.c
@@ -757,28 +757,35 @@ static const struct spi_nor_fixups s25fs_s_nor_fixups = {
static const struct flash_info spansion_nor_parts[] = {
{
+ .id = SNOR_ID(0x01, 0x02, 0x12),
+ .name = "s25sl004a",
+ .size = SZ_512K,
+ }, {
+ .id = SNOR_ID(0x01, 0x02, 0x13),
+ .name = "s25sl008a",
+ .size = SZ_1M,
+ }, {
+ .id = SNOR_ID(0x01, 0x02, 0x14),
+ .name = "s25sl016a",
+ .size = SZ_2M,
+ }, {
.id = SNOR_ID(0x01, 0x02, 0x15, 0x4d, 0x00),
.name = "s25sl032p",
.size = SZ_4M,
.no_sfdp_flags = SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ }, {
+ .id = SNOR_ID(0x01, 0x02, 0x15),
+ .name = "s25sl032a",
+ .size = SZ_4M,
}, {
.id = SNOR_ID(0x01, 0x02, 0x16, 0x4d, 0x00),
.name = "s25sl064p",
.size = SZ_8M,
.no_sfdp_flags = SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
}, {
- .id = SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x00, 0x80),
- .name = "s25fl128s0",
- .size = SZ_16M,
- .sector_size = SZ_256K,
- .no_sfdp_flags = SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
- .mfr_flags = USE_CLSR,
- }, {
- .id = SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x01, 0x80),
- .name = "s25fl128s1",
- .size = SZ_16M,
- .no_sfdp_flags = SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
- .mfr_flags = USE_CLSR,
+ .id = SNOR_ID(0x01, 0x02, 0x16),
+ .name = "s25sl064a",
+ .size = SZ_8M,
}, {
.id = SNOR_ID(0x01, 0x02, 0x19, 0x4d, 0x00, 0x80),
.name = "s25fl256s0",
@@ -787,31 +794,16 @@ static const struct flash_info spansion_nor_parts[] = {
.no_sfdp_flags = SPI_NOR_SKIP_SFDP | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
.mfr_flags = USE_CLSR,
}, {
- .id = SNOR_ID(0x01, 0x02, 0x19, 0x4d, 0x01, 0x80),
- .name = "s25fl256s1",
+ .id = SNOR_ID(0x01, 0x02, 0x19, 0x4d, 0x00, 0x81),
+ .name = "s25fs256s0",
.size = SZ_32M,
- .no_sfdp_flags = SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
- .mfr_flags = USE_CLSR,
- }, {
- .id = SNOR_ID(0x01, 0x02, 0x20, 0x4d, 0x00, 0x80),
- .name = "s25fl512s",
- .size = SZ_64M,
.sector_size = SZ_256K,
- .flags = SPI_NOR_HAS_LOCK,
.no_sfdp_flags = SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
.mfr_flags = USE_CLSR,
}, {
- .id = SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x01, 0x81),
- .name = "s25fs128s1",
- .size = SZ_16M,
- .no_sfdp_flags = SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
- .mfr_flags = USE_CLSR,
- .fixups = &s25fs_s_nor_fixups,
- }, {
- .id = SNOR_ID(0x01, 0x02, 0x19, 0x4d, 0x00, 0x81),
- .name = "s25fs256s0",
+ .id = SNOR_ID(0x01, 0x02, 0x19, 0x4d, 0x01, 0x80),
+ .name = "s25fl256s1",
.size = SZ_32M,
- .sector_size = SZ_256K,
.no_sfdp_flags = SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
.mfr_flags = USE_CLSR,
}, {
@@ -820,6 +812,14 @@ static const struct flash_info spansion_nor_parts[] = {
.size = SZ_32M,
.no_sfdp_flags = SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
.mfr_flags = USE_CLSR,
+ }, {
+ .id = SNOR_ID(0x01, 0x02, 0x20, 0x4d, 0x00, 0x80),
+ .name = "s25fl512s",
+ .size = SZ_64M,
+ .sector_size = SZ_256K,
+ .flags = SPI_NOR_HAS_LOCK,
+ .no_sfdp_flags = SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ .mfr_flags = USE_CLSR,
}, {
.id = SNOR_ID(0x01, 0x02, 0x20, 0x4d, 0x00, 0x81),
.name = "s25fs512s",
@@ -837,6 +837,13 @@ static const struct flash_info spansion_nor_parts[] = {
.id = SNOR_ID(0x01, 0x20, 0x18, 0x03, 0x01),
.name = "s25sl12801",
.size = SZ_16M,
+ }, {
+ .id = SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x00, 0x80),
+ .name = "s25fl128s0",
+ .size = SZ_16M,
+ .sector_size = SZ_256K,
+ .no_sfdp_flags = SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ .mfr_flags = USE_CLSR,
}, {
.id = SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x00),
.name = "s25fl129p0",
@@ -845,51 +852,34 @@ static const struct flash_info spansion_nor_parts[] = {
.no_sfdp_flags = SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
.mfr_flags = USE_CLSR,
}, {
- .id = SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x01),
- .name = "s25fl129p1",
+ .id = SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x01, 0x80),
+ .name = "s25fl128s1",
.size = SZ_16M,
.no_sfdp_flags = SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
.mfr_flags = USE_CLSR,
}, {
- .id = SNOR_ID(0x01, 0x02, 0x12),
- .name = "s25sl004a",
- .size = SZ_512K,
- }, {
- .id = SNOR_ID(0x01, 0x02, 0x13),
- .name = "s25sl008a",
- .size = SZ_1M,
- }, {
- .id = SNOR_ID(0x01, 0x02, 0x14),
- .name = "s25sl016a",
- .size = SZ_2M,
- }, {
- .id = SNOR_ID(0x01, 0x02, 0x15),
- .name = "s25sl032a",
- .size = SZ_4M,
+ .id = SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x01, 0x81),
+ .name = "s25fs128s1",
+ .size = SZ_16M,
+ .no_sfdp_flags = SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ .mfr_flags = USE_CLSR,
+ .fixups = &s25fs_s_nor_fixups,
}, {
- .id = SNOR_ID(0x01, 0x02, 0x16),
- .name = "s25sl064a",
- .size = SZ_8M,
+ .id = SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x01),
+ .name = "s25fl129p1",
+ .size = SZ_16M,
+ .no_sfdp_flags = SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ .mfr_flags = USE_CLSR,
}, {
- .id = SNOR_ID(0xef, 0x40, 0x13),
- .name = "s25fl004k",
+ .id = SNOR_ID(0x01, 0x40, 0x13),
+ .name = "s25fl204k",
.size = SZ_512K,
- .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ,
}, {
- .id = SNOR_ID(0xef, 0x40, 0x14),
- .name = "s25fl008k",
+ .id = SNOR_ID(0x01, 0x40, 0x14),
+ .name = "s25fl208k",
.size = SZ_1M,
- .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
- }, {
- .id = SNOR_ID(0xef, 0x40, 0x15),
- .name = "s25fl016k",
- .size = SZ_2M,
- .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
- }, {
- .id = SNOR_ID(0xef, 0x40, 0x17),
- .name = "s25fl064k",
- .size = SZ_8M,
- .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ,
}, {
.id = SNOR_ID(0x01, 0x40, 0x15),
.name = "s25fl116k",
@@ -905,16 +895,6 @@ static const struct flash_info spansion_nor_parts[] = {
.name = "s25fl164k",
.size = SZ_8M,
.no_sfdp_flags = SECT_4K,
- }, {
- .id = SNOR_ID(0x01, 0x40, 0x13),
- .name = "s25fl204k",
- .size = SZ_512K,
- .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ,
- }, {
- .id = SNOR_ID(0x01, 0x40, 0x14),
- .name = "s25fl208k",
- .size = SZ_1M,
- .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ,
}, {
.id = SNOR_ID(0x01, 0x60, 0x17),
.name = "s25fl064l",
@@ -934,10 +914,11 @@ static const struct flash_info spansion_nor_parts[] = {
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
.fixup_flags = SPI_NOR_4B_OPCODES,
}, {
- .id = SNOR_ID(0x34, 0x2b, 0x19, 0x0f, 0x08, 0x90),
- .name = "s25fs256t",
- .mfr_flags = USE_CLPEF,
- .fixups = &s25fs256t_fixups
+ .id = SNOR_ID(0x04, 0x2c, 0xc2, 0x7f, 0x7f, 0x7f),
+ .name = "cy15x104q",
+ .size = SZ_512K,
+ .sector_size = SZ_512K,
+ .flags = SPI_NOR_NO_ERASE,
}, {
.id = SNOR_ID(0x34, 0x2a, 0x1a, 0x0f, 0x03, 0x90),
.name = "s25hl512t",
@@ -954,6 +935,11 @@ static const struct flash_info spansion_nor_parts[] = {
.mfr_flags = USE_CLPEF,
.flags = NO_CHIP_ERASE,
.fixups = &s25hx_t_fixups
+ }, {
+ .id = SNOR_ID(0x34, 0x2b, 0x19, 0x0f, 0x08, 0x90),
+ .name = "s25fs256t",
+ .mfr_flags = USE_CLPEF,
+ .fixups = &s25fs256t_fixups
}, {
.id = SNOR_ID(0x34, 0x2b, 0x1a, 0x0f, 0x03, 0x90),
.name = "s25hs512t",
@@ -970,12 +956,6 @@ static const struct flash_info spansion_nor_parts[] = {
.mfr_flags = USE_CLPEF,
.flags = NO_CHIP_ERASE,
.fixups = &s25hx_t_fixups
- }, {
- .id = SNOR_ID(0x04, 0x2c, 0xc2, 0x7f, 0x7f, 0x7f),
- .name = "cy15x104q",
- .size = SZ_512K,
- .sector_size = SZ_512K,
- .flags = SPI_NOR_NO_ERASE,
}, {
.id = SNOR_ID(0x34, 0x5a, 0x1a),
.name = "s28hl512t",
@@ -1001,6 +981,26 @@ static const struct flash_info spansion_nor_parts[] = {
.name = "s28hs02gt",
.mfr_flags = USE_CLPEF,
.fixups = &s28hx_t_fixups,
+ }, {
+ .id = SNOR_ID(0xef, 0x40, 0x13),
+ .name = "s25fl004k",
+ .size = SZ_512K,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ }, {
+ .id = SNOR_ID(0xef, 0x40, 0x14),
+ .name = "s25fl008k",
+ .size = SZ_1M,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ }, {
+ .id = SNOR_ID(0xef, 0x40, 0x15),
+ .name = "s25fl016k",
+ .size = SZ_2M,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ }, {
+ .id = SNOR_ID(0xef, 0x40, 0x17),
+ .name = "s25fl064k",
+ .size = SZ_8M,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
}
};
--
2.39.2
Hi Tudor,
Am 2023-08-08 11:21, schrieb Tudor Ambarus:
> I skimmed over the patches, the idea is good as I already said.
> When do you aim to have these integrated, now or after -rc1 is out?
> After -rc1 is more conservative, as if there are problems, we'll have
> more time to fix them. Either way is good for me as long as you're
> around
> to fix possible problems, but I'd like some timeframe to know when to
> invest time in reviewing all. We're at -rc5.
After -rc1 is out is fine. I just need to track the flash_info additions
until then.
-michael
Hi, Michael,
I skimmed over the patches, the idea is good as I already said.
When do you aim to have these integrated, now or after -rc1 is out?
After -rc1 is more conservative, as if there are problems, we'll have
more time to fix them. Either way is good for me as long as you're around
to fix possible problems, but I'd like some timeframe to know when to
invest time in reviewing all. We're at -rc5.
Cheers,
ta