2023-05-26 15:21:14

by Walker Chen

[permalink] [raw]
Subject: [PATCH v5 0/3] Add TDM audio on StarFive JH7110

This patchset adds TDM audio driver for the StarFive JH7110 SoC. The
first patch adds device tree binding for TDM module. The second patch
adds tdm driver support for JH7110 SoC. The last patch adds device tree
node and pins configuration of tdm to JH7110 dts.

The series has been tested on the VisionFive 2 board by plugging an
audio expansion board.

For more information of audio expansion board, you can take a look
at the following webpage:
https://wiki.seeedstudio.com/ReSpeaker_2_Mics_Pi_HAT/

The last patch should be applied after the following patch:
https://lore.kernel.org/all/[email protected]/

Changes since v4:
- Rebased on Linux 6.4-rc2.
- Adjusted code indentation in jh7110_tdm_syncdiv().
- Removed '__maybe_unused' for jh7110_tdm_system_suspend() and
jh7110_tdm_system_resume().
- Removed initialization for variable 'ret' in jh7110_tdm_hw_params().
- Return immedially when entering unsurpported case in
jh7110_tdm_set_dai_fmt().
- Check the return value with IS_ERR_OR_NULL() for the call to
devm_reset_control_array_get_exclusive().
- Dropped the jh7110_tdm_clk_enable() in probe and rely on runtime PM
check if CONFIG_PM is enabled.
- Used RUNTIME_PM_OPS() instead of SET_RUNTIME_PM_OPS() and
SYSTEM_SLEEP_PM_OPS() instead of SET_SYSTEM_SLEEP_PM_OPS() in
structure jh7110_tdm_pm_ops.

Changes since v3:
- Modified the subject of patch [1/3] to reflect which subsystem it is.
- Use the set of functions with 'clk_bulk_' to get/enable/disable clocks.
- Dropped the overlay from patch [3/3].
- Dropped the redundant macro 'CONFIG_PM' and 'CONFIG_PM_SLEEP' around
suspend() and resume().

Changes since v2:
- Use dt-overlay to describe sound card because need to plug the audio
expansion board into the VisionFive2 board.
- Modified the coding style for driver.
- Moved assignment of stop_dma_first to startup function of dai_driver.
- Dropped some useless macro definition.
- Use loops to get/enable/disable clocks.

Changes since v1:
- Rebased on Linux 6.3-rc4.
- Added the dts file dedicated to describe audio card.
- Added the item for JH7110 audio board to the dt-binding of StarFive
SoC-based boards.

---
v4: https://lore.kernel.org/all/[email protected]/
v3: https://lore.kernel.org/all/[email protected]/
v2: https://lore.kernel.org/all/[email protected]/
v1: https://lore.kernel.org/all/[email protected]/

Walker Chen (3):
ASoC: dt-bindings: Add TDM controller bindings for StarFive JH7110
ASoC: starfive: Add JH7110 TDM driver
riscv: dts: starfive: add the node and pins configuration for tdm

.../bindings/sound/starfive,jh7110-tdm.yaml | 98 +++
MAINTAINERS | 6 +
.../jh7110-starfive-visionfive-2.dtsi | 40 ++
arch/riscv/boot/dts/starfive/jh7110.dtsi | 21 +
sound/soc/Kconfig | 1 +
sound/soc/Makefile | 1 +
sound/soc/starfive/Kconfig | 15 +
sound/soc/starfive/Makefile | 2 +
sound/soc/starfive/jh7110_tdm.c | 679 ++++++++++++++++++
9 files changed, 863 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/starfive,jh7110-tdm.yaml
create mode 100644 sound/soc/starfive/Kconfig
create mode 100644 sound/soc/starfive/Makefile
create mode 100644 sound/soc/starfive/jh7110_tdm.c


base-commit: f1fcbaa18b28dec10281551dfe6ed3a3ed80e3d6
prerequisite-patch-id: 398744c61913c76a35754de867c4f820ca7a8d99
prerequisite-patch-id: 07986c6e98ce85d3ee84f38c780e72145f098fc8
prerequisite-patch-id: 1babe83d6bf999bad17584dc595480f9070a5369
prerequisite-patch-id: 63c1f70ca2bcf827429542e60d74411b7666ceff
prerequisite-patch-id: 9fbb7ad1dd258bb8ff5946c4a0e59de4bfd82a04
prerequisite-patch-id: a7f61973ccb6bc425daa8a86c048fd0f5a915b76
prerequisite-patch-id: 39e1be2a3d1593577ab997f55f59367cba665aa7
prerequisite-patch-id: 0159f09bb0a1ff711a00ae17ef5b12662c9c7d3d
prerequisite-patch-id: 2ddada18ab6ea5cd1da14212aaf59632f5203d40
prerequisite-patch-id: 584c256c9acb52ee2773d0c81c3f4977fc18155a
prerequisite-patch-id: b37ac15032973e1fcd918f157c82a0606775c9e9
prerequisite-patch-id: 6abf359fa445f4104432ddee27044dfbfb128417
--
2.17.1



2023-05-26 15:23:52

by Walker Chen

[permalink] [raw]
Subject: [PATCH v5 3/3] riscv: dts: starfive: add the node and pins configuration for tdm

Add the tdm controller node and pins configuration of tdm for the
StarFive JH7110 SoC.

Signed-off-by: Walker Chen <[email protected]>
---
.../jh7110-starfive-visionfive-2.dtsi | 40 +++++++++++++++++++
arch/riscv/boot/dts/starfive/jh7110.dtsi | 21 ++++++++++
2 files changed, 61 insertions(+)

diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
index 1155b97b593d..19b5954ee72d 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
@@ -214,6 +214,40 @@
slew-rate = <0>;
};
};
+
+ tdm0_pins: tdm0-pins {
+ tdm0-pins-tx {
+ pinmux = <GPIOMUX(44, GPOUT_SYS_TDM_TXD,
+ GPOEN_ENABLE,
+ GPI_NONE)>;
+ bias-pull-up;
+ drive-strength = <2>;
+ input-disable;
+ input-schmitt-disable;
+ slew-rate = <0>;
+ };
+
+ tdm0-pins-rx {
+ pinmux = <GPIOMUX(61, GPOUT_HIGH,
+ GPOEN_DISABLE,
+ GPI_SYS_TDM_RXD)>;
+ input-enable;
+ };
+
+ tdm0-pins-sync {
+ pinmux = <GPIOMUX(63, GPOUT_HIGH,
+ GPOEN_DISABLE,
+ GPI_SYS_TDM_SYNC)>;
+ input-enable;
+ };
+
+ tdm0-pins-pcmclk {
+ pinmux = <GPIOMUX(38, GPOUT_HIGH,
+ GPOEN_DISABLE,
+ GPI_SYS_TDM_CLK)>;
+ input-enable;
+ };
+ };
};

&uart0 {
@@ -221,3 +255,9 @@
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
+
+&tdm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&tdm0_pins>;
+ status = "okay";
+};
diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index 866313570a7e..cfda6fb0d91b 100644
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -366,6 +366,27 @@
status = "disabled";
};

+ tdm: tdm@10090000 {
+ compatible = "starfive,jh7110-tdm";
+ reg = <0x0 0x10090000 0x0 0x1000>;
+ clocks = <&syscrg JH7110_SYSCLK_TDM_AHB>,
+ <&syscrg JH7110_SYSCLK_TDM_APB>,
+ <&syscrg JH7110_SYSCLK_TDM_INTERNAL>,
+ <&syscrg JH7110_SYSCLK_TDM_TDM>,
+ <&syscrg JH7110_SYSCLK_MCLK_INNER>,
+ <&tdm_ext>;
+ clock-names = "tdm_ahb", "tdm_apb",
+ "tdm_internal", "tdm",
+ "mclk_inner", "tdm_ext";
+ resets = <&syscrg JH7110_SYSRST_TDM_AHB>,
+ <&syscrg JH7110_SYSRST_TDM_APB>,
+ <&syscrg JH7110_SYSRST_TDM_CORE>;
+ dmas = <&dma 20>, <&dma 21>;
+ dma-names = "rx","tx";
+ #sound-dai-cells = <0>;
+ status = "disabled";
+ };
+
stgcrg: clock-controller@10230000 {
compatible = "starfive,jh7110-stgcrg";
reg = <0x0 0x10230000 0x0 0x10000>;
--
2.17.1


2023-05-31 06:30:55

by Hal Feng

[permalink] [raw]
Subject: Re: [PATCH v5 3/3] riscv: dts: starfive: add the node and pins configuration for tdm

On Fri, 26 May 2023 22:54:02 +0800, Walker Chen wrote:
> Add the tdm controller node and pins configuration of tdm for the
> StarFive JH7110 SoC.
>
> Signed-off-by: Walker Chen <[email protected]>
> ---
> .../jh7110-starfive-visionfive-2.dtsi | 40 +++++++++++++++++++
> arch/riscv/boot/dts/starfive/jh7110.dtsi | 21 ++++++++++
> 2 files changed, 61 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> index 1155b97b593d..19b5954ee72d 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> @@ -214,6 +214,40 @@
> slew-rate = <0>;
> };
> };
> +
> + tdm0_pins: tdm0-pins {
> + tdm0-pins-tx {

Use consistent naming, so

tdm_pins: tdm-0 {
tx-pins {

> + pinmux = <GPIOMUX(44, GPOUT_SYS_TDM_TXD,
> + GPOEN_ENABLE,
> + GPI_NONE)>;
> + bias-pull-up;
> + drive-strength = <2>;
> + input-disable;
> + input-schmitt-disable;
> + slew-rate = <0>;
> + };
> +
> + tdm0-pins-rx {

rx-pins {

> + pinmux = <GPIOMUX(61, GPOUT_HIGH,
> + GPOEN_DISABLE,
> + GPI_SYS_TDM_RXD)>;
> + input-enable;
> + };
> +
> + tdm0-pins-sync {

sync-pins {

> + pinmux = <GPIOMUX(63, GPOUT_HIGH,
> + GPOEN_DISABLE,
> + GPI_SYS_TDM_SYNC)>;
> + input-enable;
> + };
> +
> + tdm0-pins-pcmclk {

pcmclk-pins {

> + pinmux = <GPIOMUX(38, GPOUT_HIGH,
> + GPOEN_DISABLE,
> + GPI_SYS_TDM_CLK)>;
> + input-enable;
> + };
> + };
> };
>
> &uart0 {
> @@ -221,3 +255,9 @@
> pinctrl-0 = <&uart0_pins>;
> status = "okay";
> };
> +
> +&tdm {
> + pinctrl-names = "default";
> + pinctrl-0 = <&tdm0_pins>;

pinctrl-0 = <&tdm_pins>;

Best regards,
Hal

> + status = "okay";
> +};


2023-05-31 06:35:52

by Walker Chen

[permalink] [raw]
Subject: Re: [PATCH v5 3/3] riscv: dts: starfive: add the node and pins configuration for tdm


On 2023/5/31 14:23, Hal Feng wrote:
> On Fri, 26 May 2023 22:54:02 +0800, Walker Chen wrote:
>> Add the tdm controller node and pins configuration of tdm for the
>> StarFive JH7110 SoC.
>>
>> Signed-off-by: Walker Chen <[email protected]>
>> ---
>> .../jh7110-starfive-visionfive-2.dtsi | 40 +++++++++++++++++++
>> arch/riscv/boot/dts/starfive/jh7110.dtsi | 21 ++++++++++
>> 2 files changed, 61 insertions(+)
>>
>> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
>> index 1155b97b593d..19b5954ee72d 100644
>> --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
>> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
>> @@ -214,6 +214,40 @@
>> slew-rate = <0>;
>> };
>> };
>> +
>> + tdm0_pins: tdm0-pins {
>> + tdm0-pins-tx {
>
> Use consistent naming, so
>
> tdm_pins: tdm-0 {
> tx-pins {
>
>> + pinmux = <GPIOMUX(44, GPOUT_SYS_TDM_TXD,
>> + GPOEN_ENABLE,
>> + GPI_NONE)>;
>> + bias-pull-up;
>> + drive-strength = <2>;
>> + input-disable;
>> + input-schmitt-disable;
>> + slew-rate = <0>;
>> + };
>> +
>> + tdm0-pins-rx {
>
> rx-pins {
>
>> + pinmux = <GPIOMUX(61, GPOUT_HIGH,
>> + GPOEN_DISABLE,
>> + GPI_SYS_TDM_RXD)>;
>> + input-enable;
>> + };
>> +
>> + tdm0-pins-sync {
>
> sync-pins {
>
>> + pinmux = <GPIOMUX(63, GPOUT_HIGH,
>> + GPOEN_DISABLE,
>> + GPI_SYS_TDM_SYNC)>;
>> + input-enable;
>> + };
>> +
>> + tdm0-pins-pcmclk {
>
> pcmclk-pins {
>
>> + pinmux = <GPIOMUX(38, GPOUT_HIGH,
>> + GPOEN_DISABLE,
>> + GPI_SYS_TDM_CLK)>;
>> + input-enable;
>> + };
>> + };
>> };
>>
>> &uart0 {
>> @@ -221,3 +255,9 @@
>> pinctrl-0 = <&uart0_pins>;
>> status = "okay";
>> };
>> +
>> +&tdm {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&tdm0_pins>;
>
> pinctrl-0 = <&tdm_pins>;
>
> Best regards,
> Hal

OK, I'll update these node's name in the next submit.
Thanks.

Best regards,
Walker

2023-05-31 06:49:59

by Hal Feng

[permalink] [raw]
Subject: Re: [PATCH v5 3/3] riscv: dts: starfive: add the node and pins configuration for tdm

On Wed, 31 May 2023 14:30:19 +0800, Walker Chen wrote:
> On 2023/5/31 14:23, Hal Feng wrote:
>> On Fri, 26 May 2023 22:54:02 +0800, Walker Chen wrote:
>>> Add the tdm controller node and pins configuration of tdm for the
>>> StarFive JH7110 SoC.
>>>
>>> Signed-off-by: Walker Chen <[email protected]>
>>> ---
>>> .../jh7110-starfive-visionfive-2.dtsi | 40 +++++++++++++++++++
>>> arch/riscv/boot/dts/starfive/jh7110.dtsi | 21 ++++++++++
>>> 2 files changed, 61 insertions(+)
>>>
>>> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
>>> index 1155b97b593d..19b5954ee72d 100644
>>> --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
>>> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
>>> @@ -214,6 +214,40 @@
>>> slew-rate = <0>;
>>> };
>>> };
>>> +
>>> + tdm0_pins: tdm0-pins {
>>> + tdm0-pins-tx {
>>
>> Use consistent naming, so
>>
>> tdm_pins: tdm-0 {
>> tx-pins {
>>
>>> + pinmux = <GPIOMUX(44, GPOUT_SYS_TDM_TXD,
>>> + GPOEN_ENABLE,
>>> + GPI_NONE)>;
>>> + bias-pull-up;
>>> + drive-strength = <2>;
>>> + input-disable;
>>> + input-schmitt-disable;
>>> + slew-rate = <0>;
>>> + };
>>> +
>>> + tdm0-pins-rx {
>>
>> rx-pins {
>>
>>> + pinmux = <GPIOMUX(61, GPOUT_HIGH,
>>> + GPOEN_DISABLE,
>>> + GPI_SYS_TDM_RXD)>;
>>> + input-enable;
>>> + };
>>> +
>>> + tdm0-pins-sync {
>>
>> sync-pins {
>>
>>> + pinmux = <GPIOMUX(63, GPOUT_HIGH,
>>> + GPOEN_DISABLE,
>>> + GPI_SYS_TDM_SYNC)>;
>>> + input-enable;
>>> + };
>>> +
>>> + tdm0-pins-pcmclk {
>>
>> pcmclk-pins {
>>
>>> + pinmux = <GPIOMUX(38, GPOUT_HIGH,
>>> + GPOEN_DISABLE,
>>> + GPI_SYS_TDM_CLK)>;
>>> + input-enable;
>>> + };
>>> + };
>>> };
>>>
>>> &uart0 {
>>> @@ -221,3 +255,9 @@
>>> pinctrl-0 = <&uart0_pins>;
>>> status = "okay";
>>> };
>>> +
>>> +&tdm {
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&tdm0_pins>;
>>
>> pinctrl-0 = <&tdm_pins>;
>>
>> Best regards,
>> Hal
>
> OK, I'll update these node's name in the next submit.
> Thanks.

With that fixed,
Reviewed-by: Hal Feng <[email protected]>

Best regards,
Hal

2023-06-01 15:56:08

by Mark Brown

[permalink] [raw]
Subject: Re: (subset) [PATCH v5 0/3] Add TDM audio on StarFive JH7110

On Fri, 26 May 2023 22:53:59 +0800, Walker Chen wrote:
> This patchset adds TDM audio driver for the StarFive JH7110 SoC. The
> first patch adds device tree binding for TDM module. The second patch
> adds tdm driver support for JH7110 SoC. The last patch adds device tree
> node and pins configuration of tdm to JH7110 dts.
>
> The series has been tested on the VisionFive 2 board by plugging an
> audio expansion board.
>
> [...]

Applied to

https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next

Thanks!

[1/3] ASoC: dt-bindings: Add TDM controller bindings for StarFive JH7110
commit: d9afe0d36cc27dcacbcecf02fe803a30d544698c
[2/3] ASoC: starfive: Add JH7110 TDM driver
commit: fd4762b6b5cfa27bf44f5d624ce74b7dce4a479c

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark