tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 18b44bc5a67275641fb26f2c54ba7eef80ac5950
commit: d78c8e32890ef7eca79ffd67c96022c7f9d8cce4 powerpc/mm: Rearrange if-else block to avoid clang warning
date: 5 months ago
config: powerpc-skiroot_defconfig (https://download.01.org/0day-ci/archive/20230726/[email protected]/config)
compiler: clang version 17.0.0 (https://github.com/llvm/llvm-project.git 4a5ac14ee968ff0ad5d2cc1ffa0299048db4c88a)
reproduce: (https://download.01.org/0day-ci/archive/20230726/[email protected]/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <[email protected]>
| Closes: https://lore.kernel.org/oe-kbuild-all/[email protected]/
All errors (new ones prefixed by >>):
>> arch/powerpc/mm/book3s64/radix_tlb.c:419:20: error: unused function '_tlbie_pid_lpid' [-Werror,-Wunused-function]
419 | static inline void _tlbie_pid_lpid(unsigned long pid, unsigned long lpid,
| ^
>> arch/powerpc/mm/book3s64/radix_tlb.c:663:20: error: unused function '_tlbie_va_range_lpid' [-Werror,-Wunused-function]
663 | static inline void _tlbie_va_range_lpid(unsigned long start, unsigned long end,
| ^
2 errors generated.
vim +/_tlbie_pid_lpid +419 arch/powerpc/mm/book3s64/radix_tlb.c
1a472c9dba6b96 arch/powerpc/mm/tlb-radix.c Aneesh Kumar K.V 2016-04-29 418
f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 @419 static inline void _tlbie_pid_lpid(unsigned long pid, unsigned long lpid,
f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 420 unsigned long ric)
f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 421 {
f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 422 asm volatile("ptesync" : : : "memory");
f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 423
f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 424 /*
f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 425 * Workaround the fact that the "ric" argument to __tlbie_pid
f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 426 * must be a compile-time contraint to match the "i" constraint
f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 427 * in the asm statement.
f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 428 */
f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 429 switch (ric) {
f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 430 case RIC_FLUSH_TLB:
f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 431 __tlbie_pid_lpid(pid, lpid, RIC_FLUSH_TLB);
f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 432 fixup_tlbie_pid_lpid(pid, lpid);
f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 433 break;
f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 434 case RIC_FLUSH_PWC:
f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 435 __tlbie_pid_lpid(pid, lpid, RIC_FLUSH_PWC);
f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 436 break;
f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 437 case RIC_FLUSH_ALL:
f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 438 default:
f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 439 __tlbie_pid_lpid(pid, lpid, RIC_FLUSH_ALL);
f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 440 fixup_tlbie_pid_lpid(pid, lpid);
f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 441 }
f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 442 asm volatile("eieio; tlbsync; ptesync" : : : "memory");
f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 443 }
2275d7b5754a57 arch/powerpc/mm/book3s64/radix_tlb.c Nicholas Piggin 2019-09-03 444 struct tlbiel_pid {
2275d7b5754a57 arch/powerpc/mm/book3s64/radix_tlb.c Nicholas Piggin 2019-09-03 445 unsigned long pid;
2275d7b5754a57 arch/powerpc/mm/book3s64/radix_tlb.c Nicholas Piggin 2019-09-03 446 unsigned long ric;
2275d7b5754a57 arch/powerpc/mm/book3s64/radix_tlb.c Nicholas Piggin 2019-09-03 447 };
2275d7b5754a57 arch/powerpc/mm/book3s64/radix_tlb.c Nicholas Piggin 2019-09-03 448
:::::: The code at line 419 was first introduced by commit
:::::: f0c6fbbb90504fb7e9dbf0865463d3c2b4de49e5 KVM: PPC: Book3S HV: Add support for H_RPT_INVALIDATE
:::::: TO: Bharata B Rao <[email protected]>
:::::: CC: Michael Ellerman <[email protected]>
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
Le 26/07/2023 à 03:08, kernel test robot a écrit :
> tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
> head: 18b44bc5a67275641fb26f2c54ba7eef80ac5950
> commit: d78c8e32890ef7eca79ffd67c96022c7f9d8cce4 powerpc/mm: Rearrange if-else block to avoid clang warning
Culprit commit is f0c6fbbb9050 ("KVM: PPC: Book3S HV: Add support for
H_RPT_INVALIDATE")
Proposed fix:
https://patchwork.ozlabs.org/project/linuxppc-dev/patch/3d72efd39f986ee939d068af69fdce28bd600766.1691568093.git.christophe.leroy@csgroup.eu/
> date: 5 months ago
> config: powerpc-skiroot_defconfig (https://download.01.org/0day-ci/archive/20230726/[email protected]/config)
> compiler: clang version 17.0.0 (https://github.com/llvm/llvm-project.git 4a5ac14ee968ff0ad5d2cc1ffa0299048db4c88a)
> reproduce: (https://download.01.org/0day-ci/archive/20230726/[email protected]/reproduce)
>
> If you fix the issue in a separate patch/commit (i.e. not just a new version of
> the same patch/commit), kindly add following tags
> | Reported-by: kernel test robot <[email protected]>
> | Closes: https://lore.kernel.org/oe-kbuild-all/[email protected]/
>
> All errors (new ones prefixed by >>):
>
>>> arch/powerpc/mm/book3s64/radix_tlb.c:419:20: error: unused function '_tlbie_pid_lpid' [-Werror,-Wunused-function]
> 419 | static inline void _tlbie_pid_lpid(unsigned long pid, unsigned long lpid,
> | ^
>>> arch/powerpc/mm/book3s64/radix_tlb.c:663:20: error: unused function '_tlbie_va_range_lpid' [-Werror,-Wunused-function]
> 663 | static inline void _tlbie_va_range_lpid(unsigned long start, unsigned long end,
> | ^
> 2 errors generated.
>
>
> vim +/_tlbie_pid_lpid +419 arch/powerpc/mm/book3s64/radix_tlb.c
>
> 1a472c9dba6b96 arch/powerpc/mm/tlb-radix.c Aneesh Kumar K.V 2016-04-29 418
> f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 @419 static inline void _tlbie_pid_lpid(unsigned long pid, unsigned long lpid,
> f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 420 unsigned long ric)
> f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 421 {
> f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 422 asm volatile("ptesync" : : : "memory");
> f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 423
> f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 424 /*
> f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 425 * Workaround the fact that the "ric" argument to __tlbie_pid
> f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 426 * must be a compile-time contraint to match the "i" constraint
> f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 427 * in the asm statement.
> f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 428 */
> f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 429 switch (ric) {
> f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 430 case RIC_FLUSH_TLB:
> f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 431 __tlbie_pid_lpid(pid, lpid, RIC_FLUSH_TLB);
> f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 432 fixup_tlbie_pid_lpid(pid, lpid);
> f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 433 break;
> f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 434 case RIC_FLUSH_PWC:
> f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 435 __tlbie_pid_lpid(pid, lpid, RIC_FLUSH_PWC);
> f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 436 break;
> f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 437 case RIC_FLUSH_ALL:
> f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 438 default:
> f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 439 __tlbie_pid_lpid(pid, lpid, RIC_FLUSH_ALL);
> f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 440 fixup_tlbie_pid_lpid(pid, lpid);
> f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 441 }
> f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 442 asm volatile("eieio; tlbsync; ptesync" : : : "memory");
> f0c6fbbb90504f arch/powerpc/mm/book3s64/radix_tlb.c Bharata B Rao 2021-06-21 443 }
> 2275d7b5754a57 arch/powerpc/mm/book3s64/radix_tlb.c Nicholas Piggin 2019-09-03 444 struct tlbiel_pid {
> 2275d7b5754a57 arch/powerpc/mm/book3s64/radix_tlb.c Nicholas Piggin 2019-09-03 445 unsigned long pid;
> 2275d7b5754a57 arch/powerpc/mm/book3s64/radix_tlb.c Nicholas Piggin 2019-09-03 446 unsigned long ric;
> 2275d7b5754a57 arch/powerpc/mm/book3s64/radix_tlb.c Nicholas Piggin 2019-09-03 447 };
> 2275d7b5754a57 arch/powerpc/mm/book3s64/radix_tlb.c Nicholas Piggin 2019-09-03 448
>
> :::::: The code at line 419 was first introduced by commit
> :::::: f0c6fbbb90504fb7e9dbf0865463d3c2b4de49e5 KVM: PPC: Book3S HV: Add support for H_RPT_INVALIDATE
>
> :::::: TO: Bharata B Rao <[email protected]>
> :::::: CC: Michael Ellerman <[email protected]>
>