2020-07-16 04:41:14

by Bin Meng

Subject: [PATCH] riscv: Add SiFive drivers to rv32_defconfig

From: Bin Meng <[email protected]>

This adds SiFive drivers to rv32_defconfig, to keep in sync with the
64-bit config. This is useful when testing 32-bit kernel with QEMU
'sifive_u' 32-bit machine.

Signed-off-by: Bin Meng <[email protected]>
---

arch/riscv/configs/rv32_defconfig | 5 +++++
1 file changed, 5 insertions(+)

diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig
index 05bbf52..8759501 100644
--- a/arch/riscv/configs/rv32_defconfig
+++ b/arch/riscv/configs/rv32_defconfig
@@ -14,6 +14,7 @@ CONFIG_CHECKPOINT_RESTORE=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_EXPERT=y
CONFIG_BPF_SYSCALL=y
+CONFIG_SOC_SIFIVE=y
CONFIG_SOC_VIRT=y
CONFIG_ARCH_RV32I=y
CONFIG_SMP=y
@@ -61,6 +62,8 @@ CONFIG_HVC_RISCV_SBI=y
CONFIG_VIRTIO_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_VIRTIO=y
+CONFIG_SPI=y
+CONFIG_SPI_SIFIVE=y
# CONFIG_PTP_1588_CLOCK is not set
CONFIG_POWER_RESET=y
CONFIG_DRM=y
@@ -76,6 +79,8 @@ CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_HCD_PLATFORM=y
CONFIG_USB_STORAGE=y
CONFIG_USB_UAS=y
+CONFIG_MMC=y
+CONFIG_MMC_SPI=y
CONFIG_RTC_CLASS=y
CONFIG_VIRTIO_PCI=y
CONFIG_VIRTIO_BALLOON=y
--
2.7.4

2020-07-16 13:15:59

by Anup Patel

Subject: Re: [PATCH] riscv: Add SiFive drivers to rv32_defconfig

On Thu, Jul 16, 2020 at 10:10 AM Bin Meng <[email protected]> wrote:
>
> From: Bin Meng <[email protected]>
>
> This adds SiFive drivers to rv32_defconfig, to keep in sync with the
> 64-bit config. This is useful when testing 32-bit kernel with QEMU
> 'sifive_u' 32-bit machine.
>
> Signed-off-by: Bin Meng <[email protected]>
> ---
>
> arch/riscv/configs/rv32_defconfig | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig
> index 05bbf52..8759501 100644
> --- a/arch/riscv/configs/rv32_defconfig
> +++ b/arch/riscv/configs/rv32_defconfig
> @@ -14,6 +14,7 @@ CONFIG_CHECKPOINT_RESTORE=y
> CONFIG_BLK_DEV_INITRD=y
> CONFIG_EXPERT=y
> CONFIG_BPF_SYSCALL=y
> +CONFIG_SOC_SIFIVE=y
> CONFIG_SOC_VIRT=y
> CONFIG_ARCH_RV32I=y
> CONFIG_SMP=y
> @@ -61,6 +62,8 @@ CONFIG_HVC_RISCV_SBI=y
> CONFIG_VIRTIO_CONSOLE=y
> CONFIG_HW_RANDOM=y
> CONFIG_HW_RANDOM_VIRTIO=y
> +CONFIG_SPI=y
> +CONFIG_SPI_SIFIVE=y
> # CONFIG_PTP_1588_CLOCK is not set
> CONFIG_POWER_RESET=y
> CONFIG_DRM=y
> @@ -76,6 +79,8 @@ CONFIG_USB_OHCI_HCD=y
> CONFIG_USB_OHCI_HCD_PLATFORM=y
> CONFIG_USB_STORAGE=y
> CONFIG_USB_UAS=y
> +CONFIG_MMC=y
> +CONFIG_MMC_SPI=y
> CONFIG_RTC_CLASS=y
> CONFIG_VIRTIO_PCI=y
> CONFIG_VIRTIO_BALLOON=y
> --
> 2.7.4
>

Looks good to me.

Reviewed-by: Anup Patel <[email protected]>

Regards,
Anup

2020-07-16 16:40:16

by Alistair Francis

Subject: Re: [PATCH] riscv: Add SiFive drivers to rv32_defconfig

On Wed, 2020-07-15 at 21:39 -0700, Bin Meng wrote:
> From: Bin Meng <[email protected]>
>
> This adds SiFive drivers to rv32_defconfig, to keep in sync with the
> 64-bit config. This is useful when testing 32-bit kernel with QEMU
> 'sifive_u' 32-bit machine.
>
> Signed-off-by: Bin Meng <[email protected]>

Reviewed-by: Alistair Francis <[email protected]>

Alistair

> ---
>
> arch/riscv/configs/rv32_defconfig | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/riscv/configs/rv32_defconfig
> b/arch/riscv/configs/rv32_defconfig
> index 05bbf52..8759501 100644
> --- a/arch/riscv/configs/rv32_defconfig
> +++ b/arch/riscv/configs/rv32_defconfig
> @@ -14,6 +14,7 @@ CONFIG_CHECKPOINT_RESTORE=y
> CONFIG_BLK_DEV_INITRD=y
> CONFIG_EXPERT=y
> CONFIG_BPF_SYSCALL=y
> +CONFIG_SOC_SIFIVE=y
> CONFIG_SOC_VIRT=y
> CONFIG_ARCH_RV32I=y
> CONFIG_SMP=y
> @@ -61,6 +62,8 @@ CONFIG_HVC_RISCV_SBI=y
> CONFIG_VIRTIO_CONSOLE=y
> CONFIG_HW_RANDOM=y
> CONFIG_HW_RANDOM_VIRTIO=y
> +CONFIG_SPI=y
> +CONFIG_SPI_SIFIVE=y
> # CONFIG_PTP_1588_CLOCK is not set
> CONFIG_POWER_RESET=y
> CONFIG_DRM=y
> @@ -76,6 +79,8 @@ CONFIG_USB_OHCI_HCD=y
> CONFIG_USB_OHCI_HCD_PLATFORM=y
> CONFIG_USB_STORAGE=y
> CONFIG_USB_UAS=y
> +CONFIG_MMC=y
> +CONFIG_MMC_SPI=y
> CONFIG_RTC_CLASS=y
> CONFIG_VIRTIO_PCI=y
> CONFIG_VIRTIO_BALLOON=y

2020-08-18 09:31:20

by Bin Meng

Subject: Re: [PATCH] riscv: Add SiFive drivers to rv32_defconfig

On Fri, Jul 17, 2020 at 12:39 AM Alistair Francis
<[email protected]> wrote:
>
> On Wed, 2020-07-15 at 21:39 -0700, Bin Meng wrote:
> > From: Bin Meng <[email protected]>
> >
> > This adds SiFive drivers to rv32_defconfig, to keep in sync with the
> > 64-bit config. This is useful when testing 32-bit kernel with QEMU
> > 'sifive_u' 32-bit machine.
> >
> > Signed-off-by: Bin Meng <[email protected]>
>
> Reviewed-by: Alistair Francis <[email protected]>
>

Ping?

Is this patch applied anywhere? Thanks!

Regards,
Bin

2020-08-20 18:02:15

by Palmer Dabbelt

Subject: Re: [PATCH] riscv: Add SiFive drivers to rv32_defconfig

On Tue, 18 Aug 2020 02:29:53 PDT (-0700), [email protected] wrote:
> On Fri, Jul 17, 2020 at 12:39 AM Alistair Francis
> <[email protected]> wrote:
>>
>> On Wed, 2020-07-15 at 21:39 -0700, Bin Meng wrote:
>> > From: Bin Meng <[email protected]>
>> >
>> > This adds SiFive drivers to rv32_defconfig, to keep in sync with the
>> > 64-bit config. This is useful when testing 32-bit kernel with QEMU
>> > 'sifive_u' 32-bit machine.
>> >
>> > Signed-off-by: Bin Meng <[email protected]>
>>
>> Reviewed-by: Alistair Francis <[email protected]>
>>
>
> Ping?
>
> Is this patch applied anywhere? Thanks!

Sorry, I must have missed it. It's on fixes.