2021-11-18 06:51:34

by Xing Zhengjun

[permalink] [raw]
Subject: [PATCH] perf/x86/intel/uncore: Fix CAS_COUNT_WRITE issue for ICX

From: Zhengjun Xing <[email protected]>

The user recently report a perf issue in the ICX platform, when test by
perf event “uncore_imc_x/cas_count_write”,the write bandwidth is always
very small (only 0.38MB/s), it is caused by the wrong "umask" for the
"cas_count_write" event. When double-checking, find "cas_count_read"
also is wrong.

The public document for ICX uncore:

https://www.intel.com/content/www/us/en/develop/download/3rd-gen-intel-xeon-processor-scalable-uncore-pm.html

On page 142, Table 2-143, defines Unit Masks for CAS_COUNT:
RD b00001111
WR b00110000

So Corrected both "cas_count_read" and "cas_count_write" for ICX.

Old settings:
hswep_uncore_imc_events
INTEL_UNCORE_EVENT_DESC(cas_count_read, "event=0x04,umask=0x03")
INTEL_UNCORE_EVENT_DESC(cas_count_write, "event=0x04,umask=0x0c")

New settings:
snr_uncore_imc_events
INTEL_UNCORE_EVENT_DESC(cas_count_read, "event=0x04,umask=0x0f")
INTEL_UNCORE_EVENT_DESC(cas_count_write, "event=0x04,umask=0x30"),

Fixes: 2b3b76b5ec67 ("perf/x86/intel/uncore: Add Ice Lake server uncore support")
Reviewed-by: Adrian Hunter <[email protected]>
Signed-off-by: Zhengjun Xing <[email protected]>
---
arch/x86/events/intel/uncore_snbep.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c
index 5ddc0f30db6f..a6fd8eb410a9 100644
--- a/arch/x86/events/intel/uncore_snbep.c
+++ b/arch/x86/events/intel/uncore_snbep.c
@@ -5468,7 +5468,7 @@ static struct intel_uncore_type icx_uncore_imc = {
.fixed_ctr_bits = 48,
.fixed_ctr = SNR_IMC_MMIO_PMON_FIXED_CTR,
.fixed_ctl = SNR_IMC_MMIO_PMON_FIXED_CTL,
- .event_descs = hswep_uncore_imc_events,
+ .event_descs = snr_uncore_imc_events,
.perf_ctr = SNR_IMC_MMIO_PMON_CTR0,
.event_ctl = SNR_IMC_MMIO_PMON_CTL0,
.event_mask = SNBEP_PMON_RAW_EVENT_MASK,
--
2.25.1



2021-11-18 06:58:34

by Greg Kroah-Hartman

[permalink] [raw]
Subject: Re: [PATCH] perf/x86/intel/uncore: Fix CAS_COUNT_WRITE issue for ICX

On Thu, Nov 18, 2021 at 10:48:11PM +0800, [email protected] wrote:
> From: Zhengjun Xing <[email protected]>
>
> The user recently report a perf issue in the ICX platform, when test by
> perf event “uncore_imc_x/cas_count_write”,the write bandwidth is always
> very small (only 0.38MB/s), it is caused by the wrong "umask" for the
> "cas_count_write" event. When double-checking, find "cas_count_read"
> also is wrong.
>
> The public document for ICX uncore:
>
> https://www.intel.com/content/www/us/en/develop/download/3rd-gen-intel-xeon-processor-scalable-uncore-pm.html
>
> On page 142, Table 2-143, defines Unit Masks for CAS_COUNT:
> RD b00001111
> WR b00110000
>
> So Corrected both "cas_count_read" and "cas_count_write" for ICX.
>
> Old settings:
> hswep_uncore_imc_events
> INTEL_UNCORE_EVENT_DESC(cas_count_read, "event=0x04,umask=0x03")
> INTEL_UNCORE_EVENT_DESC(cas_count_write, "event=0x04,umask=0x0c")
>
> New settings:
> snr_uncore_imc_events
> INTEL_UNCORE_EVENT_DESC(cas_count_read, "event=0x04,umask=0x0f")
> INTEL_UNCORE_EVENT_DESC(cas_count_write, "event=0x04,umask=0x30"),
>
> Fixes: 2b3b76b5ec67 ("perf/x86/intel/uncore: Add Ice Lake server uncore support")
> Reviewed-by: Adrian Hunter <[email protected]>
> Signed-off-by: Zhengjun Xing <[email protected]>
> ---
> arch/x86/events/intel/uncore_snbep.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c
> index 5ddc0f30db6f..a6fd8eb410a9 100644
> --- a/arch/x86/events/intel/uncore_snbep.c
> +++ b/arch/x86/events/intel/uncore_snbep.c
> @@ -5468,7 +5468,7 @@ static struct intel_uncore_type icx_uncore_imc = {
> .fixed_ctr_bits = 48,
> .fixed_ctr = SNR_IMC_MMIO_PMON_FIXED_CTR,
> .fixed_ctl = SNR_IMC_MMIO_PMON_FIXED_CTL,
> - .event_descs = hswep_uncore_imc_events,
> + .event_descs = snr_uncore_imc_events,
> .perf_ctr = SNR_IMC_MMIO_PMON_CTR0,
> .event_ctl = SNR_IMC_MMIO_PMON_CTL0,
> .event_mask = SNBEP_PMON_RAW_EVENT_MASK,
> --
> 2.25.1
>
<formletter>

This is not the correct way to submit patches for inclusion in the
stable kernel tree. Please read:
https://www.kernel.org/doc/html/latest/process/stable-kernel-rules.html
for how to do this properly.

</formletter>

2021-11-18 07:22:39

by Xing Zhengjun

[permalink] [raw]
Subject: Re: [PATCH] perf/x86/intel/uncore: Fix CAS_COUNT_WRITE issue for ICX



On 11/18/2021 2:58 PM, Greg KH wrote:
> On Thu, Nov 18, 2021 at 10:48:11PM +0800, [email protected] wrote:
>> From: Zhengjun Xing <[email protected]>
>>
>> The user recently report a perf issue in the ICX platform, when test by
>> perf event “uncore_imc_x/cas_count_write”,the write bandwidth is always
>> very small (only 0.38MB/s), it is caused by the wrong "umask" for the
>> "cas_count_write" event. When double-checking, find "cas_count_read"
>> also is wrong.
>>
>> The public document for ICX uncore:
>>
>> https://www.intel.com/content/www/us/en/develop/download/3rd-gen-intel-xeon-processor-scalable-uncore-pm.html
>>
>> On page 142, Table 2-143, defines Unit Masks for CAS_COUNT:
>> RD b00001111
>> WR b00110000
>>
>> So Corrected both "cas_count_read" and "cas_count_write" for ICX.
>>
>> Old settings:
>> hswep_uncore_imc_events
>> INTEL_UNCORE_EVENT_DESC(cas_count_read, "event=0x04,umask=0x03")
>> INTEL_UNCORE_EVENT_DESC(cas_count_write, "event=0x04,umask=0x0c")
>>
>> New settings:
>> snr_uncore_imc_events
>> INTEL_UNCORE_EVENT_DESC(cas_count_read, "event=0x04,umask=0x0f")
>> INTEL_UNCORE_EVENT_DESC(cas_count_write, "event=0x04,umask=0x30"),
>>
>> Fixes: 2b3b76b5ec67 ("perf/x86/intel/uncore: Add Ice Lake server uncore support")
>> Reviewed-by: Adrian Hunter <[email protected]>
>> Signed-off-by: Zhengjun Xing <[email protected]>
>> ---
>> arch/x86/events/intel/uncore_snbep.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c
>> index 5ddc0f30db6f..a6fd8eb410a9 100644
>> --- a/arch/x86/events/intel/uncore_snbep.c
>> +++ b/arch/x86/events/intel/uncore_snbep.c
>> @@ -5468,7 +5468,7 @@ static struct intel_uncore_type icx_uncore_imc = {
>> .fixed_ctr_bits = 48,
>> .fixed_ctr = SNR_IMC_MMIO_PMON_FIXED_CTR,
>> .fixed_ctl = SNR_IMC_MMIO_PMON_FIXED_CTL,
>> - .event_descs = hswep_uncore_imc_events,
>> + .event_descs = snr_uncore_imc_events,
>> .perf_ctr = SNR_IMC_MMIO_PMON_CTR0,
>> .event_ctl = SNR_IMC_MMIO_PMON_CTL0,
>> .event_mask = SNBEP_PMON_RAW_EVENT_MASK,
>> --
>> 2.25.1
>>
> <formletter>
>
> This is not the correct way to submit patches for inclusion in the
> stable kernel tree. Please read:
> https://www.kernel.org/doc/html/latest/process/stable-kernel-rules.html
> for how to do this properly.
>
> </formletter>
>
Sorry, I will add "Cc: [email protected]" in the sign-off area and
send the new version patch.

--
Zhengjun Xing