This is an attempt to convert the SP805 watchdog DT binding to yaml.
This is done in the first patch, the remaining nine fix some DT users.
I couldn't test any of those DT files on actual machines, but tried
to make the changes in a way that would be transparent to at least the
Linux driver. The only other SP805 DT user I could find is U-Boot, which
seems to only use a very minimal subset of the binding (just the first
clock).
I only tried to fix those DTs that were easily and reliably fixable.
AFAICT, a missing primecell compatible string, for instance, would
prevent the Linux driver from probing the device at all, so I didn't
dare to touch those DTs at all. Missing clocks are equally fatal.
Cheers,
Andre
Andre Przywara (10):
dt-bindings: watchdog: sp-805: Convert to Json-schema
arm64: dts: arm: Fix SP805 clock-names
arm64: dts: broadcom: Fix SP805 clock-names
arm64: dts: freescale: Fix SP805 clock-names
arm64: dts: hisilicon: Fix SP805 clocks
arm64: dts: lg: Fix SP805 clocks
ARM: dts: arm: Fix SP805 clocks
ARM: dts: Cygnus: Fix SP805 clocks
ARM: dts: NSP: Fix SP805 clock-names
ARM: dts: hisilicon: Fix SP805 clocks
.../bindings/watchdog/arm,sp805.txt | 32 ---------
.../bindings/watchdog/arm,sp805.yaml | 72 +++++++++++++++++++
arch/arm/boot/dts/arm-realview-eb.dtsi | 2 +-
arch/arm/boot/dts/arm-realview-pb11mp.dts | 4 +-
arch/arm/boot/dts/arm-realview-pbx.dtsi | 4 +-
arch/arm/boot/dts/bcm-cygnus.dtsi | 4 +-
arch/arm/boot/dts/bcm-nsp.dtsi | 2 +-
arch/arm/boot/dts/hisi-x5hd2.dtsi | 5 +-
arch/arm/boot/dts/mps2.dtsi | 4 +-
arch/arm/boot/dts/vexpress-v2m-rs1.dtsi | 2 +-
arch/arm/boot/dts/vexpress-v2m.dtsi | 2 +-
arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts | 4 +-
arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts | 2 +-
arch/arm/boot/dts/vexpress-v2p-ca9.dts | 2 +-
arch/arm64/boot/dts/arm/juno-motherboard.dtsi | 2 +-
.../boot/dts/arm/rtsm_ve-motherboard.dtsi | 2 +-
.../boot/dts/broadcom/northstar2/ns2.dtsi | 2 +-
.../boot/dts/broadcom/stingray/stingray.dtsi | 2 +-
.../arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 4 +-
.../arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 16 ++---
.../arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 16 ++---
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 10 +--
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 5 +-
arch/arm64/boot/dts/lg/lg1312.dtsi | 4 +-
arch/arm64/boot/dts/lg/lg1313.dtsi | 4 +-
25 files changed, 126 insertions(+), 82 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/watchdog/arm,sp805.txt
create mode 100644 Documentation/devicetree/bindings/watchdog/arm,sp805.yaml
--
2.17.1
The SP805 binding sets the name for the actual watchdog clock to
"wdog_clk" (with an underscore).
Change the name in the DTs for ARM Ltd. platforms to match that. The
Linux and U-Boot driver use the *first* clock for this purpose anyway,
so it does not break anything.
For MPS2 we only specify one clock so far, but the binding requires
two clocks to be named.
In practice, Linux would pick a clock named "apb_pclk" for the bus
clock, and the Linux and U-Boot SP805 driver would use the first clock
to derive the actual watchdog counter frequency. So since currently both
are the very same clock, we can just double the clock reference, and add
the correct clock-names, to match the binding.
Signed-off-by: Andre Przywara <[email protected]>
---
arch/arm/boot/dts/arm-realview-eb.dtsi | 2 +-
arch/arm/boot/dts/arm-realview-pb11mp.dts | 4 ++--
arch/arm/boot/dts/arm-realview-pbx.dtsi | 4 ++--
arch/arm/boot/dts/mps2.dtsi | 4 ++--
arch/arm/boot/dts/vexpress-v2m-rs1.dtsi | 2 +-
arch/arm/boot/dts/vexpress-v2m.dtsi | 2 +-
arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts | 4 ++--
arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts | 2 +-
arch/arm/boot/dts/vexpress-v2p-ca9.dts | 2 +-
9 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/arch/arm/boot/dts/arm-realview-eb.dtsi b/arch/arm/boot/dts/arm-realview-eb.dtsi
index fe0207b88053..a534a8e444d9 100644
--- a/arch/arm/boot/dts/arm-realview-eb.dtsi
+++ b/arch/arm/boot/dts/arm-realview-eb.dtsi
@@ -390,7 +390,7 @@
compatible = "arm,sp805", "arm,primecell";
reg = <0x10010000 0x1000>;
clocks = <&wdogclk>, <&pclk>;
- clock-names = "wdogclk", "apb_pclk";
+ clock-names = "wdog_clk", "apb_pclk";
status = "disabled";
};
diff --git a/arch/arm/boot/dts/arm-realview-pb11mp.dts b/arch/arm/boot/dts/arm-realview-pb11mp.dts
index 564e2eee2c24..0c7dabef4a5f 100644
--- a/arch/arm/boot/dts/arm-realview-pb11mp.dts
+++ b/arch/arm/boot/dts/arm-realview-pb11mp.dts
@@ -546,7 +546,7 @@
interrupt-parent = <&intc_pb11mp>;
interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&wdogclk>, <&pclk>;
- clock-names = "wdogclk", "apb_pclk";
+ clock-names = "wdog_clk", "apb_pclk";
status = "disabled";
};
@@ -556,7 +556,7 @@
interrupt-parent = <&intc_pb11mp>;
interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&wdogclk>, <&pclk>;
- clock-names = "wdogclk", "apb_pclk";
+ clock-names = "wdog_clk", "apb_pclk";
};
timer01: timer@10011000 {
diff --git a/arch/arm/boot/dts/arm-realview-pbx.dtsi b/arch/arm/boot/dts/arm-realview-pbx.dtsi
index f61bd59ae5ba..ac95667ed781 100644
--- a/arch/arm/boot/dts/arm-realview-pbx.dtsi
+++ b/arch/arm/boot/dts/arm-realview-pbx.dtsi
@@ -381,7 +381,7 @@
compatible = "arm,sp805", "arm,primecell";
reg = <0x1000f000 0x1000>;
clocks = <&wdogclk>, <&pclk>;
- clock-names = "wdogclk", "apb_pclk";
+ clock-names = "wdog_clk", "apb_pclk";
status = "disabled";
};
@@ -389,7 +389,7 @@
compatible = "arm,sp805", "arm,primecell";
reg = <0x10010000 0x1000>;
clocks = <&wdogclk>, <&pclk>;
- clock-names = "wdogclk", "apb_pclk";
+ clock-names = "wdog_clk", "apb_pclk";
status = "disabled";
};
diff --git a/arch/arm/boot/dts/mps2.dtsi b/arch/arm/boot/dts/mps2.dtsi
index 48c34fa282af..37f5023f529c 100644
--- a/arch/arm/boot/dts/mps2.dtsi
+++ b/arch/arm/boot/dts/mps2.dtsi
@@ -199,8 +199,8 @@
arm,primecell-periphid = <0x00141805>;
reg = <0x8000 0x1000>;
interrupts = <0>;
- clocks = <&sysclk>;
- clock-names = "apb_pclk";
+ clocks = <&sysclk>, <&sysclk>;
+ clock-names = "wdog_clk", "apb_pclk";
status = "disabled";
};
};
diff --git a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
index a88ee5294d35..4f7220b11f2d 100644
--- a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
+++ b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
@@ -280,7 +280,7 @@
reg = <0x0f0000 0x1000>;
interrupts = <0>;
clocks = <&v2m_refclk32khz>, <&smbclk>;
- clock-names = "wdogclk", "apb_pclk";
+ clock-names = "wdog_clk", "apb_pclk";
};
v2m_timer01: timer@110000 {
diff --git a/arch/arm/boot/dts/vexpress-v2m.dtsi b/arch/arm/boot/dts/vexpress-v2m.dtsi
index 5e48b641068a..2ac41ed3a57c 100644
--- a/arch/arm/boot/dts/vexpress-v2m.dtsi
+++ b/arch/arm/boot/dts/vexpress-v2m.dtsi
@@ -198,7 +198,7 @@
reg = <0x0f000 0x1000>;
interrupts = <0>;
clocks = <&v2m_refclk32khz>, <&smbclk>;
- clock-names = "wdogclk", "apb_pclk";
+ clock-names = "wdog_clk", "apb_pclk";
};
v2m_timer01: timer@11000 {
diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts b/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts
index f82fa34c90be..e63c5c0bfb43 100644
--- a/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts
@@ -87,8 +87,8 @@
status = "disabled";
reg = <0 0x2b060000 0 0x1000>;
interrupts = <0 98 4>;
- clocks = <&sys_pll>;
- clock-names = "apb_pclk";
+ clocks = <&sys_pll>, <&sys_pll>;
+ clock-names = "wdog_clk", "apb_pclk";
};
gic: interrupt-controller@2c001000 {
diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
index 3ac95a179452..012d40a7228c 100644
--- a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
@@ -128,7 +128,7 @@
reg = <0 0x2a490000 0 0x1000>;
interrupts = <0 98 4>;
clocks = <&oscclk6a>, <&oscclk6a>;
- clock-names = "wdogclk", "apb_pclk";
+ clock-names = "wdog_clk", "apb_pclk";
};
hdlcd@2b000000 {
diff --git a/arch/arm/boot/dts/vexpress-v2p-ca9.dts b/arch/arm/boot/dts/vexpress-v2p-ca9.dts
index 6cddea25a292..4c5847955856 100644
--- a/arch/arm/boot/dts/vexpress-v2p-ca9.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca9.dts
@@ -132,7 +132,7 @@
reg = <0x100e5000 0x1000>;
interrupts = <0 51 4>;
clocks = <&oscclk2>, <&oscclk2>;
- clock-names = "wdogclk", "apb_pclk";
+ clock-names = "wdog_clk", "apb_pclk";
};
scu@1e000000 {
--
2.17.1
The SP805 binding sets the name for the actual watchdog clock to
"wdog_clk" (with an underscore).
Change the name in the DTs for the Broadcom NSP platform to match that.
The Linux and U-Boot driver use the *first* clock for this purpose
anyway, so it does not break anything.
Signed-off-by: Andre Przywara <[email protected]>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
index 1333ef8be0a2..351908b4a39c 100644
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -438,7 +438,7 @@
reg = <0x39000 0x1000>;
interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&iprocslow>, <&iprocslow>;
- clock-names = "wdogclk", "apb_pclk";
+ clock-names = "wdog_clk", "apb_pclk";
};
lcpll0: lcpll0@3f100 {
--
2.17.1
The SP805 DT binding requires two clocks to be specified, but
Hisilicon platform DTs currently only specify one clock.
In practice, Linux would pick a clock named "apb_pclk" for the bus
clock, and the Linux and U-Boot SP805 driver would use the first clock
to derive the actual watchdog counter frequency.
Since currently both are the very same clock, we can just double the
clock reference, and add the correct clock-names, to match the binding.
Signed-off-by: Andre Przywara <[email protected]>
---
arch/arm/boot/dts/hisi-x5hd2.dtsi | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/hisi-x5hd2.dtsi b/arch/arm/boot/dts/hisi-x5hd2.dtsi
index 3ee7967c202d..e2dbf1d8a67b 100644
--- a/arch/arm/boot/dts/hisi-x5hd2.dtsi
+++ b/arch/arm/boot/dts/hisi-x5hd2.dtsi
@@ -370,8 +370,9 @@
arm,primecell-periphid = <0x00141805>;
reg = <0xa2c000 0x1000>;
interrupts = <0 29 4>;
- clocks = <&clock HIX5HD2_WDG0_RST>;
- clock-names = "apb_pclk";
+ clocks = <&clock HIX5HD2_WDG0_RST>,
+ <&clock HIX5HD2_WDG0_RST>;
+ clock-names = "wdog_clk", "apb_pclk";
};
};
--
2.17.1
The SP805 DT binding requires two clocks to be specified, but the two
LG platform DTs currently only specify one clock.
In practice, Linux would pick a clock named "apb_pclk" for the bus
clock, and the Linux (and U-Boot) SP805 driver would use the first clock
to derive the actual watchdog counter frequency.
Since currently both are the very same clock, we can just double the
clock reference, and add the correct clock-names, to match the binding.
Signed-off-by: Andre Przywara <[email protected]>
---
arch/arm64/boot/dts/lg/lg1312.dtsi | 4 ++--
arch/arm64/boot/dts/lg/lg1313.dtsi | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/lg/lg1312.dtsi b/arch/arm64/boot/dts/lg/lg1312.dtsi
index e2a1564597c8..081fe7a9f605 100644
--- a/arch/arm64/boot/dts/lg/lg1312.dtsi
+++ b/arch/arm64/boot/dts/lg/lg1312.dtsi
@@ -141,8 +141,8 @@
compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xfd200000 0x1000>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk_bus>;
- clock-names = "apb_pclk";
+ clocks = <&clk_bus>, <&clk_bus>;
+ clock-names = "wdog_clk", "apb_pclk";
};
uart0: serial@fe000000 {
compatible = "arm,pl011", "arm,primecell";
diff --git a/arch/arm64/boot/dts/lg/lg1313.dtsi b/arch/arm64/boot/dts/lg/lg1313.dtsi
index a54d14d7ae6f..604bb6975337 100644
--- a/arch/arm64/boot/dts/lg/lg1313.dtsi
+++ b/arch/arm64/boot/dts/lg/lg1313.dtsi
@@ -141,8 +141,8 @@
compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xfd200000 0x1000>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk_bus>;
- clock-names = "apb_pclk";
+ clocks = <&clk_bus>, <&clk_bus>;
+ clock-names = "wdog_clk", "apb_pclk";
};
uart0: serial@fe000000 {
compatible = "arm,pl011", "arm,primecell";
--
2.17.1
On Fri, Aug 28, 2020 at 3:06 PM Andre Przywara <[email protected]> wrote:
> The SP805 binding sets the name for the actual watchdog clock to
> "wdog_clk" (with an underscore).
>
> Change the name in the DTs for ARM Ltd. platforms to match that. The
> Linux and U-Boot driver use the *first* clock for this purpose anyway,
> so it does not break anything.
>
> For MPS2 we only specify one clock so far, but the binding requires
> two clocks to be named.
>
> In practice, Linux would pick a clock named "apb_pclk" for the bus
> clock, and the Linux and U-Boot SP805 driver would use the first clock
> to derive the actual watchdog counter frequency. So since currently both
> are the very same clock, we can just double the clock reference, and add
> the correct clock-names, to match the binding.
>
> Signed-off-by: Andre Przywara <[email protected]>
Reviewed-by: Linus Walleij <[email protected]>
Yours,
Linus Walleij
On 8/28/2020 6:06 AM, Andre Przywara wrote:
> The SP805 binding sets the name for the actual watchdog clock to
> "wdog_clk" (with an underscore).
>
> Change the name in the DTs for the Broadcom NSP platform to match that.
> The Linux and U-Boot driver use the *first* clock for this purpose
> anyway, so it does not break anything.
>
> Signed-off-by: Andre Przywara <[email protected]>
> ---
> arch/arm/boot/dts/bcm-nsp.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
> index 1333ef8be0a2..351908b4a39c 100644
> --- a/arch/arm/boot/dts/bcm-nsp.dtsi
> +++ b/arch/arm/boot/dts/bcm-nsp.dtsi
> @@ -438,7 +438,7 @@
> reg = <0x39000 0x1000>;
> interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&iprocslow>, <&iprocslow>;
> - clock-names = "wdogclk", "apb_pclk";
> + clock-names = "wdog_clk", "apb_pclk";
> };
>
> lcpll0: lcpll0@3f100 {
>
Reviewed-by: Ray Jui <[email protected]>
On 8/28/20 6:06 AM, Andre Przywara wrote:
> The SP805 binding sets the name for the actual watchdog clock to
> "wdog_clk" (with an underscore).
>
> Change the name in the DTs for the Broadcom NSP platform to match that.
> The Linux and U-Boot driver use the *first* clock for this purpose
> anyway, so it does not break anything.
>
> Signed-off-by: Andre Przywara <[email protected]>
Acked-by: Florian Fainelli <[email protected]>
--
Florian
On 8/28/20 6:05 AM, Andre Przywara wrote:
> This is an attempt to convert the SP805 watchdog DT binding to yaml.
> This is done in the first patch, the remaining nine fix some DT users.
>
> I couldn't test any of those DT files on actual machines, but tried
> to make the changes in a way that would be transparent to at least the
> Linux driver. The only other SP805 DT user I could find is U-Boot, which
> seems to only use a very minimal subset of the binding (just the first
> clock).
> I only tried to fix those DTs that were easily and reliably fixable.
> AFAICT, a missing primecell compatible string, for instance, would
> prevent the Linux driver from probing the device at all, so I didn't
> dare to touch those DTs at all. Missing clocks are equally fatal.
What is the plan for merging this series? Should Rob pick up all changes
or since those are non critical changes, should we just leave it to the
SoC maintainers to pick up the changes in their tree?
Likewise for the SP804 timer series, what's the plan?
--
Florian
On Fri, Aug 28, 2020 at 1:34 PM Florian Fainelli <[email protected]> wrote:
>
> On 8/28/20 6:05 AM, Andre Przywara wrote:
> > This is an attempt to convert the SP805 watchdog DT binding to yaml.
> > This is done in the first patch, the remaining nine fix some DT users.
> >
> > I couldn't test any of those DT files on actual machines, but tried
> > to make the changes in a way that would be transparent to at least the
> > Linux driver. The only other SP805 DT user I could find is U-Boot, which
> > seems to only use a very minimal subset of the binding (just the first
> > clock).
> > I only tried to fix those DTs that were easily and reliably fixable.
> > AFAICT, a missing primecell compatible string, for instance, would
> > prevent the Linux driver from probing the device at all, so I didn't
> > dare to touch those DTs at all. Missing clocks are equally fatal.
>
> What is the plan for merging this series? Should Rob pick up all changes
> or since those are non critical changes, should we just leave it to the
> SoC maintainers to pick up the changes in their tree?
I don't take .dts files. Either subarch maintainers can pick up
individual patches or send a PR to SoC maintainers.
Rob
On 8/28/20 2:28 PM, Rob Herring wrote:
> On Fri, Aug 28, 2020 at 1:34 PM Florian Fainelli <[email protected]> wrote:
>>
>> On 8/28/20 6:05 AM, Andre Przywara wrote:
>>> This is an attempt to convert the SP805 watchdog DT binding to yaml.
>>> This is done in the first patch, the remaining nine fix some DT users.
>>>
>>> I couldn't test any of those DT files on actual machines, but tried
>>> to make the changes in a way that would be transparent to at least the
>>> Linux driver. The only other SP805 DT user I could find is U-Boot, which
>>> seems to only use a very minimal subset of the binding (just the first
>>> clock).
>>> I only tried to fix those DTs that were easily and reliably fixable.
>>> AFAICT, a missing primecell compatible string, for instance, would
>>> prevent the Linux driver from probing the device at all, so I didn't
>>> dare to touch those DTs at all. Missing clocks are equally fatal.
>>
>> What is the plan for merging this series? Should Rob pick up all changes
>> or since those are non critical changes, should we just leave it to the
>> SoC maintainers to pick up the changes in their tree?
>
> I don't take .dts files. Either subarch maintainers can pick up
> individual patches or send a PR to SoC maintainers.
OK, so we are fine, to say make sure this all lands in v5.10-rc1 at some
point and the warnings should no longer exist by then?
--
Florian
On Fri, 28 Aug 2020 14:06:01 +0100, Andre Przywara <[email protected]> wrote:
> The SP805 binding sets the name for the actual watchdog clock to
> "wdog_clk" (with an underscore).
>
> Change the name in the DTs for the Broadcom NSP platform to match that.
> The Linux and U-Boot driver use the *first* clock for this purpose
> anyway, so it does not break anything.
>
> Signed-off-by: Andre Przywara <[email protected]>
> ---
Applied to qspi-fixes, thanks!
--
Florian
On 28/08/2020 22:32, Florian Fainelli wrote:
Hi,
Florian, thanks for queueing the Broadcom specific patches!
> On 8/28/20 2:28 PM, Rob Herring wrote:
>> On Fri, Aug 28, 2020 at 1:34 PM Florian Fainelli <[email protected]> wrote:
>>>
>>> On 8/28/20 6:05 AM, Andre Przywara wrote:
>>>> This is an attempt to convert the SP805 watchdog DT binding to yaml.
>>>> This is done in the first patch, the remaining nine fix some DT users.
>>>>
>>>> I couldn't test any of those DT files on actual machines, but tried
>>>> to make the changes in a way that would be transparent to at least the
>>>> Linux driver. The only other SP805 DT user I could find is U-Boot, which
>>>> seems to only use a very minimal subset of the binding (just the first
>>>> clock).
>>>> I only tried to fix those DTs that were easily and reliably fixable.
>>>> AFAICT, a missing primecell compatible string, for instance, would
>>>> prevent the Linux driver from probing the device at all, so I didn't
>>>> dare to touch those DTs at all. Missing clocks are equally fatal.
>>>
>>> What is the plan for merging this series? Should Rob pick up all changes
>>> or since those are non critical changes, should we just leave it to the
>>> SoC maintainers to pick up the changes in their tree?
>>
>> I don't take .dts files. Either subarch maintainers can pick up
>> individual patches or send a PR to SoC maintainers.
>
> OK, so we are fine, to say make sure this all lands in v5.10-rc1 at some
> point and the warnings should no longer exist by then?
So yes, I would be very grateful if subsystem maintainers take this at
their discretion.
For once, I didn't actually change anything in the binding, so most
things were already slightly wrong according to the .txt binding, just
nobody realised or cared. So those .dts files changes are actually
independent and justified even without patch 01/10.
Secondly, there are already so many warnings in many .dts files at the
moment, that (in the worst case) a few more - for a brief period of time
- do not really matter. But at the end it will improve the situation.
Rob, if you are fine with the actual binding, I would try to pursue the
remaining subsystem maintainers to get the .dts changes merged.
Thanks,
Andre.
On Fri, Aug 28, 2020 at 9:34 PM Florian Fainelli <[email protected]> wrote:
> On 8/28/20 6:05 AM, Andre Przywara wrote:
> What is the plan for merging this series? Should Rob pick up all changes
> or since those are non critical changes, should we just leave it to the
> SoC maintainers to pick up the changes in their tree?
What about André just send a pull request to the ARM SoC maintainers
for the whole thing?
Yours,
Linus Walleij
On 9/4/2020 1:58 AM, Linus Walleij wrote:
> On Fri, Aug 28, 2020 at 9:34 PM Florian Fainelli <[email protected]> wrote:
>> On 8/28/20 6:05 AM, Andre Przywara wrote:
>
>> What is the plan for merging this series? Should Rob pick up all changes
>> or since those are non critical changes, should we just leave it to the
>> SoC maintainers to pick up the changes in their tree?
>
> What about André just send a pull request to the ARM SoC maintainers
> for the whole thing?
I already applied some of the patches, if we got that route please CC me
so I can drop them from my local queue. Thanks
--
Florian
On 04/09/2020 16:29, Florian Fainelli wrote:
Hi,
> On 9/4/2020 1:58 AM, Linus Walleij wrote:>> On Fri, Aug 28, 2020 at 9:34 PM Florian Fainelli
>> <[email protected]> wrote:
>>> On 8/28/20 6:05 AM, Andre Przywara wrote:
>>
>>> What is the plan for merging this series? Should Rob pick up all changes
>>> or since those are non critical changes, should we just leave it to the
>>> SoC maintainers to pick up the changes in their tree?
>>
>> What about André just send a pull request to the ARM SoC maintainers
>> for the whole thing?
>
> I already applied some of the patches, if we got that route please CC me
> so I can drop them from my local queue. Thanks
I would for sure drop these from any PR.
Rob, are you happy with the actual binding conversion? If you are
willing to take it as it is (Viresh has already acked), I could then
split off the DT fixes and either chase the maintainers or send ARM SoC
a PR. But this really depends on the binding being good.
Cheers,
Andre.
On 9/4/2020 8:35 AM, André Przywara wrote:
> On 04/09/2020 16:29, Florian Fainelli wrote:
>
> Hi,
>
>> On 9/4/2020 1:58 AM, Linus Walleij wrote:>> On Fri, Aug 28, 2020 at 9:34 PM Florian Fainelli
>>> <[email protected]> wrote:
>>>> On 8/28/20 6:05 AM, Andre Przywara wrote:
>>>
>>>> What is the plan for merging this series? Should Rob pick up all changes
>>>> or since those are non critical changes, should we just leave it to the
>>>> SoC maintainers to pick up the changes in their tree?
>>>
>>> What about André just send a pull request to the ARM SoC maintainers
>>> for the whole thing?
>>
>> I already applied some of the patches, if we got that route please CC me
>> so I can drop them from my local queue. Thanks
>
> I would for sure drop these from any PR.
>
> Rob, are you happy with the actual binding conversion? If you are
> willing to take it as it is (Viresh has already acked), I could then
> split off the DT fixes and either chase the maintainers or send ARM SoC
> a PR. But this really depends on the binding being good.
We had discussed this in an another leg of this thread that starts here:
https://lore.kernel.org/linux-devicetree/CAL_JsqKvcGAotS6xL7pu+wM8X33PLCQCuoaXYmWrA3j3OdoR5A@mail.gmail.com/
--
Florian
On Fri, 28 Aug 2020 14:05:52 +0100, Andre Przywara wrote:
> This is an attempt to convert the SP805 watchdog DT binding to yaml.
> This is done in the first patch, the remaining nine fix some DT users.
>
> I couldn't test any of those DT files on actual machines, but tried
> to make the changes in a way that would be transparent to at least the
> Linux driver. The only other SP805 DT user I could find is U-Boot, which
> seems to only use a very minimal subset of the binding (just the first
> clock).
> I only tried to fix those DTs that were easily and reliably fixable.
> AFAICT, a missing primecell compatible string, for instance, would
> prevent the Linux driver from probing the device at all, so I didn't
> dare to touch those DTs at all. Missing clocks are equally fatal.
>
> [...]
I have picked 2 patches for Arm Ltd boards/models.
Applied to sudeep.holla/linux (for-next/juno), thanks!
[1/2] (korg_sudeep/for-next/juno, for-next/juno) arm64: dts: arm: Fix SP805 clock-names
https://git.kernel.org/sudeep.holla/c/b83ded8a31
[2/2] ARM: dts: arm: Fix SP805 clocks
https://git.kernel.org/sudeep.holla/c/a894c6dd56
--
Regards,
Sudeep