Note: These patches are dependent on the firmware-upload patches that
are currently in driver-core-next. There are also a couple of fixup
patches are recommended. These are not necessary if you turn on
both CONFIG_FW_LOADER_USER_HELPER CONFIG_FW_UPLOAD:
https://lore.kernel.org/lkml/[email protected]/
The Intel FPGA Card BMC Secure Update driver instantiates the new
Firmware Upload functionality of the Firmware Loader and provides the
callback functions required to support secure updates on Intel n3000 PAC
devices. This driver is implemented as a sub-driver of the Intel MAX10
BMC mfd driver.
This driver interacts with the HW secure update engine of the FPGA
card BMC in order to transfer new FPGA and BMC images to FLASH on
the FPGA card. Security is enforced by hardware and firmware. The
FPGA Card BMC Secure Update driver interacts with the firmware to
initiate an update, pass in the necessary data, and collect status
on the update.
This driver provides sysfs files for displaying the flash count, the
root entry hashes (REH), and the code-signing-key (CSK) cancellation
vectors.
Changelog v16 -> v17:
- Change m10bmc to cardbmc to reflect the fact that the future devices
will not necessarily use the MAX10. This affects filenames, configs,
symbol names, and the driver name.
- Update the Date and KernelVersion for the ABI documentation to Jul 2022
and 5.19 respectively.
- Updated the copyright end-date to 2022 for the secure update driver.
- Removed references to the FPGA Image Load class driver and replaced
them with the new firmware-upload service from the firmware loader.
- Use xarray_alloc to generate a unique number/name firmware-upload.
- Chang the license from GPL to GPLv2 per commit bf7fbeeae6db ("module:
Cure the MODULE_LICENSE "GPL" vs. "GPL v2" bogosity")
- fw_upload_ops functions will return "enum fw_upload_err" data types
instead of integer values.
Changelog v15 -> v16:
- Use 0 instead of FPGA_IMAGE_ERR_NONE to indicate success.
- The size alignment check was moved from the FPGA Image Load framework
to the prepare() op.
- Added cancel_request boolean flag to struct m10bmc_sec.
- Moved the RSU cancellation logic from m10bmc_sec_cancel() to a new
rsu_cancel() function.
- The m10bmc_sec_cancel() function ONLY sets the cancel_request flag.
The cancel_request flag is checked at the beginning of the
m10bmc_sec_write() and m10bmc_sec_poll_complete() functions.
- Adapt to changed prototypes for the prepare() and write() ops. The
m10bmc_sec_write_blk() function has been renamed to
m10bmc_sec_write().
- Created a cleanup op, m10bmc_sec_cleanup(), to attempt to cancel an
ongoing op during when exiting the update process.
Changelog v14 -> v15:
- Updated the Dates and KernelVersions in the ABI documentation
- Change driver name from "n3000bmc-secure" to "n3000bmc-sec-update".
- Change CONFIG_FPGA_M10_BMC_SECURE to CONFIG_FPGA_M10_BMC_SEC_UPDATE.
- Change instances of *bmc-secure to *bmc-sec-update in file name
and symbol names.
- Change instances of *m10bmc_secure* to *m10bmc-sec_update* in symbol
names.
- Adapted to changes in the FPGA Image Load framework:
(1) All enum types (progress and errors) are now type u32
(2) m10bmc_sec_write_blk() adds *blk_size and max_size parameters
and uses *blk_size as provided by the caller.
(3) m10bmc_sec_poll_complete() no long checks the driver_unload
flag.
Changelog v13 -> v14:
- Changed symbol and text references to reflect the renaming of the
Security Manager Class driver to FPGA Image Load.
Changelog v12 -> v13:
- Updated copyright to 2021
- Updated Date and KernelVersion fields in ABI documentation
- Call updated fpga_sec_mgr_register() and fpga_sec_mgr_unregister()
functions instead of devm_fpga_sec_mgr_create() and
devm_fpga_sec_mgr_register().
Changelog v11 -> v12:
- Updated Date and KernelVersion fields in ABI documentation
- Removed size parameter from the write_blk() op. m10bmc_sec_write_blk()
no longer has a size parameter, and the block size is determined
in this (the lower-level) driver.
Changelog v10 -> v11:
- Added Reviewed-by tag to patch #1
Changelog v9 -> v10:
- Changed the path expressions in the sysfs documentation to
replace the n3000 reference with something more generic to
accommodate other devices that use the same driver.
Changelog v8 -> v9:
- Rebased to 5.12-rc2 next
- Updated Date and KernelVersion in ABI documentation
Changelog v7 -> v8:
- Split out patch "mfd: intel-m10-bmc: support for MAX10 BMC Secure
Updates" and submitted it separately:
https://marc.info/?l=linux-kernel&m=161126987101096&w=2
Changelog v6 -> v7:
- Rebased patches for 5.11-rc2
- Updated Date and KernelVersion in ABI documentation
Changelog v5 -> v6:
- Added WARN_ON() prior to several calls to regmap_bulk_read()
to assert that the (SIZE / stride) calculations did not result
in remainders.
- Changed the (size / stride) calculation in regmap_bulk_write()
call to ensure that we don't write one less than intended.
- Changed flash_count_show() parameter list to achieve
reverse-christmas tree format.
- Removed unnecessary call to rsu_check_complete() in
m10bmc_sec_poll_complete() and changed while loop to
do/while loop.
- Initialized auth_result and doorbell to HW_ERRINFO_POISON
in m10bmc_sec_hw_errinfo() and removed unnecessary if statements.
Changelog v4 -> v5:
- Renamed sysfs node user_flash_count to flash_count and updated
the sysfs documentation accordingly to more accurately descirbe
the purpose of the count.
Changelog v3 -> v4:
- Moved sysfs files for displaying the flash count, the root
entry hashes (REH), and the code-signing-key (CSK) cancellation
vectors from the FPGA Security Manager class driver to this
driver (as they are not generic enough for the class driver).
- Added a new ABI documentation file with informtaion about the
new sysfs entries: sysfs-driver-intel-m10-bmc-secure
- Updated the MAINTAINERS file to add the new ABI documentation
file: sysfs-driver-intel-m10-bmc-secure
- Removed unnecessary ret variable from m10bmc_secure_probe()
- Incorporated new devm_fpga_sec_mgr_register() function into
m10bmc_secure_probe() and removed the m10bmc_secure_remove()
function.
Changelog v2 -> v3:
- Changed "MAX10 BMC Security Engine driver" to "MAX10 BMC Secure
Update driver"
- Changed from "Intel FPGA Security Manager" to FPGA Security Manager"
- Changed: iops -> sops, imgr -> smgr, IFPGA_ -> FPGA_, ifpga_ to fpga_
- Removed wrapper functions (m10bmc_raw_*, m10bmc_sys_*). The
underlying functions are now called directly.
- Changed "_root_entry_hash" to "_reh", with a comment explaining
what reh is.
- Renamed get_csk_vector() to m10bmc_csk_vector()
- Changed calling functions of functions that return "enum fpga_sec_err"
to check for (ret != FPGA_SEC_ERR_NONE) instead of (ret)
Changelog v1 -> v2:
- These patches were previously submitted as part of a larger V1
patch set under the title "Intel FPGA Security Manager Class Driver".
- Grouped all changes to include/linux/mfd/intel-m10-bmc.h into a
single patch: "mfd: intel-m10-bmc: support for MAX10 BMC Security
Engine".
- Removed ifpga_sec_mgr_init() and ifpga_sec_mgr_uinit() functions.
- Adapted to changes in the Intel FPGA Security Manager by splitting
the single call to ifpga_sec_mgr_register() into two function
calls: devm_ifpga_sec_mgr_create() and ifpga_sec_mgr_register().
- Replaced small function-creation macros for explicit function
declarations.
- Bug fix for the get_csk_vector() function to properly apply the
stride variable in calls to m10bmc_raw_bulk_read().
- Added m10bmc_ prefix to functions in m10bmc_iops structure
- Implemented HW_ERRINFO_POISON for m10bmc_sec_hw_errinfo() to
ensure that corresponding bits are set to 1 if we are unable
to read the doorbell or auth_result registers.
- Added comments and additional code cleanup per V1 review.
Russ Weight (5):
mfd: intel-m10-bmc: Rename n3000bmc-secure driver
fpga: cardbmc-sec: create bmc secure update driver
fpga: cardbmc-sec: expose flash update count
fpga: cardbmc-sec: expose canceled keys in sysfs
fpga: cardbmc-sec: add card BMC secure update functions
.../sysfs-driver-intel-cardbmc-sec-update | 61 ++
MAINTAINERS | 7 +
drivers/fpga/Kconfig | 12 +
drivers/fpga/Makefile | 3 +
drivers/fpga/intel-cardbmc-sec-update.c | 587 ++++++++++++++++++
drivers/mfd/intel-m10-bmc.c | 2 +-
6 files changed, 671 insertions(+), 1 deletion(-)
create mode 100644 Documentation/ABI/testing/sysfs-driver-intel-cardbmc-sec-update
create mode 100644 drivers/fpga/intel-cardbmc-sec-update.c
base-commit: 4388f887b857de8576a8bf7fefc1202dc7dd10df
--
2.25.1
Extend the FPGA Card BMC Secure Update driver to provide sysfs files to
expose the canceled code signing key (CSK) bit vectors. These use the
standard bitmap list format (e.g. 1,2-6,9).
Signed-off-by: Russ Weight <[email protected]>
Reviewed-by: Tom Rix <[email protected]>
---
v17:
- Update the Date and KernelVersion for the ABI documentation to Jul 2022
and 5.19 respectively.
- Change "m10bmc" in symbol names to "cardbmc" to reflect the fact that the
future devices will not necessarily use the MAX10.
v16:
- No Change
v15:
- Updated the Dates and KernelVersions in the ABI documentation
v14:
- No changes
v13:
- Updated ABI documentation date and kernel version
v12:
- Updated Date and KernelVersion fields in ABI documentation
v11:
- No change
v10:
- Changed the path expressions in the sysfs documentation to
replace the n3000 reference with something more generic to
accomodate other devices that use the same driver.
v9:
- Rebased to 5.12-rc2 next
- Updated Date and KernelVersion in ABI documentation
v8:
- Previously patch 4/6, otherwise no change
v7:
- Updated Date and KernelVersion in ABI documentation
v6:
- Added WARN_ON() call for (size / stride) to ensure
that the proper count is passed to regmap_bulk_read().
v5:
- No change
v4:
- Moved sysfs files for displaying the code-signing-key (CSK)
cancellation vectors from the FPGA Security Manger class driver
to here. The m10bmc_csk_vector() and m10bmc_csk_cancel_nbits()
functions are removed and the functionality from these functions
is moved into a show_canceled_csk() function for for displaying
the CSK vectors.
- Added ABI documentation for new sysfs entries
v3:
- Changed: iops -> sops, imgr -> smgr, IFPGA_ -> FPGA_, ifpga_ to fpga_
- Changed "MAX10 BMC Secure Engine driver" to "MAX10 BMC Secure Update
driver"
- Removed wrapper functions (m10bmc_raw_*, m10bmc_sys_*). The
underlying functions are now called directly.
- Renamed get_csk_vector() to m10bmc_csk_vector()
v2:
- Replaced small function-creation macros for explicit function
declarations.
- Fixed get_csk_vector() function to properly apply the stride
variable in calls to m10bmc_raw_bulk_read()
- Added m10bmc_ prefix to functions in m10bmc_iops structure
---
.../sysfs-driver-intel-cardbmc-sec-update | 24 ++++++++++
drivers/fpga/intel-cardbmc-sec-update.c | 48 +++++++++++++++++++
2 files changed, 72 insertions(+)
diff --git a/Documentation/ABI/testing/sysfs-driver-intel-cardbmc-sec-update b/Documentation/ABI/testing/sysfs-driver-intel-cardbmc-sec-update
index 80279a3e36a5..7fe0d03c3175 100644
--- a/Documentation/ABI/testing/sysfs-driver-intel-cardbmc-sec-update
+++ b/Documentation/ABI/testing/sysfs-driver-intel-cardbmc-sec-update
@@ -28,6 +28,30 @@ Description: Read only. Returns the root entry hash for the BMC image
underlying device supports it.
Format: "0x%x".
+What: /sys/bus/platform/drivers/intel-cardbmc-sec-update/.../security/sr_canceled_csks
+Date: Jul 2022
+KernelVersion: 5.19
+Contact: Russ Weight <[email protected]>
+Description: Read only. Returns a list of indices for canceled code
+ signing keys for the static region. The standard bitmap
+ list format is used (e.g. "1,2-6,9").
+
+What: /sys/bus/platform/drivers/intel-cardbmc-sec-update/.../security/pr_canceled_csks
+Date: Jul 2022
+KernelVersion: 5.19
+Contact: Russ Weight <[email protected]>
+Description: Read only. Returns a list of indices for canceled code
+ signing keys for the partial reconfiguration region. The
+ standard bitmap list format is used (e.g. "1,2-6,9").
+
+What: /sys/bus/platform/drivers/intel-cardbmc-sec-update/.../security/bmc_canceled_csks
+Date: Jul 2022
+KernelVersion: 5.19
+Contact: Russ Weight <[email protected]>
+Description: Read only. Returns a list of indices for canceled code
+ signing keys for the BMC. The standard bitmap list format
+ is used (e.g. "1,2-6,9").
+
What: /sys/bus/platform/drivers/intel-cardbmc-sec-update/.../security/flash_count
Date: Jul 2022
KernelVersion: 5.19
diff --git a/drivers/fpga/intel-cardbmc-sec-update.c b/drivers/fpga/intel-cardbmc-sec-update.c
index 12c8ebdf4c14..0b268d925e0a 100644
--- a/drivers/fpga/intel-cardbmc-sec-update.c
+++ b/drivers/fpga/intel-cardbmc-sec-update.c
@@ -84,6 +84,51 @@ DEVICE_ATTR_SEC_REH_RO(bmc, BMC_PROG_MAGIC, BMC_PROG_ADDR, BMC_REH_ADDR);
DEVICE_ATTR_SEC_REH_RO(sr, SR_PROG_MAGIC, SR_PROG_ADDR, SR_REH_ADDR);
DEVICE_ATTR_SEC_REH_RO(pr, PR_PROG_MAGIC, PR_PROG_ADDR, PR_REH_ADDR);
+#define CSK_BIT_LEN 128U
+#define CSK_32ARRAY_SIZE DIV_ROUND_UP(CSK_BIT_LEN, 32)
+
+static ssize_t
+show_canceled_csk(struct device *dev, u32 addr, char *buf)
+{
+ unsigned int i, stride, size = CSK_32ARRAY_SIZE * sizeof(u32);
+ struct bmc_sec *sec = dev_get_drvdata(dev);
+ DECLARE_BITMAP(csk_map, CSK_BIT_LEN);
+ __le32 csk_le32[CSK_32ARRAY_SIZE];
+ u32 csk32[CSK_32ARRAY_SIZE];
+ int ret;
+
+ stride = regmap_get_reg_stride(sec->m10bmc->regmap);
+
+ WARN_ON(size % stride);
+ ret = regmap_bulk_read(sec->m10bmc->regmap, addr, csk_le32,
+ size / stride);
+ if (ret) {
+ dev_err(sec->dev, "failed to read CSK vector: %x cnt %x: %d\n",
+ addr, size / stride, ret);
+ return ret;
+ }
+
+ for (i = 0; i < CSK_32ARRAY_SIZE; i++)
+ csk32[i] = le32_to_cpu(((csk_le32[i])));
+
+ bitmap_from_arr32(csk_map, csk32, CSK_BIT_LEN);
+ bitmap_complement(csk_map, csk_map, CSK_BIT_LEN);
+ return bitmap_print_to_pagebuf(1, buf, csk_map, CSK_BIT_LEN);
+}
+
+#define DEVICE_ATTR_SEC_CSK_RO(_name, _addr) \
+static ssize_t _name##_canceled_csks_show(struct device *dev, \
+ struct device_attribute *attr, \
+ char *buf) \
+{ return show_canceled_csk(dev, _addr, buf); } \
+static DEVICE_ATTR_RO(_name##_canceled_csks)
+
+#define CSK_VEC_OFFSET 0x34
+
+DEVICE_ATTR_SEC_CSK_RO(bmc, BMC_PROG_ADDR + CSK_VEC_OFFSET);
+DEVICE_ATTR_SEC_CSK_RO(sr, SR_PROG_ADDR + CSK_VEC_OFFSET);
+DEVICE_ATTR_SEC_CSK_RO(pr, PR_PROG_ADDR + CSK_VEC_OFFSET);
+
#define FLASH_COUNT_SIZE 4096 /* count stored as inverted bit vector */
static ssize_t flash_count_show(struct device *dev,
@@ -124,6 +169,9 @@ static struct attribute *bmc_security_attrs[] = {
&dev_attr_bmc_root_entry_hash.attr,
&dev_attr_sr_root_entry_hash.attr,
&dev_attr_pr_root_entry_hash.attr,
+ &dev_attr_sr_canceled_csks.attr,
+ &dev_attr_pr_canceled_csks.attr,
+ &dev_attr_bmc_canceled_csks.attr,
NULL,
};
--
2.25.1
Create a sub driver for the FPGA Card BMC in order to support secure
updates. This sub-driver uses the Firmware Upload support of the
Firmware Loader subsystem to transfer the image data to the device.
This patch creates the FPGA Card BMC Secure Update driver and provides
sysfs files for displaying the current root entry hashes for the FPGA
static region, the FPGA PR region, and the card BMC.
Signed-off-by: Russ Weight <[email protected]>
Reviewed-by: Tom Rix <[email protected]>
---
v17:
- Update the Date and KernelVersion for the ABI documentation to Jul 2022
and 5.19 respectively.
- Updated the copyright end-date to 2022 for the secure update driver.
- Change m10bmc to cardbmc to reflect the fact that the future devices
will not necessarily use the MAX10. This affects filenames, configs, and
symbol names.
- Removed references to the FPGA Image Load class driver and replaced
them with the new firmware-upload service from the firmware loader.
- Firmware upload requires a unique name for the firmware device. Use
xarray_alloc to generate a unique number to append to the name.
- Changed the license from GPL to GPLv2 per commit bf7fbeeae6db: 'module:
Cure the MODULE_LICENSE "GPL" vs. "GPL v2" bogosity'
v16:
- No Change
v15:
- Updated the Dates and KernelVersions in the ABI documentation
- Change driver name from "n3000bmc-secure" to "n3000bmc-sec-update".
- Change CONFIG_FPGA_M10_BMC_SECURE to CONFIG_FPGA_M10_BMC_SEC_UPDATE.
- Change instances of *bmc-secure to *bmc-sec-update in file name
and symbol names.
- Change instances of *m10bmc_secure* to *m10bmc-sec_update* in symbol
names.
- Change instances of *lops* to *ops* in symbol names.
v14:
- Changed symbol and text references to reflect the renaming of the
Security Manager Class driver to FPGA Image Load.
v13:
- Updated copyright to 2021
- Updated ABI documentation date and kernel version
- Call updated fpga_sec_mgr_register() and fpga_sec_mgr_unregister()
functions instead of devm_fpga_sec_mgr_create() and
devm_fpga_sec_mgr_register().
v12:
- Updated Date and KernelVersion fields in ABI documentation
v11:
- Added Reviewed-by tag
v10:
- Changed the path expressions in the sysfs documentation to
replace the n3000 reference with something more generic to
accomodate other devices that use the same driver.
v9:
- Rebased to 5.12-rc2 next
- Updated Date and KernelVersion in ABI documentation
v8:
- Previously patch 2/6, otherwise no change
v7:
- Updated Date and KernelVersion in ABI documentation
v6:
- Added WARN_ON() call for (sha_num_bytes / stride) to assert
that the proper count is passed to regmap_bulk_read().
v5:
- No change
v4:
- Moved sysfs files for displaying the root entry hashes (REH)
from the FPGA Security Manager class driver to here. The
m10bmc_reh() and m10bmc_reh_size() functions are removed and
the functionality from these functions is moved into a
show_root_entry_hash() function for displaying the REHs.
- Added ABI documentation for the new sysfs entries:
sysfs-driver-intel-m10-bmc-secure
- Updated the MAINTAINERS file to add the new ABI documentation
file: sysfs-driver-intel-m10-bmc-secure
- Removed unnecessary ret variable from m10bmc_secure_probe()
- Incorporated new devm_fpga_sec_mgr_register() function into
m10bmc_secure_probe() and removed the m10bmc_secure_remove()
function.
v3:
- Changed from "Intel FPGA Security Manager" to FPGA Security Manager"
- Changed: iops -> sops, imgr -> smgr, IFPGA_ -> FPGA_, ifpga_ to fpga_
- Changed "MAX10 BMC Secure Engine driver" to "MAX10 BMC Secure
Update driver"
- Removed wrapper functions (m10bmc_raw_*, m10bmc_sys_*). The
underlying functions are now called directly.
- Changed "_root_entry_hash" to "_reh", with a comment explaining
what reh is.
v2:
- Added drivers/fpga/intel-m10-bmc-secure.c file to MAINTAINERS.
- Switched to GENMASK(31, 16) for a couple of mask definitions.
- Moved MAX10 BMC address and function definitions to a separate
patch.
- Replaced small function-creation macros with explicit function
declarations.
- Removed ifpga_sec_mgr_init() and ifpga_sec_mgr_uinit() functions.
- Adapted to changes in the Intel FPGA Security Manager by splitting
the single call to ifpga_sec_mgr_register() into two function
calls: devm_ifpga_sec_mgr_create() and ifpga_sec_mgr_register().
---
.../sysfs-driver-intel-cardbmc-sec-update | 29 +++
MAINTAINERS | 7 +
drivers/fpga/Kconfig | 12 ++
drivers/fpga/Makefile | 3 +
drivers/fpga/intel-cardbmc-sec-update.c | 167 ++++++++++++++++++
5 files changed, 218 insertions(+)
create mode 100644 Documentation/ABI/testing/sysfs-driver-intel-cardbmc-sec-update
create mode 100644 drivers/fpga/intel-cardbmc-sec-update.c
diff --git a/Documentation/ABI/testing/sysfs-driver-intel-cardbmc-sec-update b/Documentation/ABI/testing/sysfs-driver-intel-cardbmc-sec-update
new file mode 100644
index 000000000000..c032fbe59614
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-driver-intel-cardbmc-sec-update
@@ -0,0 +1,29 @@
+What: /sys/bus/platform/drivers/intel-cardbmc-sec-update/.../security/sr_root_entry_hash
+Date: Jul 2022
+KernelVersion: 5.19
+Contact: Russ Weight <[email protected]>
+Description: Read only. Returns the root entry hash for the static
+ region if one is programmed, else it returns the
+ string: "hash not programmed". This file is only
+ visible if the underlying device supports it.
+ Format: "0x%x".
+
+What: /sys/bus/platform/drivers/intel-cardbmc-sec-update/.../security/pr_root_entry_hash
+Date: Jul 2022
+KernelVersion: 5.19
+Contact: Russ Weight <[email protected]>
+Description: Read only. Returns the root entry hash for the partial
+ reconfiguration region if one is programmed, else it
+ returns the string: "hash not programmed". This file
+ is only visible if the underlying device supports it.
+ Format: "0x%x".
+
+What: /sys/bus/platform/drivers/intel-cardbmc-sec-update/.../security/bmc_root_entry_hash
+Date: Jul 2022
+KernelVersion: 5.19
+Contact: Russ Weight <[email protected]>
+Description: Read only. Returns the root entry hash for the BMC image
+ if one is programmed, else it returns the string:
+ "hash not programmed". This file is only visible if the
+ underlying device supports it.
+ Format: "0x%x".
diff --git a/MAINTAINERS b/MAINTAINERS
index 61d9f114c37f..43feaaa25352 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -7725,6 +7725,13 @@ F: Documentation/fpga/
F: drivers/fpga/
F: include/linux/fpga/
+FPGA BMC INTEL SECURE UPDATES
+M: Russ Weight <[email protected]>
+L: [email protected]
+S: Maintained
+F: Documentation/ABI/testing/sysfs-driver-intel-cardbmc-sec-update
+F: drivers/fpga/intel-cardbmc-sec-update.c
+
FPU EMULATOR
M: Bill Metzenthen <[email protected]>
S: Maintained
diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index 991b3f361ec9..346889e3096a 100644
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -243,4 +243,16 @@ config FPGA_MGR_VERSAL_FPGA
configure the programmable logic(PL).
To compile this as a module, choose M here.
+
+config FPGA_CARDBMC_SEC_UPDATE
+ tristate "Intel FPGA Card BMC Secure Update driver"
+ depends on MFD_INTEL_M10_BMC && FW_UPLOAD
+ help
+ Secure update support for the Intel FPGA board management
+ controller.
+
+ This is a subdriver of the Intel MAX10 board management controller
+ (BMC) and provides support for secure updates for the BMC image,
+ the FPGA image, the Root Entry Hashes, etc.
+
endif # FPGA
diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile
index 0bff783d1b61..daf427393ba9 100644
--- a/drivers/fpga/Makefile
+++ b/drivers/fpga/Makefile
@@ -22,6 +22,9 @@ obj-$(CONFIG_FPGA_MGR_VERSAL_FPGA) += versal-fpga.o
obj-$(CONFIG_ALTERA_PR_IP_CORE) += altera-pr-ip-core.o
obj-$(CONFIG_ALTERA_PR_IP_CORE_PLAT) += altera-pr-ip-core-plat.o
+# FPGA Secure Update Drivers
+obj-$(CONFIG_FPGA_CARDBMC_SEC_UPDATE) += intel-cardbmc-sec-update.o
+
# FPGA Bridge Drivers
obj-$(CONFIG_FPGA_BRIDGE) += fpga-bridge.o
obj-$(CONFIG_SOCFPGA_FPGA_BRIDGE) += altera-hps2fpga.o altera-fpga2sdram.o
diff --git a/drivers/fpga/intel-cardbmc-sec-update.c b/drivers/fpga/intel-cardbmc-sec-update.c
new file mode 100644
index 000000000000..ba3559f3335d
--- /dev/null
+++ b/drivers/fpga/intel-cardbmc-sec-update.c
@@ -0,0 +1,167 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Intel Max10 Board Management Controller Secure Update Driver
+ *
+ * Copyright (C) 2019-2022 Intel Corporation. All rights reserved.
+ *
+ */
+#include <linux/bitfield.h>
+#include <linux/device.h>
+#include <linux/firmware.h>
+#include <linux/mfd/intel-m10-bmc.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+
+struct bmc_sec {
+ struct device *dev;
+ struct intel_m10bmc *m10bmc;
+ struct fw_upload *fwl;
+ char *fw_name;
+ u32 fw_name_id;
+};
+
+static DEFINE_XARRAY_ALLOC(fw_upload_xa);
+
+/* Root Entry Hash (REH) support */
+#define REH_SHA256_SIZE 32
+#define REH_SHA384_SIZE 48
+#define REH_MAGIC GENMASK(15, 0)
+#define REH_SHA_NUM_BYTES GENMASK(31, 16)
+
+static ssize_t
+show_root_entry_hash(struct device *dev, u32 exp_magic,
+ u32 prog_addr, u32 reh_addr, char *buf)
+{
+ struct bmc_sec *sec = dev_get_drvdata(dev);
+ unsigned int stride = regmap_get_reg_stride(sec->m10bmc->regmap);
+ int sha_num_bytes, i, cnt, ret;
+ u8 hash[REH_SHA384_SIZE];
+ u32 magic;
+
+ ret = m10bmc_raw_read(sec->m10bmc, prog_addr, &magic);
+ if (ret)
+ return ret;
+
+ dev_dbg(dev, "%s magic 0x%08x\n", __func__, magic);
+
+ if (FIELD_GET(REH_MAGIC, magic) != exp_magic)
+ return sysfs_emit(buf, "hash not programmed\n");
+
+ sha_num_bytes = FIELD_GET(REH_SHA_NUM_BYTES, magic) / 8;
+ if (sha_num_bytes != REH_SHA256_SIZE &&
+ sha_num_bytes != REH_SHA384_SIZE) {
+ dev_err(sec->dev, "%s bad sha num bytes %d\n", __func__,
+ sha_num_bytes);
+ return -EINVAL;
+ }
+
+ WARN_ON(sha_num_bytes % stride);
+ ret = regmap_bulk_read(sec->m10bmc->regmap, reh_addr,
+ hash, sha_num_bytes / stride);
+ if (ret) {
+ dev_err(dev, "failed to read root entry hash: %x cnt %x: %d\n",
+ reh_addr, sha_num_bytes / stride, ret);
+ return ret;
+ }
+
+ cnt = sprintf(buf, "0x");
+ for (i = 0; i < sha_num_bytes; i++)
+ cnt += sprintf(buf + cnt, "%02x", hash[i]);
+ cnt += sprintf(buf + cnt, "\n");
+
+ return cnt;
+}
+
+#define DEVICE_ATTR_SEC_REH_RO(_name, _magic, _prog_addr, _reh_addr) \
+static ssize_t _name##_root_entry_hash_show(struct device *dev, \
+ struct device_attribute *attr, \
+ char *buf) \
+{ return show_root_entry_hash(dev, _magic, _prog_addr, _reh_addr, buf); } \
+static DEVICE_ATTR_RO(_name##_root_entry_hash)
+
+DEVICE_ATTR_SEC_REH_RO(bmc, BMC_PROG_MAGIC, BMC_PROG_ADDR, BMC_REH_ADDR);
+DEVICE_ATTR_SEC_REH_RO(sr, SR_PROG_MAGIC, SR_PROG_ADDR, SR_REH_ADDR);
+DEVICE_ATTR_SEC_REH_RO(pr, PR_PROG_MAGIC, PR_PROG_ADDR, PR_REH_ADDR);
+
+static struct attribute *bmc_security_attrs[] = {
+ &dev_attr_bmc_root_entry_hash.attr,
+ &dev_attr_sr_root_entry_hash.attr,
+ &dev_attr_pr_root_entry_hash.attr,
+ NULL,
+};
+
+static struct attribute_group bmc_security_attr_group = {
+ .name = "security",
+ .attrs = bmc_security_attrs,
+};
+
+static const struct attribute_group *bmc_sec_attr_groups[] = {
+ &bmc_security_attr_group,
+ NULL,
+};
+
+static const struct fw_upload_ops cardbmc_ops = { };
+
+#define SEC_UPDATE_LEN_MAX 32
+static int bmc_sec_probe(struct platform_device *pdev)
+{
+ char buf[SEC_UPDATE_LEN_MAX];
+ struct bmc_sec *sec;
+ struct fw_upload *fwl;
+ unsigned int len, ret;
+
+ sec = devm_kzalloc(&pdev->dev, sizeof(*sec), GFP_KERNEL);
+ if (!sec)
+ return -ENOMEM;
+
+ sec->dev = &pdev->dev;
+ sec->m10bmc = dev_get_drvdata(pdev->dev.parent);
+ dev_set_drvdata(&pdev->dev, sec);
+
+ ret = xa_alloc(&fw_upload_xa, &sec->fw_name_id, sec,
+ xa_limit_32b, GFP_KERNEL);
+ if (ret)
+ return ret;
+
+ len = scnprintf(buf, SEC_UPDATE_LEN_MAX, "secure-update%d",
+ sec->fw_name_id);
+ sec->fw_name = kmemdup_nul(buf, len, GFP_KERNEL);
+
+ fwl = firmware_upload_register(THIS_MODULE, sec->dev, sec->fw_name,
+ &cardbmc_ops, sec);
+ if (IS_ERR(fwl)) {
+ dev_err(sec->dev, "Firmware Upload driver failed to start\n");
+ kfree(sec->fw_name);
+ xa_erase(&fw_upload_xa, sec->fw_name_id);
+ return PTR_ERR(fwl);
+ }
+
+ sec->fwl = fwl;
+ return 0;
+}
+
+static int bmc_sec_remove(struct platform_device *pdev)
+{
+ struct bmc_sec *sec = dev_get_drvdata(&pdev->dev);
+
+ firmware_upload_unregister(sec->fwl);
+ kfree(sec->fw_name);
+ xa_erase(&fw_upload_xa, sec->fw_name_id);
+ return 0;
+}
+
+static struct platform_driver intel_cardbmc_sec_driver = {
+ .probe = bmc_sec_probe,
+ .remove = bmc_sec_remove,
+ .driver = {
+ .name = "n3000bmc-sec-update",
+ .dev_groups = bmc_sec_attr_groups,
+ },
+};
+module_platform_driver(intel_cardbmc_sec_driver);
+
+MODULE_ALIAS("platform:n3000bmc-sec-update");
+MODULE_AUTHOR("Intel Corporation");
+MODULE_DESCRIPTION("Intel MAX10 BMC Secure Update");
+MODULE_LICENSE("GPL");
--
2.25.1
On Thu, Apr 28, 2022 at 04:37:29PM -0700, Russ Weight wrote:
> Create a sub driver for the FPGA Card BMC in order to support secure
> updates. This sub-driver uses the Firmware Upload support of the
> Firmware Loader subsystem to transfer the image data to the device.
>
> This patch creates the FPGA Card BMC Secure Update driver and provides
> sysfs files for displaying the current root entry hashes for the FPGA
> static region, the FPGA PR region, and the card BMC.
>
> Signed-off-by: Russ Weight <[email protected]>
> Reviewed-by: Tom Rix <[email protected]>
> ---
> v17:
> - Update the Date and KernelVersion for the ABI documentation to Jul 2022
> and 5.19 respectively.
> - Updated the copyright end-date to 2022 for the secure update driver.
> - Change m10bmc to cardbmc to reflect the fact that the future devices
> will not necessarily use the MAX10. This affects filenames, configs, and
> symbol names.
> - Removed references to the FPGA Image Load class driver and replaced
> them with the new firmware-upload service from the firmware loader.
> - Firmware upload requires a unique name for the firmware device. Use
> xarray_alloc to generate a unique number to append to the name.
> - Changed the license from GPL to GPLv2 per commit bf7fbeeae6db: 'module:
> Cure the MODULE_LICENSE "GPL" vs. "GPL v2" bogosity'
> v16:
> - No Change
> v15:
> - Updated the Dates and KernelVersions in the ABI documentation
> - Change driver name from "n3000bmc-secure" to "n3000bmc-sec-update".
> - Change CONFIG_FPGA_M10_BMC_SECURE to CONFIG_FPGA_M10_BMC_SEC_UPDATE.
> - Change instances of *bmc-secure to *bmc-sec-update in file name
> and symbol names.
> - Change instances of *m10bmc_secure* to *m10bmc-sec_update* in symbol
> names.
> - Change instances of *lops* to *ops* in symbol names.
> v14:
> - Changed symbol and text references to reflect the renaming of the
> Security Manager Class driver to FPGA Image Load.
> v13:
> - Updated copyright to 2021
> - Updated ABI documentation date and kernel version
> - Call updated fpga_sec_mgr_register() and fpga_sec_mgr_unregister()
> functions instead of devm_fpga_sec_mgr_create() and
> devm_fpga_sec_mgr_register().
> v12:
> - Updated Date and KernelVersion fields in ABI documentation
> v11:
> - Added Reviewed-by tag
> v10:
> - Changed the path expressions in the sysfs documentation to
> replace the n3000 reference with something more generic to
> accomodate other devices that use the same driver.
> v9:
> - Rebased to 5.12-rc2 next
> - Updated Date and KernelVersion in ABI documentation
> v8:
> - Previously patch 2/6, otherwise no change
> v7:
> - Updated Date and KernelVersion in ABI documentation
> v6:
> - Added WARN_ON() call for (sha_num_bytes / stride) to assert
> that the proper count is passed to regmap_bulk_read().
> v5:
> - No change
> v4:
> - Moved sysfs files for displaying the root entry hashes (REH)
> from the FPGA Security Manager class driver to here. The
> m10bmc_reh() and m10bmc_reh_size() functions are removed and
> the functionality from these functions is moved into a
> show_root_entry_hash() function for displaying the REHs.
> - Added ABI documentation for the new sysfs entries:
> sysfs-driver-intel-m10-bmc-secure
> - Updated the MAINTAINERS file to add the new ABI documentation
> file: sysfs-driver-intel-m10-bmc-secure
> - Removed unnecessary ret variable from m10bmc_secure_probe()
> - Incorporated new devm_fpga_sec_mgr_register() function into
> m10bmc_secure_probe() and removed the m10bmc_secure_remove()
> function.
> v3:
> - Changed from "Intel FPGA Security Manager" to FPGA Security Manager"
> - Changed: iops -> sops, imgr -> smgr, IFPGA_ -> FPGA_, ifpga_ to fpga_
> - Changed "MAX10 BMC Secure Engine driver" to "MAX10 BMC Secure
> Update driver"
> - Removed wrapper functions (m10bmc_raw_*, m10bmc_sys_*). The
> underlying functions are now called directly.
> - Changed "_root_entry_hash" to "_reh", with a comment explaining
> what reh is.
> v2:
> - Added drivers/fpga/intel-m10-bmc-secure.c file to MAINTAINERS.
> - Switched to GENMASK(31, 16) for a couple of mask definitions.
> - Moved MAX10 BMC address and function definitions to a separate
> patch.
> - Replaced small function-creation macros with explicit function
> declarations.
> - Removed ifpga_sec_mgr_init() and ifpga_sec_mgr_uinit() functions.
> - Adapted to changes in the Intel FPGA Security Manager by splitting
> the single call to ifpga_sec_mgr_register() into two function
> calls: devm_ifpga_sec_mgr_create() and ifpga_sec_mgr_register().
> ---
> .../sysfs-driver-intel-cardbmc-sec-update | 29 +++
> MAINTAINERS | 7 +
> drivers/fpga/Kconfig | 12 ++
> drivers/fpga/Makefile | 3 +
> drivers/fpga/intel-cardbmc-sec-update.c | 167 ++++++++++++++++++
> 5 files changed, 218 insertions(+)
> create mode 100644 Documentation/ABI/testing/sysfs-driver-intel-cardbmc-sec-update
> create mode 100644 drivers/fpga/intel-cardbmc-sec-update.c
>
> diff --git a/Documentation/ABI/testing/sysfs-driver-intel-cardbmc-sec-update b/Documentation/ABI/testing/sysfs-driver-intel-cardbmc-sec-update
> new file mode 100644
> index 000000000000..c032fbe59614
> --- /dev/null
> +++ b/Documentation/ABI/testing/sysfs-driver-intel-cardbmc-sec-update
> @@ -0,0 +1,29 @@
> +What: /sys/bus/platform/drivers/intel-cardbmc-sec-update/.../security/sr_root_entry_hash
> +Date: Jul 2022
> +KernelVersion: 5.19
> +Contact: Russ Weight <[email protected]>
> +Description: Read only. Returns the root entry hash for the static
> + region if one is programmed, else it returns the
> + string: "hash not programmed". This file is only
> + visible if the underlying device supports it.
> + Format: "0x%x".
Should the format be "string'? I always see the hash value is a hexadecimal
string without "0x" prefix. So why you want to output it like a large
hex number?
> +
> +What: /sys/bus/platform/drivers/intel-cardbmc-sec-update/.../security/pr_root_entry_hash
> +Date: Jul 2022
> +KernelVersion: 5.19
> +Contact: Russ Weight <[email protected]>
> +Description: Read only. Returns the root entry hash for the partial
> + reconfiguration region if one is programmed, else it
> + returns the string: "hash not programmed". This file
> + is only visible if the underlying device supports it.
> + Format: "0x%x".
Same concern.
> +
> +What: /sys/bus/platform/drivers/intel-cardbmc-sec-update/.../security/bmc_root_entry_hash
> +Date: Jul 2022
> +KernelVersion: 5.19
> +Contact: Russ Weight <[email protected]>
> +Description: Read only. Returns the root entry hash for the BMC image
> + if one is programmed, else it returns the string:
> + "hash not programmed". This file is only visible if the
> + underlying device supports it.
> + Format: "0x%x".
Same.
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 61d9f114c37f..43feaaa25352 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -7725,6 +7725,13 @@ F: Documentation/fpga/
> F: drivers/fpga/
> F: include/linux/fpga/
>
> +FPGA BMC INTEL SECURE UPDATES
> +M: Russ Weight <[email protected]>
> +L: [email protected]
> +S: Maintained
> +F: Documentation/ABI/testing/sysfs-driver-intel-cardbmc-sec-update
> +F: drivers/fpga/intel-cardbmc-sec-update.c
> +
> FPU EMULATOR
> M: Bill Metzenthen <[email protected]>
> S: Maintained
> diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
> index 991b3f361ec9..346889e3096a 100644
> --- a/drivers/fpga/Kconfig
> +++ b/drivers/fpga/Kconfig
> @@ -243,4 +243,16 @@ config FPGA_MGR_VERSAL_FPGA
> configure the programmable logic(PL).
>
> To compile this as a module, choose M here.
> +
> +config FPGA_CARDBMC_SEC_UPDATE
INTEL_FPGA_CARDBMC_SEC_UPDATE ?
> + tristate "Intel FPGA Card BMC Secure Update driver"
> + depends on MFD_INTEL_M10_BMC && FW_UPLOAD
You mentioned that the driver supports devices which may not use max10,
so is it possible to remove the depends on MFD_INTEL_M10_BMC?
Some more stuff related to max10 in this patch.
> + help
> + Secure update support for the Intel FPGA board management
> + controller.
> +
> + This is a subdriver of the Intel MAX10 board management controller
And the same concern here.
> + (BMC) and provides support for secure updates for the BMC image,
> + the FPGA image, the Root Entry Hashes, etc.
> +
> endif # FPGA
> diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile
> index 0bff783d1b61..daf427393ba9 100644
> --- a/drivers/fpga/Makefile
> +++ b/drivers/fpga/Makefile
> @@ -22,6 +22,9 @@ obj-$(CONFIG_FPGA_MGR_VERSAL_FPGA) += versal-fpga.o
> obj-$(CONFIG_ALTERA_PR_IP_CORE) += altera-pr-ip-core.o
> obj-$(CONFIG_ALTERA_PR_IP_CORE_PLAT) += altera-pr-ip-core-plat.o
>
> +# FPGA Secure Update Drivers
> +obj-$(CONFIG_FPGA_CARDBMC_SEC_UPDATE) += intel-cardbmc-sec-update.o
CONFIG_INTEL_FPGA_CARDBMC_SEC_UPDATE ?
> +
> # FPGA Bridge Drivers
> obj-$(CONFIG_FPGA_BRIDGE) += fpga-bridge.o
> obj-$(CONFIG_SOCFPGA_FPGA_BRIDGE) += altera-hps2fpga.o altera-fpga2sdram.o
> diff --git a/drivers/fpga/intel-cardbmc-sec-update.c b/drivers/fpga/intel-cardbmc-sec-update.c
> new file mode 100644
> index 000000000000..ba3559f3335d
> --- /dev/null
> +++ b/drivers/fpga/intel-cardbmc-sec-update.c
> @@ -0,0 +1,167 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Intel Max10 Board Management Controller Secure Update Driver
Maybe replace Max10 with other description?
> + *
> + * Copyright (C) 2019-2022 Intel Corporation. All rights reserved.
> + *
> + */
> +#include <linux/bitfield.h>
> +#include <linux/device.h>
> +#include <linux/firmware.h>
> +#include <linux/mfd/intel-m10-bmc.h>
Try to remove this head file if you want to support devices not on max10
> +#include <linux/module.h>
> +#include <linux/platform_device.h>
> +#include <linux/slab.h>
> +
> +struct bmc_sec {
> + struct device *dev;
> + struct intel_m10bmc *m10bmc;
The same concern.
> + struct fw_upload *fwl;
> + char *fw_name;
> + u32 fw_name_id;
> +};
> +
> +static DEFINE_XARRAY_ALLOC(fw_upload_xa);
> +
> +/* Root Entry Hash (REH) support */
> +#define REH_SHA256_SIZE 32
> +#define REH_SHA384_SIZE 48
> +#define REH_MAGIC GENMASK(15, 0)
> +#define REH_SHA_NUM_BYTES GENMASK(31, 16)
> +
> +static ssize_t
> +show_root_entry_hash(struct device *dev, u32 exp_magic,
> + u32 prog_addr, u32 reh_addr, char *buf)
> +{
> + struct bmc_sec *sec = dev_get_drvdata(dev);
> + unsigned int stride = regmap_get_reg_stride(sec->m10bmc->regmap);
> + int sha_num_bytes, i, cnt, ret;
> + u8 hash[REH_SHA384_SIZE];
> + u32 magic;
> +
> + ret = m10bmc_raw_read(sec->m10bmc, prog_addr, &magic);
> + if (ret)
> + return ret;
> +
> + dev_dbg(dev, "%s magic 0x%08x\n", __func__, magic);
Remove the dev_dbg.
> +
> + if (FIELD_GET(REH_MAGIC, magic) != exp_magic)
> + return sysfs_emit(buf, "hash not programmed\n");
> +
> + sha_num_bytes = FIELD_GET(REH_SHA_NUM_BYTES, magic) / 8;
> + if (sha_num_bytes != REH_SHA256_SIZE &&
> + sha_num_bytes != REH_SHA384_SIZE) {
> + dev_err(sec->dev, "%s bad sha num bytes %d\n", __func__,
> + sha_num_bytes);
> + return -EINVAL;
> + }
> +
> + WARN_ON(sha_num_bytes % stride);
Why warn on this condition? I assume with this warning user cannot get
enough sha data, so is the output still useful?
> + ret = regmap_bulk_read(sec->m10bmc->regmap, reh_addr,
> + hash, sha_num_bytes / stride);
> + if (ret) {
> + dev_err(dev, "failed to read root entry hash: %x cnt %x: %d\n",
> + reh_addr, sha_num_bytes / stride, ret);
> + return ret;
> + }
> +
> + cnt = sprintf(buf, "0x");
Why add the 0x prefix on hash value output?
> + for (i = 0; i < sha_num_bytes; i++)
> + cnt += sprintf(buf + cnt, "%02x", hash[i]);
> + cnt += sprintf(buf + cnt, "\n");
> +
> + return cnt;
> +}
> +
> +#define DEVICE_ATTR_SEC_REH_RO(_name, _magic, _prog_addr, _reh_addr) \
> +static ssize_t _name##_root_entry_hash_show(struct device *dev, \
> + struct device_attribute *attr, \
> + char *buf) \
> +{ return show_root_entry_hash(dev, _magic, _prog_addr, _reh_addr, buf); } \
> +static DEVICE_ATTR_RO(_name##_root_entry_hash)
> +
> +DEVICE_ATTR_SEC_REH_RO(bmc, BMC_PROG_MAGIC, BMC_PROG_ADDR, BMC_REH_ADDR);
> +DEVICE_ATTR_SEC_REH_RO(sr, SR_PROG_MAGIC, SR_PROG_ADDR, SR_REH_ADDR);
> +DEVICE_ATTR_SEC_REH_RO(pr, PR_PROG_MAGIC, PR_PROG_ADDR, PR_REH_ADDR);
> +
> +static struct attribute *bmc_security_attrs[] = {
> + &dev_attr_bmc_root_entry_hash.attr,
> + &dev_attr_sr_root_entry_hash.attr,
> + &dev_attr_pr_root_entry_hash.attr,
> + NULL,
> +};
> +
> +static struct attribute_group bmc_security_attr_group = {
> + .name = "security",
> + .attrs = bmc_security_attrs,
> +};
> +
> +static const struct attribute_group *bmc_sec_attr_groups[] = {
> + &bmc_security_attr_group,
> + NULL,
> +};
> +
> +static const struct fw_upload_ops cardbmc_ops = { };
I think if you are not ready to introduce fw upload functionality in
this patch, don't add any related stuff here.
> +
> +#define SEC_UPDATE_LEN_MAX 32
> +static int bmc_sec_probe(struct platform_device *pdev)
> +{
> + char buf[SEC_UPDATE_LEN_MAX];
> + struct bmc_sec *sec;
> + struct fw_upload *fwl;
> + unsigned int len, ret;
> +
> + sec = devm_kzalloc(&pdev->dev, sizeof(*sec), GFP_KERNEL);
> + if (!sec)
> + return -ENOMEM;
> +
> + sec->dev = &pdev->dev;
> + sec->m10bmc = dev_get_drvdata(pdev->dev.parent);
> + dev_set_drvdata(&pdev->dev, sec);
> +
> + ret = xa_alloc(&fw_upload_xa, &sec->fw_name_id, sec,
> + xa_limit_32b, GFP_KERNEL);
> + if (ret)
> + return ret;
> +
> + len = scnprintf(buf, SEC_UPDATE_LEN_MAX, "secure-update%d",
> + sec->fw_name_id);
> + sec->fw_name = kmemdup_nul(buf, len, GFP_KERNEL);
> +
> + fwl = firmware_upload_register(THIS_MODULE, sec->dev, sec->fw_name,
> + &cardbmc_ops, sec);
> + if (IS_ERR(fwl)) {
> + dev_err(sec->dev, "Firmware Upload driver failed to start\n");
> + kfree(sec->fw_name);
> + xa_erase(&fw_upload_xa, sec->fw_name_id);
> + return PTR_ERR(fwl);
> + }
> +
> + sec->fwl = fwl;
> + return 0;
> +}
> +
> +static int bmc_sec_remove(struct platform_device *pdev)
> +{
> + struct bmc_sec *sec = dev_get_drvdata(&pdev->dev);
> +
> + firmware_upload_unregister(sec->fwl);
> + kfree(sec->fw_name);
> + xa_erase(&fw_upload_xa, sec->fw_name_id);
> + return 0;
> +}
> +
> +static struct platform_driver intel_cardbmc_sec_driver = {
> + .probe = bmc_sec_probe,
> + .remove = bmc_sec_remove,
> + .driver = {
> + .name = "n3000bmc-sec-update",
If you expect the driver to support devices not just on n3000 max10 bmc,
using .id_table is better.
> + .dev_groups = bmc_sec_attr_groups,
> + },
> +};
> +module_platform_driver(intel_cardbmc_sec_driver);
> +
> +MODULE_ALIAS("platform:n3000bmc-sec-update");
using MODULE_DEVICE_TABLE is better?
> +MODULE_AUTHOR("Intel Corporation");
> +MODULE_DESCRIPTION("Intel MAX10 BMC Secure Update");
Please keep the naming consistent.
Thanks,
Yilun
> +MODULE_LICENSE("GPL");
> --
> 2.25.1
The n3000bmc-secure driver has changed to n3000bmc-sec-update. Update
the name in the list of the intel-m10-bmc sub-drivers.
Signed-off-by: Russ Weight <[email protected]>
---
v17:
- This is a new patch to change in the name of the secure update
driver.
---
drivers/mfd/intel-m10-bmc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mfd/intel-m10-bmc.c b/drivers/mfd/intel-m10-bmc.c
index 8db3bcf5fccc..f4d0d72573c8 100644
--- a/drivers/mfd/intel-m10-bmc.c
+++ b/drivers/mfd/intel-m10-bmc.c
@@ -26,7 +26,7 @@ static struct mfd_cell m10bmc_d5005_subdevs[] = {
static struct mfd_cell m10bmc_pacn3000_subdevs[] = {
{ .name = "n3000bmc-hwmon" },
{ .name = "n3000bmc-retimer" },
- { .name = "n3000bmc-secure" },
+ { .name = "n3000bmc-sec-update" },
};
static struct mfd_cell m10bmc_n5010_subdevs[] = {
--
2.25.1
On 4/30/22 09:51, Xu Yilun wrote:
> On Thu, Apr 28, 2022 at 04:37:29PM -0700, Russ Weight wrote:
>> Create a sub driver for the FPGA Card BMC in order to support secure
>> updates. This sub-driver uses the Firmware Upload support of the
>> Firmware Loader subsystem to transfer the image data to the device.
>>
>> This patch creates the FPGA Card BMC Secure Update driver and provides
>> sysfs files for displaying the current root entry hashes for the FPGA
>> static region, the FPGA PR region, and the card BMC.
>>
>> Signed-off-by: Russ Weight <[email protected]>
>> Reviewed-by: Tom Rix <[email protected]>
>> ---
>> v17:
>> - Update the Date and KernelVersion for the ABI documentation to Jul 2022
>> and 5.19 respectively.
>> - Updated the copyright end-date to 2022 for the secure update driver.
>> - Change m10bmc to cardbmc to reflect the fact that the future devices
>> will not necessarily use the MAX10. This affects filenames, configs, and
>> symbol names.
>> - Removed references to the FPGA Image Load class driver and replaced
>> them with the new firmware-upload service from the firmware loader.
>> - Firmware upload requires a unique name for the firmware device. Use
>> xarray_alloc to generate a unique number to append to the name.
>> - Changed the license from GPL to GPLv2 per commit bf7fbeeae6db: 'module:
>> Cure the MODULE_LICENSE "GPL" vs. "GPL v2" bogosity'
>> v16:
>> - No Change
>> v15:
>> - Updated the Dates and KernelVersions in the ABI documentation
>> - Change driver name from "n3000bmc-secure" to "n3000bmc-sec-update".
>> - Change CONFIG_FPGA_M10_BMC_SECURE to CONFIG_FPGA_M10_BMC_SEC_UPDATE.
>> - Change instances of *bmc-secure to *bmc-sec-update in file name
>> and symbol names.
>> - Change instances of *m10bmc_secure* to *m10bmc-sec_update* in symbol
>> names.
>> - Change instances of *lops* to *ops* in symbol names.
>> v14:
>> - Changed symbol and text references to reflect the renaming of the
>> Security Manager Class driver to FPGA Image Load.
>> v13:
>> - Updated copyright to 2021
>> - Updated ABI documentation date and kernel version
>> - Call updated fpga_sec_mgr_register() and fpga_sec_mgr_unregister()
>> functions instead of devm_fpga_sec_mgr_create() and
>> devm_fpga_sec_mgr_register().
>> v12:
>> - Updated Date and KernelVersion fields in ABI documentation
>> v11:
>> - Added Reviewed-by tag
>> v10:
>> - Changed the path expressions in the sysfs documentation to
>> replace the n3000 reference with something more generic to
>> accomodate other devices that use the same driver.
>> v9:
>> - Rebased to 5.12-rc2 next
>> - Updated Date and KernelVersion in ABI documentation
>> v8:
>> - Previously patch 2/6, otherwise no change
>> v7:
>> - Updated Date and KernelVersion in ABI documentation
>> v6:
>> - Added WARN_ON() call for (sha_num_bytes / stride) to assert
>> that the proper count is passed to regmap_bulk_read().
>> v5:
>> - No change
>> v4:
>> - Moved sysfs files for displaying the root entry hashes (REH)
>> from the FPGA Security Manager class driver to here. The
>> m10bmc_reh() and m10bmc_reh_size() functions are removed and
>> the functionality from these functions is moved into a
>> show_root_entry_hash() function for displaying the REHs.
>> - Added ABI documentation for the new sysfs entries:
>> sysfs-driver-intel-m10-bmc-secure
>> - Updated the MAINTAINERS file to add the new ABI documentation
>> file: sysfs-driver-intel-m10-bmc-secure
>> - Removed unnecessary ret variable from m10bmc_secure_probe()
>> - Incorporated new devm_fpga_sec_mgr_register() function into
>> m10bmc_secure_probe() and removed the m10bmc_secure_remove()
>> function.
>> v3:
>> - Changed from "Intel FPGA Security Manager" to FPGA Security Manager"
>> - Changed: iops -> sops, imgr -> smgr, IFPGA_ -> FPGA_, ifpga_ to fpga_
>> - Changed "MAX10 BMC Secure Engine driver" to "MAX10 BMC Secure
>> Update driver"
>> - Removed wrapper functions (m10bmc_raw_*, m10bmc_sys_*). The
>> underlying functions are now called directly.
>> - Changed "_root_entry_hash" to "_reh", with a comment explaining
>> what reh is.
>> v2:
>> - Added drivers/fpga/intel-m10-bmc-secure.c file to MAINTAINERS.
>> - Switched to GENMASK(31, 16) for a couple of mask definitions.
>> - Moved MAX10 BMC address and function definitions to a separate
>> patch.
>> - Replaced small function-creation macros with explicit function
>> declarations.
>> - Removed ifpga_sec_mgr_init() and ifpga_sec_mgr_uinit() functions.
>> - Adapted to changes in the Intel FPGA Security Manager by splitting
>> the single call to ifpga_sec_mgr_register() into two function
>> calls: devm_ifpga_sec_mgr_create() and ifpga_sec_mgr_register().
>> ---
>> .../sysfs-driver-intel-cardbmc-sec-update | 29 +++
>> MAINTAINERS | 7 +
>> drivers/fpga/Kconfig | 12 ++
>> drivers/fpga/Makefile | 3 +
>> drivers/fpga/intel-cardbmc-sec-update.c | 167 ++++++++++++++++++
>> 5 files changed, 218 insertions(+)
>> create mode 100644 Documentation/ABI/testing/sysfs-driver-intel-cardbmc-sec-update
>> create mode 100644 drivers/fpga/intel-cardbmc-sec-update.c
>>
>> diff --git a/Documentation/ABI/testing/sysfs-driver-intel-cardbmc-sec-update b/Documentation/ABI/testing/sysfs-driver-intel-cardbmc-sec-update
>> new file mode 100644
>> index 000000000000..c032fbe59614
>> --- /dev/null
>> +++ b/Documentation/ABI/testing/sysfs-driver-intel-cardbmc-sec-update
>> @@ -0,0 +1,29 @@
>> +What: /sys/bus/platform/drivers/intel-cardbmc-sec-update/.../security/sr_root_entry_hash
>> +Date: Jul 2022
>> +KernelVersion: 5.19
>> +Contact: Russ Weight <[email protected]>
>> +Description: Read only. Returns the root entry hash for the static
>> + region if one is programmed, else it returns the
>> + string: "hash not programmed". This file is only
>> + visible if the underlying device supports it.
>> + Format: "0x%x".
> Should the format be "string'? I always see the hash value is a hexadecimal
> string without "0x" prefix. So why you want to output it like a large
> hex number?
Yes - string makes more sense, especially since we sometimes return "hash not
programmed. I'll remove the '0x' and specify a string output.
>> +
>> +What: /sys/bus/platform/drivers/intel-cardbmc-sec-update/.../security/pr_root_entry_hash
>> +Date: Jul 2022
>> +KernelVersion: 5.19
>> +Contact: Russ Weight <[email protected]>
>> +Description: Read only. Returns the root entry hash for the partial
>> + reconfiguration region if one is programmed, else it
>> + returns the string: "hash not programmed". This file
>> + is only visible if the underlying device supports it.
>> + Format: "0x%x".
> Same concern.
>
>> +
>> +What: /sys/bus/platform/drivers/intel-cardbmc-sec-update/.../security/bmc_root_entry_hash
>> +Date: Jul 2022
>> +KernelVersion: 5.19
>> +Contact: Russ Weight <[email protected]>
>> +Description: Read only. Returns the root entry hash for the BMC image
>> + if one is programmed, else it returns the string:
>> + "hash not programmed". This file is only visible if the
>> + underlying device supports it.
>> + Format: "0x%x".
> Same.
>
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index 61d9f114c37f..43feaaa25352 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -7725,6 +7725,13 @@ F: Documentation/fpga/
>> F: drivers/fpga/
>> F: include/linux/fpga/
>>
>> +FPGA BMC INTEL SECURE UPDATES
>> +M: Russ Weight <[email protected]>
>> +L: [email protected]
>> +S: Maintained
>> +F: Documentation/ABI/testing/sysfs-driver-intel-cardbmc-sec-update
>> +F: drivers/fpga/intel-cardbmc-sec-update.c
>> +
>> FPU EMULATOR
>> M: Bill Metzenthen <[email protected]>
>> S: Maintained
>> diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
>> index 991b3f361ec9..346889e3096a 100644
>> --- a/drivers/fpga/Kconfig
>> +++ b/drivers/fpga/Kconfig
>> @@ -243,4 +243,16 @@ config FPGA_MGR_VERSAL_FPGA
>> configure the programmable logic(PL).
>>
>> To compile this as a module, choose M here.
>> +
>> +config FPGA_CARDBMC_SEC_UPDATE
> INTEL_FPGA_CARDBMC_SEC_UPDATE ?
Yes - I can make this change.
>
>> + tristate "Intel FPGA Card BMC Secure Update driver"
>> + depends on MFD_INTEL_M10_BMC && FW_UPLOAD
> You mentioned that the driver supports devices which may not use max10,
> so is it possible to remove the depends on MFD_INTEL_M10_BMC?
At this point, the only driver that will use this sub-driver is the
MAX10 BMC driver, so we can't remove this dependency. It was not my
intention to completely eliminate the "MAX10 BMC" terminology from
the upstream kernel at this time - I am just trying not to perpetuate
the naming.
The basic issue is that the current MAX10 BMC driver also works for the
Cyclone10 implementation of the BMC, so including "MAX10" in the name is
not strictly correct. Do you recommend that we change the MAX10 BMC
driver and config names now? Or is it sufficient to avoid adding new
unnecessary references to max10?
>
> Some more stuff related to max10 in this patch.
>
>> + help
>> + Secure update support for the Intel FPGA board management
>> + controller.
>> +
>> + This is a subdriver of the Intel MAX10 board management controller
> And the same concern here.
Unless we rename the upstream MAX10 driver, this description is still accurate.
>
>> + (BMC) and provides support for secure updates for the BMC image,
>> + the FPGA image, the Root Entry Hashes, etc.
>> +
>> endif # FPGA
>> diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile
>> index 0bff783d1b61..daf427393ba9 100644
>> --- a/drivers/fpga/Makefile
>> +++ b/drivers/fpga/Makefile
>> @@ -22,6 +22,9 @@ obj-$(CONFIG_FPGA_MGR_VERSAL_FPGA) += versal-fpga.o
>> obj-$(CONFIG_ALTERA_PR_IP_CORE) += altera-pr-ip-core.o
>> obj-$(CONFIG_ALTERA_PR_IP_CORE_PLAT) += altera-pr-ip-core-plat.o
>>
>> +# FPGA Secure Update Drivers
>> +obj-$(CONFIG_FPGA_CARDBMC_SEC_UPDATE) += intel-cardbmc-sec-update.o
> CONFIG_INTEL_FPGA_CARDBMC_SEC_UPDATE ?
yes
>
>> +
>> # FPGA Bridge Drivers
>> obj-$(CONFIG_FPGA_BRIDGE) += fpga-bridge.o
>> obj-$(CONFIG_SOCFPGA_FPGA_BRIDGE) += altera-hps2fpga.o altera-fpga2sdram.o
>> diff --git a/drivers/fpga/intel-cardbmc-sec-update.c b/drivers/fpga/intel-cardbmc-sec-update.c
>> new file mode 100644
>> index 000000000000..ba3559f3335d
>> --- /dev/null
>> +++ b/drivers/fpga/intel-cardbmc-sec-update.c
>> @@ -0,0 +1,167 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/*
>> + * Intel Max10 Board Management Controller Secure Update Driver
> Maybe replace Max10 with other description?
Yes - I'll go through the file more carefully and eliminate unnecessary
MAX10 references.
>
>> + *
>> + * Copyright (C) 2019-2022 Intel Corporation. All rights reserved.
>> + *
>> + */
>> +#include <linux/bitfield.h>
>> +#include <linux/device.h>
>> +#include <linux/firmware.h>
>> +#include <linux/mfd/intel-m10-bmc.h>
> Try to remove this head file if you want to support devices not on max10
Please see my comments above. We depend on the MAX10 BMC driver. We can
rename it now if you think it is necessary - or we can continue to
reference it as is.
>
>> +#include <linux/module.h>
>> +#include <linux/platform_device.h>
>> +#include <linux/slab.h>
>> +
>> +struct bmc_sec {
>> + struct device *dev;
>> + struct intel_m10bmc *m10bmc;
> The same concern.
We can't change this structure name without changing the upstream MAX10 driver.
>
>> + struct fw_upload *fwl;
>> + char *fw_name;
>> + u32 fw_name_id;
>> +};
>> +
>> +static DEFINE_XARRAY_ALLOC(fw_upload_xa);
>> +
>> +/* Root Entry Hash (REH) support */
>> +#define REH_SHA256_SIZE 32
>> +#define REH_SHA384_SIZE 48
>> +#define REH_MAGIC GENMASK(15, 0)
>> +#define REH_SHA_NUM_BYTES GENMASK(31, 16)
>> +
>> +static ssize_t
>> +show_root_entry_hash(struct device *dev, u32 exp_magic,
>> + u32 prog_addr, u32 reh_addr, char *buf)
>> +{
>> + struct bmc_sec *sec = dev_get_drvdata(dev);
>> + unsigned int stride = regmap_get_reg_stride(sec->m10bmc->regmap);
>> + int sha_num_bytes, i, cnt, ret;
>> + u8 hash[REH_SHA384_SIZE];
>> + u32 magic;
>> +
>> + ret = m10bmc_raw_read(sec->m10bmc, prog_addr, &magic);
>> + if (ret)
>> + return ret;
>> +
>> + dev_dbg(dev, "%s magic 0x%08x\n", __func__, magic);
> Remove the dev_dbg.
Yes - I'll remove it
>
>> +
>> + if (FIELD_GET(REH_MAGIC, magic) != exp_magic)
>> + return sysfs_emit(buf, "hash not programmed\n");
>> +
>> + sha_num_bytes = FIELD_GET(REH_SHA_NUM_BYTES, magic) / 8;
>> + if (sha_num_bytes != REH_SHA256_SIZE &&
>> + sha_num_bytes != REH_SHA384_SIZE) {
>> + dev_err(sec->dev, "%s bad sha num bytes %d\n", __func__,
>> + sha_num_bytes);
>> + return -EINVAL;
>> + }
>> +
>> + WARN_ON(sha_num_bytes % stride);
> Why warn on this condition? I assume with this warning user cannot get
> enough sha data, so is the output still useful?
The sha_num_bytes() variable is expected to be a multiple of stride. The
WARN_ON is intended to enforce that.
>
>> + ret = regmap_bulk_read(sec->m10bmc->regmap, reh_addr,
>> + hash, sha_num_bytes / stride);
>> + if (ret) {
>> + dev_err(dev, "failed to read root entry hash: %x cnt %x: %d\n",
>> + reh_addr, sha_num_bytes / stride, ret);
>> + return ret;
>> + }
>> +
>> + cnt = sprintf(buf, "0x");
> Why add the 0x prefix on hash value output?
I have eliminated it.
>
>> + for (i = 0; i < sha_num_bytes; i++)
>> + cnt += sprintf(buf + cnt, "%02x", hash[i]);
>> + cnt += sprintf(buf + cnt, "\n");
>> +
>> + return cnt;
>> +}
>> +
>> +#define DEVICE_ATTR_SEC_REH_RO(_name, _magic, _prog_addr, _reh_addr) \
>> +static ssize_t _name##_root_entry_hash_show(struct device *dev, \
>> + struct device_attribute *attr, \
>> + char *buf) \
>> +{ return show_root_entry_hash(dev, _magic, _prog_addr, _reh_addr, buf); } \
>> +static DEVICE_ATTR_RO(_name##_root_entry_hash)
>> +
>> +DEVICE_ATTR_SEC_REH_RO(bmc, BMC_PROG_MAGIC, BMC_PROG_ADDR, BMC_REH_ADDR);
>> +DEVICE_ATTR_SEC_REH_RO(sr, SR_PROG_MAGIC, SR_PROG_ADDR, SR_REH_ADDR);
>> +DEVICE_ATTR_SEC_REH_RO(pr, PR_PROG_MAGIC, PR_PROG_ADDR, PR_REH_ADDR);
>> +
>> +static struct attribute *bmc_security_attrs[] = {
>> + &dev_attr_bmc_root_entry_hash.attr,
>> + &dev_attr_sr_root_entry_hash.attr,
>> + &dev_attr_pr_root_entry_hash.attr,
>> + NULL,
>> +};
>> +
>> +static struct attribute_group bmc_security_attr_group = {
>> + .name = "security",
>> + .attrs = bmc_security_attrs,
>> +};
>> +
>> +static const struct attribute_group *bmc_sec_attr_groups[] = {
>> + &bmc_security_attr_group,
>> + NULL,
>> +};
>> +
>> +static const struct fw_upload_ops cardbmc_ops = { };
> I think if you are not ready to introduce fw upload functionality in
> this patch, don't add any related stuff here.
Sure - I'll defer this until a later patch.
>
>> +
>> +#define SEC_UPDATE_LEN_MAX 32
>> +static int bmc_sec_probe(struct platform_device *pdev)
>> +{
>> + char buf[SEC_UPDATE_LEN_MAX];
>> + struct bmc_sec *sec;
>> + struct fw_upload *fwl;
>> + unsigned int len, ret;
>> +
>> + sec = devm_kzalloc(&pdev->dev, sizeof(*sec), GFP_KERNEL);
>> + if (!sec)
>> + return -ENOMEM;
>> +
>> + sec->dev = &pdev->dev;
>> + sec->m10bmc = dev_get_drvdata(pdev->dev.parent);
>> + dev_set_drvdata(&pdev->dev, sec);
>> +
>> + ret = xa_alloc(&fw_upload_xa, &sec->fw_name_id, sec,
>> + xa_limit_32b, GFP_KERNEL);
>> + if (ret)
>> + return ret;
>> +
>> + len = scnprintf(buf, SEC_UPDATE_LEN_MAX, "secure-update%d",
>> + sec->fw_name_id);
>> + sec->fw_name = kmemdup_nul(buf, len, GFP_KERNEL);
>> +
>> + fwl = firmware_upload_register(THIS_MODULE, sec->dev, sec->fw_name,
>> + &cardbmc_ops, sec);
>> + if (IS_ERR(fwl)) {
>> + dev_err(sec->dev, "Firmware Upload driver failed to start\n");
>> + kfree(sec->fw_name);
>> + xa_erase(&fw_upload_xa, sec->fw_name_id);
>> + return PTR_ERR(fwl);
>> + }
>> +
>> + sec->fwl = fwl;
>> + return 0;
>> +}
>> +
>> +static int bmc_sec_remove(struct platform_device *pdev)
>> +{
>> + struct bmc_sec *sec = dev_get_drvdata(&pdev->dev);
>> +
>> + firmware_upload_unregister(sec->fwl);
>> + kfree(sec->fw_name);
>> + xa_erase(&fw_upload_xa, sec->fw_name_id);
>> + return 0;
>> +}
>> +
>> +static struct platform_driver intel_cardbmc_sec_driver = {
>> + .probe = bmc_sec_probe,
>> + .remove = bmc_sec_remove,
>> + .driver = {
>> + .name = "n3000bmc-sec-update",
> If you expect the driver to support devices not just on n3000 max10 bmc,
> using .id_table is better.
Later patches which add support for new devices will add the .id_table.
At your recommendation, I change this patch to use .id_table now.
>
>> + .dev_groups = bmc_sec_attr_groups,
>> + },
>> +};
>> +module_platform_driver(intel_cardbmc_sec_driver);
>> +
>> +MODULE_ALIAS("platform:n3000bmc-sec-update");
> using MODULE_DEVICE_TABLE is better?
OK
>
>> +MODULE_AUTHOR("Intel Corporation");
>> +MODULE_DESCRIPTION("Intel MAX10 BMC Secure Update");
> Please keep the naming consistent.
Yes - I'll go back through the MAX10 references
Thanks,
- Russ
>
> Thanks,
> Yilun
>
>> +MODULE_LICENSE("GPL");
>> --
>> 2.25.1