The AMD Secure Processor ACPI Table provides the memory location of the
register window and register offsets necessary to communicate with AMD's
PSP (Platform Security Processor). This table is exposed on Hyper-V VMs
configured with support for AMD's SNP isolation technology.
Signed-off-by: Jeremi Piotrowski <[email protected]>
---
include/acpi/actbl1.h | 46 +++++++++++++++++++++++++++++++++++++++++++
1 file changed, 46 insertions(+)
diff --git a/include/acpi/actbl1.h b/include/acpi/actbl1.h
index 15c78678c5d3..00d40373df37 100644
--- a/include/acpi/actbl1.h
+++ b/include/acpi/actbl1.h
@@ -26,6 +26,7 @@
*/
#define ACPI_SIG_AEST "AEST" /* Arm Error Source Table */
#define ACPI_SIG_ASF "ASF!" /* Alert Standard Format table */
+#define ACPI_SIG_ASPT "ASPT" /* AMD Secure Processor Table */
#define ACPI_SIG_BERT "BERT" /* Boot Error Record Table */
#define ACPI_SIG_BGRT "BGRT" /* Boot Graphics Resource Table */
#define ACPI_SIG_BOOT "BOOT" /* Simple Boot Flag Table */
@@ -106,6 +107,51 @@ struct acpi_whea_header {
u64 mask; /* Bitmask required for this register instruction */
};
+/* https://docs.microsoft.com/en-us/windows-hardware/drivers/ddi/acpitabl/ns-acpitabl-aspt_table */
+#define ASPT_REVISION_ID 0x01
+struct acpi_table_aspt {
+ struct acpi_table_header header;
+ u32 num_entries;
+};
+
+struct acpi_aspt_header {
+ u16 type;
+ u16 length;
+};
+
+enum acpi_aspt_type {
+ ACPI_ASPT_TYPE_GLOBAL_REGS = 0,
+ ACPI_ASPT_TYPE_SEV_MBOX_REGS = 1,
+ ACPI_ASPT_TYPE_ACPI_MBOX_REGS = 2,
+};
+
+/* 0: ASPT Global Registers */
+struct acpi_aspt_global_regs {
+ struct acpi_aspt_header header;
+ u32 reserved;
+ u64 feature_reg_addr;
+ u64 irq_en_reg_addr;
+ u64 irq_st_reg_addr;
+};
+
+/* 1: ASPT SEV Mailbox Registers */
+struct acpi_aspt_sev_mbox_regs {
+ struct acpi_aspt_header header;
+ u8 mbox_irq_id;
+ u8 reserved[3];
+ u64 cmd_resp_reg_addr;
+ u64 cmd_buf_lo_reg_addr;
+ u64 cmd_buf_hi_reg_addr;
+};
+
+/* 2: ASPT ACPI Mailbox Registers */
+struct acpi_aspt_acpi_mbox_regs {
+ struct acpi_aspt_header header;
+ u32 reserved1;
+ u64 cmd_resp_reg_addr;
+ u64 reserved2[2];
+};
+
/*******************************************************************************
*
* ASF - Alert Standard Format table (Signature "ASF!")
--
2.25.1
On Mon, Feb 13, 2023 at 10:25 AM Jeremi Piotrowski
<[email protected]> wrote:
>
> The AMD Secure Processor ACPI Table provides the memory location of the
> register window and register offsets necessary to communicate with AMD's
> PSP (Platform Security Processor). This table is exposed on Hyper-V VMs
> configured with support for AMD's SNP isolation technology.
>
> Signed-off-by: Jeremi Piotrowski <[email protected]>
Please add a Link tag pointing to the corresponding upstream ACPICA
pull request (or upstream ACPICA commit if already pulled) to this
patch and analogously for patch [2/8].
Thanks!
> ---
> include/acpi/actbl1.h | 46 +++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 46 insertions(+)
>
> diff --git a/include/acpi/actbl1.h b/include/acpi/actbl1.h
> index 15c78678c5d3..00d40373df37 100644
> --- a/include/acpi/actbl1.h
> +++ b/include/acpi/actbl1.h
> @@ -26,6 +26,7 @@
> */
> #define ACPI_SIG_AEST "AEST" /* Arm Error Source Table */
> #define ACPI_SIG_ASF "ASF!" /* Alert Standard Format table */
> +#define ACPI_SIG_ASPT "ASPT" /* AMD Secure Processor Table */
> #define ACPI_SIG_BERT "BERT" /* Boot Error Record Table */
> #define ACPI_SIG_BGRT "BGRT" /* Boot Graphics Resource Table */
> #define ACPI_SIG_BOOT "BOOT" /* Simple Boot Flag Table */
> @@ -106,6 +107,51 @@ struct acpi_whea_header {
> u64 mask; /* Bitmask required for this register instruction */
> };
>
> +/* https://docs.microsoft.com/en-us/windows-hardware/drivers/ddi/acpitabl/ns-acpitabl-aspt_table */
> +#define ASPT_REVISION_ID 0x01
> +struct acpi_table_aspt {
> + struct acpi_table_header header;
> + u32 num_entries;
> +};
> +
> +struct acpi_aspt_header {
> + u16 type;
> + u16 length;
> +};
> +
> +enum acpi_aspt_type {
> + ACPI_ASPT_TYPE_GLOBAL_REGS = 0,
> + ACPI_ASPT_TYPE_SEV_MBOX_REGS = 1,
> + ACPI_ASPT_TYPE_ACPI_MBOX_REGS = 2,
> +};
> +
> +/* 0: ASPT Global Registers */
> +struct acpi_aspt_global_regs {
> + struct acpi_aspt_header header;
> + u32 reserved;
> + u64 feature_reg_addr;
> + u64 irq_en_reg_addr;
> + u64 irq_st_reg_addr;
> +};
> +
> +/* 1: ASPT SEV Mailbox Registers */
> +struct acpi_aspt_sev_mbox_regs {
> + struct acpi_aspt_header header;
> + u8 mbox_irq_id;
> + u8 reserved[3];
> + u64 cmd_resp_reg_addr;
> + u64 cmd_buf_lo_reg_addr;
> + u64 cmd_buf_hi_reg_addr;
> +};
> +
> +/* 2: ASPT ACPI Mailbox Registers */
> +struct acpi_aspt_acpi_mbox_regs {
> + struct acpi_aspt_header header;
> + u32 reserved1;
> + u64 cmd_resp_reg_addr;
> + u64 reserved2[2];
> +};
> +
> /*******************************************************************************
> *
> * ASF - Alert Standard Format table (Signature "ASF!")
> --
> 2.25.1
>
On 13/02/2023 19:43, Rafael J. Wysocki wrote:
> On Mon, Feb 13, 2023 at 10:25 AM Jeremi Piotrowski
> <[email protected]> wrote:
>>
>> The AMD Secure Processor ACPI Table provides the memory location of the
>> register window and register offsets necessary to communicate with AMD's
>> PSP (Platform Security Processor). This table is exposed on Hyper-V VMs
>> configured with support for AMD's SNP isolation technology.
>>
>> Signed-off-by: Jeremi Piotrowski <[email protected]>
>
> Please add a Link tag pointing to the corresponding upstream ACPICA
> pull request (or upstream ACPICA commit if already pulled) to this
> patch and analogously for patch [2/8].
>
> Thanks!
>
Will do when I post v3. I'll poke the ACPICA maintainer again after the specification
gets published this friday.
Jeremi
>> ---
>> include/acpi/actbl1.h | 46 +++++++++++++++++++++++++++++++++++++++++++
>> 1 file changed, 46 insertions(+)
>>
>> diff --git a/include/acpi/actbl1.h b/include/acpi/actbl1.h
>> index 15c78678c5d3..00d40373df37 100644
>> --- a/include/acpi/actbl1.h
>> +++ b/include/acpi/actbl1.h
>> @@ -26,6 +26,7 @@
>> */
>> #define ACPI_SIG_AEST "AEST" /* Arm Error Source Table */
>> #define ACPI_SIG_ASF "ASF!" /* Alert Standard Format table */
>> +#define ACPI_SIG_ASPT "ASPT" /* AMD Secure Processor Table */
>> #define ACPI_SIG_BERT "BERT" /* Boot Error Record Table */
>> #define ACPI_SIG_BGRT "BGRT" /* Boot Graphics Resource Table */
>> #define ACPI_SIG_BOOT "BOOT" /* Simple Boot Flag Table */
>> @@ -106,6 +107,51 @@ struct acpi_whea_header {
>> u64 mask; /* Bitmask required for this register instruction */
>> };
>>
>> +/* https://docs.microsoft.com/en-us/windows-hardware/drivers/ddi/acpitabl/ns-acpitabl-aspt_table */
>> +#define ASPT_REVISION_ID 0x01
>> +struct acpi_table_aspt {
>> + struct acpi_table_header header;
>> + u32 num_entries;
>> +};
>> +
>> +struct acpi_aspt_header {
>> + u16 type;
>> + u16 length;
>> +};
>> +
>> +enum acpi_aspt_type {
>> + ACPI_ASPT_TYPE_GLOBAL_REGS = 0,
>> + ACPI_ASPT_TYPE_SEV_MBOX_REGS = 1,
>> + ACPI_ASPT_TYPE_ACPI_MBOX_REGS = 2,
>> +};
>> +
>> +/* 0: ASPT Global Registers */
>> +struct acpi_aspt_global_regs {
>> + struct acpi_aspt_header header;
>> + u32 reserved;
>> + u64 feature_reg_addr;
>> + u64 irq_en_reg_addr;
>> + u64 irq_st_reg_addr;
>> +};
>> +
>> +/* 1: ASPT SEV Mailbox Registers */
>> +struct acpi_aspt_sev_mbox_regs {
>> + struct acpi_aspt_header header;
>> + u8 mbox_irq_id;
>> + u8 reserved[3];
>> + u64 cmd_resp_reg_addr;
>> + u64 cmd_buf_lo_reg_addr;
>> + u64 cmd_buf_hi_reg_addr;
>> +};
>> +
>> +/* 2: ASPT ACPI Mailbox Registers */
>> +struct acpi_aspt_acpi_mbox_regs {
>> + struct acpi_aspt_header header;
>> + u32 reserved1;
>> + u64 cmd_resp_reg_addr;
>> + u64 reserved2[2];
>> +};
>> +
>> /*******************************************************************************
>> *
>> * ASF - Alert Standard Format table (Signature "ASF!")
>> --
>> 2.25.1
>>