Hi,
Depends on:
https://lore.kernel.org/all/[email protected]/
Best regards,
Krzysztof
Krzysztof Kozlowski (4):
arm64: dts: qcom: sm8450: move SDHCI pin configuration to DTSI
arm64: dts: qcom: sm8450: disable SDHCI SDR104/SDR50 on all boards
arm64: dts: qcom: sm8450-hdk: add SDHCI for microSD
arm64: dts: qcom: sm8450-qrd: add SDHCI for microSD
arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 19 +++++++++++++++
arch/arm64/boot/dts/qcom/sm8450-qrd.dts | 19 +++++++++++++++
.../qcom/sm8450-sony-xperia-nagara-pdx223.dts | 22 ------------------
arch/arm64/boot/dts/qcom/sm8450.dtsi | 23 +++++++++++++++++++
4 files changed, 61 insertions(+), 22 deletions(-)
--
2.34.1
The HDK8450 has microSD card slot.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
index 3ccbdd2ed734..f4a5f1a8e573 100644
--- a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
+++ b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
@@ -426,6 +426,18 @@ &remoteproc_slpi {
firmware-name = "qcom/sm8450/slpi.mbn";
};
+&sdhc_2 {
+ cd-gpios = <&tlmm 92 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>;
+ pinctrl-1 = <&sdc2_sleep_state &sdc2_card_det_n>;
+ vmmc-supply = <&vreg_l9c_2p96>;
+ vqmmc-supply = <&vreg_l6c_1p8>;
+ no-sdio;
+ no-mmc;
+ status = "okay";
+};
+
&tlmm {
gpio-reserved-ranges = <28 4>, <36 4>;
@@ -461,6 +473,13 @@ pinconf {
bias-pull-down;
};
};
+
+ sdc2_card_det_n: sd-card-det-n-state {
+ pins = "gpio92";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
};
&uart7 {
--
2.34.1
On 26/10/2022 22:03, Krzysztof Kozlowski wrote:
> The HDK8450 has microSD card slot.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> ---
Reviewed-by: Konrad Dybcio <[email protected]>
Konrad
> arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
> index 3ccbdd2ed734..f4a5f1a8e573 100644
> --- a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
> +++ b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
> @@ -426,6 +426,18 @@ &remoteproc_slpi {
> firmware-name = "qcom/sm8450/slpi.mbn";
> };
>
> +&sdhc_2 {
> + cd-gpios = <&tlmm 92 GPIO_ACTIVE_HIGH>;
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>;
> + pinctrl-1 = <&sdc2_sleep_state &sdc2_card_det_n>;
> + vmmc-supply = <&vreg_l9c_2p96>;
> + vqmmc-supply = <&vreg_l6c_1p8>;
> + no-sdio;
> + no-mmc;
> + status = "okay";
> +};
> +
> &tlmm {
> gpio-reserved-ranges = <28 4>, <36 4>;
>
> @@ -461,6 +473,13 @@ pinconf {
> bias-pull-down;
> };
> };
> +
> + sdc2_card_det_n: sd-card-det-n-state {
> + pins = "gpio92";
> + function = "gpio";
> + drive-strength = <2>;
> + bias-pull-up;
> + };
> };
>
> &uart7 {
The SDHCI pin configuration/mux nodes are actually common to all
upstreamed boards, so define them in SoC DTSI to reduce code
duplication.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
In theory drive strength belongs to the board DTS, not SoC DTSI, but I
am following the advice here:
https://lore.kernel.org/lkml/CAD=FV=VUL4GmjaibAMhKNdpEso_Hg_R=XeMaqah1LSj_9-Ce4Q@mail.gmail.com/
---
.../qcom/sm8450-sony-xperia-nagara-pdx223.dts | 20 -------------------
arch/arm64/boot/dts/qcom/sm8450.dtsi | 20 +++++++++++++++++++
2 files changed, 20 insertions(+), 20 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara-pdx223.dts b/arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara-pdx223.dts
index 82918c2d956f..718c690af8ad 100644
--- a/arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara-pdx223.dts
+++ b/arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara-pdx223.dts
@@ -572,26 +572,6 @@ &spi10 {
&tlmm {
gpio-reserved-ranges = <28 4>;
- sdc2_default_state: sdc2-default-state {
- clk-pins {
- pins = "sdc2_clk";
- drive-strength = <16>;
- bias-disable;
- };
-
- cmd-pins {
- pins = "sdc2_cmd";
- drive-strength = <16>;
- bias-pull-up;
- };
-
- data-pins {
- pins = "sdc2_data";
- drive-strength = <16>;
- bias-pull-up;
- };
- };
-
ts_int_default: ts-int-default-state {
pins = "gpio23";
function = "gpio";
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 1d1775334575..1df5c964c6f7 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -2515,6 +2515,26 @@ tlmm: pinctrl@f100000 {
gpio-ranges = <&tlmm 0 0 211>;
wakeup-parent = <&pdc>;
+ sdc2_default_state: sdc2-default-state {
+ clk-pins {
+ pins = "sdc2_clk";
+ drive-strength = <16>;
+ bias-disable;
+ };
+
+ cmd-pins {
+ pins = "sdc2_cmd";
+ drive-strength = <16>;
+ bias-pull-up;
+ };
+
+ data-pins {
+ pins = "sdc2_data";
+ drive-strength = <16>;
+ bias-pull-up;
+ };
+ };
+
sdc2_sleep_state: sdc2-sleep-state {
clk-pins {
pins = "sdc2_clk";
--
2.34.1
On Wed, 26 Oct 2022 16:03:53 -0400, Krzysztof Kozlowski wrote:
> Depends on:
> https://lore.kernel.org/all/[email protected]/
>
> Best regards,
> Krzysztof
>
> Krzysztof Kozlowski (4):
> arm64: dts: qcom: sm8450: move SDHCI pin configuration to DTSI
> arm64: dts: qcom: sm8450: disable SDHCI SDR104/SDR50 on all boards
> arm64: dts: qcom: sm8450-hdk: add SDHCI for microSD
> arm64: dts: qcom: sm8450-qrd: add SDHCI for microSD
>
> [...]
Applied, thanks!
[1/4] arm64: dts: qcom: sm8450: move SDHCI pin configuration to DTSI
commit: a0646262ec94faaf95b3dba8f17774d9762ee9ac
[2/4] arm64: dts: qcom: sm8450: disable SDHCI SDR104/SDR50 on all boards
commit: 9d561dc4e5cc31e757f91eb7bb709d2e2a8c9ce0
[3/4] arm64: dts: qcom: sm8450-hdk: add SDHCI for microSD
commit: 1f52331285ed9f412f85e321ae6574714725d634
[4/4] arm64: dts: qcom: sm8450-qrd: add SDHCI for microSD
commit: 4a5923fe4e1df52fafa4026363a349f30c061a15
Best regards,
--
Bjorn Andersson <[email protected]>