This series implements support for the Synopsys DesignWare HDMI RX Controller
and PHYs e405/e406 drivers, being compliant with standard HDMI 1.4 and
HDMI 2.0.
The Controller + PHY pipeline can be integrated into a fully featured
system that can be able to receive video up to 4k@60Hz with basic audio.
This solution is mainly composed by two modules: phy-dw-hdmi-e40x and
dw-hdmi-rx.
phy-dw-hdmi-e40x: it's the PHY (Physical Layer) driver that implements
support for Synopsys DesignWare e405 and e406 PHYs. It is responsible to
configure the PHY and equalize it for the best settings, in order to
receive and decode video to be delivered to the Controller.
This driver is integrated in the PHY subsystem.
The main features of this module are:
- Equalizer algorithm that chooses the phy best settings
according to the detected HDMI cable characteristics
- Support for scrambling
- Support for color depth up to 48bpp
- Support for HDMI 2.0 modes up to 6G (HDMI 4k@60Hz).
dw-hdmi-rx: it's the Controller driver that implements support for
Synopsys DesignWare HDMI RX Controller. It is responsible to manage and
handle the PHY (through the PHY API) and the Controller configurations in
order to configure the video and audio pipeline.
This driver is implemented as a standard V4L2 subdevice.
The main features of this module are:
- Support for scrambling
- Support for color depth up to 48bpp
- Support for HDMI 2.0 modes up to 6G (HDMI 4k@60Hz)
- Support for RGB, YCC444, YCC422 and YCC420
- Support for basic audio (LPCM 2ch, 32KHz/44.1KHz/48KHz, 16bit)
- Support for Aspect Ratio
- Support for CEC
- Internal state machine that reconfigures phy and controller
- JTAG communication with phy
- Inter-module communication with phy driver:
* through the PHY API using the phy reference "hdmi-phy"
* through the callbacks that phy dwc driver needs.
- Debug write/read ioctls
NOTES: This patch series has two specific patches (Patch [4/8] and [7/8])
one for the PHY API and the other for v4l2-dv-timings.
Patch [4/8] adds phy standard HDMI opts to the phy API that contributes
for the PHY subsystem, which allows to integrate the PHY driver in the
PHY subsystem using this new HDMI opts structure, because there are hdmi
options that are needed to pass between the Controller and PHY drivers
using the standard API.
Patch [7/8] adds more CEA/CTA-861 video format timings that contributes
to the v4l2 media subsystem, which in our case is needed to provide
information about the Aspect Ratio.
version 2:
- The original media Device Tree bindings was divided in two independent
Device Trees:
* Device tree for PHYs e405/e406 in PHY dt bindings
* Device tree for HDMI RX Controller in media dt bindings
- Add OF graph ports connection model in the Device Trees
(Thanks to Laurent Pinchart <[email protected]>)
- The HDMI RX Controller was adjusted in order to work with the new
Device Trees Model:
* the "input-count" field was removed from original Device Tree and now
the count is done based on port child count.
* Changed the way to get the phy node, removing the dependency as child
node of Controller node
- Fix reported kernel test robot issues:
* Fix "warning: no previous prototype for 'dw_phy_eq_settings'"
* Fix "warning: integer literal is too large to be represented in type
'long', interpreting as 'unsigned long' per C89; this literal will have
type 'long long' in C99 onwards [-Wc99-compat]"
Reported-by: kernel test robot <[email protected]>
- Fix phy power off/on issue when the system startups without the cable
connected.
- Fix "CHECK: Comparison to NULL could be written
"of_device_get_match_data""
Nelson Costa (9):
dt-bindings: phy: Document Synopsys DesignWare HDMI RX PHYs e405 and
e406
dt-bindings: media: Document Synopsys DesignWare HDMI RX
MAINTAINERS: Add entry for Synopsys DesignWare HDMI drivers
phy: Add PHY standard HDMI opts to the PHY API
phy: dwc: Add Synopsys DesignWare HDMI RX PHYs e405 and e406 Driver
media: platform: Add Synopsys DesignWare HDMI RX Controller Driver
media: v4l2-dv-timings: Add more CEA/CTA-861 video format timings
media: dwc: dw-hdmi-rx: Add support for Aspect Ratio
media: dwc: dw-hdmi-rx: Add support for CEC
.../devicetree/bindings/media/snps,dw-hdmi-rx.yaml | 98 +
.../bindings/phy/snps,phy-dw-hdmi-e40x.yaml | 93 +
MAINTAINERS | 11 +
drivers/media/platform/Kconfig | 2 +
drivers/media/platform/Makefile | 1 +
drivers/media/platform/dwc/Kconfig | 20 +
drivers/media/platform/dwc/Makefile | 3 +
drivers/media/platform/dwc/dw-hdmi-rx.c | 3542 ++++++++++++++++++++
drivers/media/platform/dwc/dw-hdmi-rx.h | 533 +++
drivers/media/v4l2-core/v4l2-dv-timings.c | 139 +
drivers/phy/Kconfig | 1 +
drivers/phy/Makefile | 1 +
drivers/phy/dwc/Kconfig | 20 +
drivers/phy/dwc/Makefile | 9 +
drivers/phy/dwc/phy-dw-hdmi-e405.c | 497 +++
drivers/phy/dwc/phy-dw-hdmi-e406.c | 475 +++
drivers/phy/dwc/phy-dw-hdmi-e40x-core.c | 514 +++
drivers/phy/dwc/phy-dw-hdmi-e40x.h | 219 ++
include/linux/phy/dwc/dw-hdmi-phy-pdata.h | 73 +
include/linux/phy/phy-hdmi.h | 102 +
include/linux/phy/phy.h | 7 +-
include/media/dwc/dw-hdmi-rx-pdata.h | 126 +
include/uapi/linux/v4l2-dv-timings.h | 1595 ++++++++-
23 files changed, 8079 insertions(+), 2 deletions(-)
create mode 100644 Documentation/devicetree/bindings/media/snps,dw-hdmi-rx.yaml
create mode 100644 Documentation/devicetree/bindings/phy/snps,phy-dw-hdmi-e40x.yaml
create mode 100644 drivers/media/platform/dwc/Kconfig
create mode 100644 drivers/media/platform/dwc/Makefile
create mode 100644 drivers/media/platform/dwc/dw-hdmi-rx.c
create mode 100644 drivers/media/platform/dwc/dw-hdmi-rx.h
create mode 100644 drivers/phy/dwc/Kconfig
create mode 100644 drivers/phy/dwc/Makefile
create mode 100644 drivers/phy/dwc/phy-dw-hdmi-e405.c
create mode 100644 drivers/phy/dwc/phy-dw-hdmi-e406.c
create mode 100644 drivers/phy/dwc/phy-dw-hdmi-e40x-core.c
create mode 100644 drivers/phy/dwc/phy-dw-hdmi-e40x.h
create mode 100644 include/linux/phy/dwc/dw-hdmi-phy-pdata.h
create mode 100644 include/linux/phy/phy-hdmi.h
create mode 100644 include/media/dwc/dw-hdmi-rx-pdata.h
--
2.7.4
This adds support to get aspect ratio for the current
video being received and provide the info through v4l2
API query_dv_timings.
Signed-off-by: Nelson Costa <[email protected]>
---
drivers/media/platform/dwc/dw-hdmi-rx.c | 54 +++++++++++++++++++++++++++++++--
1 file changed, 52 insertions(+), 2 deletions(-)
diff --git a/drivers/media/platform/dwc/dw-hdmi-rx.c b/drivers/media/platform/dwc/dw-hdmi-rx.c
index b20eccc..a468a93 100644
--- a/drivers/media/platform/dwc/dw-hdmi-rx.c
+++ b/drivers/media/platform/dwc/dw-hdmi-rx.c
@@ -2250,13 +2250,31 @@ static u32 dw_hdmi_get_width(struct dw_hdmi_dev *dw_dev)
return width;
}
+static int dw_hdmi_vic_to_cea861(u8 hdmi_vic)
+{
+ switch (hdmi_vic) {
+ case 1:
+ return 95;
+ case 2:
+ return 94;
+ case 3:
+ return 93;
+ case 4:
+ return 98;
+ default:
+ return 0;
+ }
+}
+
static int dw_hdmi_query_dv_timings(struct v4l2_subdev *sd,
struct v4l2_dv_timings *timings)
{
struct dw_hdmi_dev *dw_dev = to_dw_dev(sd);
struct v4l2_bt_timings *bt = &timings->bt;
+ struct v4l2_dv_timings t = {0};
bool is_hdmi_vic;
u32 htot, hofs;
+ u8 cea861_vic;
u32 vtot;
u8 vic;
@@ -2351,8 +2369,40 @@ static int dw_hdmi_query_dv_timings(struct v4l2_subdev *sd,
}
}
- dev_dbg(dw_dev->dev, "%s: width=%u, height=%u, mbuscode=%u\n", __func__,
- bt->width, bt->height, dw_hdmi_get_mbus_code(dw_dev));
+ if (is_hdmi_vic)
+ cea861_vic = dw_hdmi_vic_to_cea861(bt->hdmi_vic);
+ else
+ cea861_vic = vic;
+
+ /* picture aspect ratio based on v4l2 dv timings array */
+ if (v4l2_find_dv_timings_cea861_vic(&t, cea861_vic)) {
+ /* when the numerator/denominator are zero means that the
+ * picture aspect ratio is the same of the active measures ratio
+ */
+ if (!t.bt.picture_aspect.numerator) {
+ unsigned long n, d;
+
+ rational_best_approximation(t.bt.width, t.bt.height,
+ t.bt.width, t.bt.height,
+ &n, &d);
+ t.bt.picture_aspect.numerator = n;
+ t.bt.picture_aspect.denominator = d;
+ }
+
+ bt->picture_aspect = t.bt.picture_aspect;
+ } else {
+ bt->picture_aspect.numerator = 0;
+ bt->picture_aspect.denominator = 0;
+ dev_dbg(dw_dev->dev,
+ "%s: cea861_vic=%d was not found in v4l2 dv timings",
+ __func__, cea861_vic);
+ }
+
+ dev_dbg(dw_dev->dev,
+ "%s: width=%u, height=%u, mbuscode=%u, cea861_vic=%d, ar={%d,%d}\n",
+ __func__, bt->width, bt->height, dw_hdmi_get_mbus_code(dw_dev),
+ cea861_vic, bt->picture_aspect.numerator,
+ bt->picture_aspect.denominator);
return 0;
}
--
2.7.4
This adds the new options to give support for HDMI
PHYs in a standard way. This is mainly useful when
the HDMI PHY requires parameters to be passed by
"phy_configure" function.
For this, the new struct phy_configure_opts_hdmi
was added with the required generic and standard
parameters.
Signed-off-by: Nelson Costa <[email protected]>
---
include/linux/phy/phy-hdmi.h | 102 +++++++++++++++++++++++++++++++++++++++++++
include/linux/phy/phy.h | 7 ++-
2 files changed, 108 insertions(+), 1 deletion(-)
create mode 100644 include/linux/phy/phy-hdmi.h
diff --git a/include/linux/phy/phy-hdmi.h b/include/linux/phy/phy-hdmi.h
new file mode 100644
index 0000000..62334f4
--- /dev/null
+++ b/include/linux/phy/phy-hdmi.h
@@ -0,0 +1,102 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2021 - present Synopsys, Inc. and/or its affiliates.
+ * HDMI generic PHY options.
+ *
+ * Author: Nelson Costa <[email protected]>
+ */
+#ifndef __PHY_HDMI_H_
+#define __PHY_HDMI_H_
+
+#include <linux/types.h>
+
+/**
+ * struct phy_configure_opts_hdmi - HDMI PHY configuration set
+ *
+ * This structure is used to represent the configuration state of an
+ * HDMI PHY.
+ */
+struct phy_configure_opts_hdmi {
+ /**
+ * @color_depth:
+ *
+ * Color depth, as specified by HDMI specification, represents the
+ * number of bits per pixel.
+ *
+ * Allowed values: 24, 30, 36, 48
+ *
+ */
+ u8 color_depth;
+
+ /**
+ * @tmds_bit_clock_ratio:
+ *
+ * Flag indicating, as specified by HDMI specification, the relation
+ * between TMDS Clock Rate and TMDS Character Rate.
+ *
+ * As specified by HDMI specification:
+ *
+ * tmds_bit_clock_ratio = 0, for TMDS Character Rates <= 340 Mcsc
+ * (TMDS Clock Rate = TMDS Character Rate)
+ *
+ * tmds_bit_clock_ratio = 1, for TMDS Character Rates > 340 Mcsc
+ * (TMDS Clock Rate = TMDS Character Rate / 4)
+ *
+ */
+ u8 tmds_bit_clock_ratio;
+
+ /**
+ * @scrambling:
+ *
+ * Scrambling, as specified by HDMI specification, enables the technique
+ * to reduce the EMI/RFI.
+ *
+ */
+ u8 scrambling;
+
+ /**
+ * @calibration_acq:
+ *
+ * Calibration acquisitions number for the calibration algorithm.
+ *
+ */
+ unsigned int calibration_acq;
+
+ /**
+ * @calibration_force:
+ *
+ * Flag indicating, to force calibration algorithm even if the MPLL
+ * status didn't change from previous run calibration.
+ *
+ */
+ u8 calibration_force;
+
+ /**
+ * @set_color_depth:
+ *
+ * Flag indicating, whether or not reconfigure deep_color
+ * to requested values.
+ *
+ */
+ u8 set_color_depth : 1;
+
+ /**
+ * @set_tmds_bit_clock_ratio:
+ *
+ * Flag indicating, whether or not reconfigure tmds_bit_clock_ratio
+ * to requested values.
+ *
+ */
+ u8 set_tmds_bit_clock_ratio : 1;
+
+ /**
+ * @set_scrambling:
+ *
+ * Flag indicating, whether or not reconfigure scrambling
+ * to requested values.
+ *
+ */
+ u8 set_scrambling : 1;
+};
+
+#endif /* __PHY_HDMI_H_ */
diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h
index e435bdb..8b1aaa4 100644
--- a/include/linux/phy/phy.h
+++ b/include/linux/phy/phy.h
@@ -18,6 +18,7 @@
#include <linux/phy/phy-dp.h>
#include <linux/phy/phy-mipi-dphy.h>
+#include <linux/phy/phy-hdmi.h>
struct phy;
@@ -41,7 +42,8 @@ enum phy_mode {
PHY_MODE_MIPI_DPHY,
PHY_MODE_SATA,
PHY_MODE_LVDS,
- PHY_MODE_DP
+ PHY_MODE_DP,
+ PHY_MODE_HDMI
};
/**
@@ -51,10 +53,13 @@ enum phy_mode {
* the MIPI_DPHY phy mode.
* @dp: Configuration set applicable for phys supporting
* the DisplayPort protocol.
+ * @hdmi Configuration set applicable for phys supporting
+ * the HDMI protocol.
*/
union phy_configure_opts {
struct phy_configure_opts_mipi_dphy mipi_dphy;
struct phy_configure_opts_dp dp;
+ struct phy_configure_opts_hdmi hdmi;
};
/**
--
2.7.4