From: Ryder Lee <[email protected]>
Add a node for Mali-450.
Signed-off-by: Sean Wang <[email protected]>
Signed-off-by: Ryder Lee <[email protected]>
---
kmscube as well as X11 EGL tests work fine (use Lima driver).
---
arch/arm/boot/dts/mt7623.dtsi | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index a79f0b6c3429..6a9c5afb9a36 100644
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -3,6 +3,7 @@
* Copyright (c) 2017-2018 MediaTek Inc.
* Author: John Crispin <[email protected]>
* Sean Wang <[email protected]>
+ * Ryder Lee <[email protected]>
*
*/
@@ -733,6 +734,30 @@
#reset-cells = <1>;
};
+ mali: gpu@13040000 {
+ compatible = "mediatek,mt7623-mali", "arm,mali-450";
+ reg = <0 0x13040000 0 0x30000>;
+ interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 171 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 172 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 173 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 174 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 175 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 176 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 177 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 178 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 179 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 180 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-names = "gp", "gpmmu", "pp0", "ppmmu0", "pp1",
+ "ppmmu1", "pp2", "ppmmu2", "pp3", "ppmmu3",
+ "pp";
+ clocks = <&topckgen CLK_TOP_MMPLL>,
+ <&g3dsys CLK_G3DSYS_CORE>;
+ clock-names = "bus", "core";
+ power-domains = <&scpsys MT2701_POWER_DOMAIN_MFG>;
+ resets = <&g3dsys MT2701_G3DSYS_CORE_RST>;
+ };
+
mmsys: syscon@14000000 {
compatible = "mediatek,mt7623-mmsys",
"mediatek,mt2701-mmsys",
--
2.18.0
From: Sean Wang <[email protected]>
The MediaTek MT7623 SoC contains a Mali-450, so add a compatible for it
and define its own vendor-specific properties.
Signed-off-by: Sean Wang <[email protected]>
Signed-off-by: Ryder Lee <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
---
Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
index ae63f09fda7d..73021e2dda25 100644
--- a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
@@ -17,6 +17,7 @@ Required properties:
+ amlogic,meson8b-mali
+ amlogic,meson-gxbb-mali
+ amlogic,meson-gxl-mali
+ + mediatek,mt7623-mali
+ rockchip,rk3036-mali
+ rockchip,rk3066-mali
+ rockchip,rk3188-mali
@@ -88,6 +89,10 @@ to specify one more vendor-specific compatible, among:
Required properties:
* resets: phandle to the reset line for the GPU
+ - mediatek,mt7623-mali
+ Required properties:
+ * resets: phandle to the reset line for the GPU
+
- Rockchip variants:
Required properties:
* resets: phandle to the reset line for the GPU
--
2.18.0
On 24/07/2019 11:00, [email protected] wrote:
> From: Ryder Lee <[email protected]>
>
> Add a node for Mali-450.
>
> Signed-off-by: Sean Wang <[email protected]>
> Signed-off-by: Ryder Lee <[email protected]>
Applied to v5.7-next/dts32
> ---
> kmscube as well as X11 EGL tests work fine (use Lima driver).
> ---
> arch/arm/boot/dts/mt7623.dtsi | 25 +++++++++++++++++++++++++
> 1 file changed, 25 insertions(+)
>
> diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
> index a79f0b6c3429..6a9c5afb9a36 100644
> --- a/arch/arm/boot/dts/mt7623.dtsi
> +++ b/arch/arm/boot/dts/mt7623.dtsi
> @@ -3,6 +3,7 @@
> * Copyright (c) 2017-2018 MediaTek Inc.
> * Author: John Crispin <[email protected]>
> * Sean Wang <[email protected]>
> + * Ryder Lee <[email protected]>
> *
> */
>
> @@ -733,6 +734,30 @@
> #reset-cells = <1>;
> };
>
> + mali: gpu@13040000 {
> + compatible = "mediatek,mt7623-mali", "arm,mali-450";
> + reg = <0 0x13040000 0 0x30000>;
> + interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_SPI 171 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_SPI 172 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_SPI 173 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_SPI 174 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_SPI 175 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_SPI 176 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_SPI 177 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_SPI 178 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_SPI 179 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_SPI 180 IRQ_TYPE_LEVEL_LOW>;
> + interrupt-names = "gp", "gpmmu", "pp0", "ppmmu0", "pp1",
> + "ppmmu1", "pp2", "ppmmu2", "pp3", "ppmmu3",
> + "pp";
> + clocks = <&topckgen CLK_TOP_MMPLL>,
> + <&g3dsys CLK_G3DSYS_CORE>;
> + clock-names = "bus", "core";
> + power-domains = <&scpsys MT2701_POWER_DOMAIN_MFG>;
> + resets = <&g3dsys MT2701_G3DSYS_CORE_RST>;
> + };
> +
> mmsys: syscon@14000000 {
> compatible = "mediatek,mt7623-mmsys",
> "mediatek,mt2701-mmsys",
>
On 24/07/2019 11:01, [email protected] wrote:
> From: Sean Wang <[email protected]>
>
> The MediaTek MT7623 SoC contains a Mali-450, so add a compatible for it
> and define its own vendor-specific properties.
>
> Signed-off-by: Sean Wang <[email protected]>
> Signed-off-by: Ryder Lee <[email protected]>
> Reviewed-by: Rob Herring <[email protected]>
I ported the changes to the new yaml file and applied them to v5.7-next/dts32
Thanks
> ---
> Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
> index ae63f09fda7d..73021e2dda25 100644
> --- a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
> +++ b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
> @@ -17,6 +17,7 @@ Required properties:
> + amlogic,meson8b-mali
> + amlogic,meson-gxbb-mali
> + amlogic,meson-gxl-mali
> + + mediatek,mt7623-mali
> + rockchip,rk3036-mali
> + rockchip,rk3066-mali
> + rockchip,rk3188-mali
> @@ -88,6 +89,10 @@ to specify one more vendor-specific compatible, among:
> Required properties:
> * resets: phandle to the reset line for the GPU
>
> + - mediatek,mt7623-mali
> + Required properties:
> + * resets: phandle to the reset line for the GPU
> +
> - Rockchip variants:
> Required properties:
> * resets: phandle to the reset line for the GPU
>