Add SC7280 audioreach device tree nodes and extract audio specific
dtsi nodes and add them in new file.
This patch series depends on:
-- https://patchwork.kernel.org/project/linux-clk/list/?series=713587
Corresponding dt-bindings not mainlined yet.
-- https://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux.git/commit/?h=rproc-next&id=8490a99586abd480d7139893f78c019790a58979
Changes Since v2:
-- Remove Patch related to Add CGCR reset property.
-- Remove Patch related to Disable legacy path clock nodes.
-- Add dt-bindings for missing properties.
-- Change the order of nodes.
-- Move digictal codec macro nodes to root nod from soc node.
-- Add adsp-pil-mode property in required clock nodes.
Changes Since v1:
-- Move remoteproc node to soc dtsi file.
-- Add qcom, adsp-pil-mode reg property in lpasscc node.
-- Fix typo errors.
-- Remove redundant status properties.
Srinivasa Rao Mandadapu (7):
arm64: dts: qcom: sc7280: Extract audio nodes from common idp dtsi
file
arm64: dts: qcom: sc7280: Add sound node
arm64: dts: qcom: sc7280: Add LPASS PIL node
arm64: dts: qcom: sc7280: Update VA/RX/TX macro clock nodes
arm64: dts: qcom: sc7280: Update lpass_tlmm node
arm64: dts: qcom: sc7280: Update qcom,adsp-pil-mode property
dt-bindings: remoteproc: qcom: sc7280-adsp-pil: Add missing properties
.../bindings/remoteproc/qcom,sc7280-adsp-pil.yaml | 30 +++-
arch/arm64/boot/dts/qcom/sc7280-audio-idp.dtsi | 135 ++++++++++++++
arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts | 24 +--
.../qcom/sc7280-herobrine-audioreach-wcd9385.dtsi | 194 +++++++++++++++++++++
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 126 -------------
arch/arm64/boot/dts/qcom/sc7280.dtsi | 95 ++++++++++
6 files changed, 451 insertions(+), 153 deletions(-)
create mode 100644 arch/arm64/boot/dts/qcom/sc7280-audio-idp.dtsi
create mode 100644 arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
--
2.7.4
Split common idp dtsi file into audio specific dtsi and common
idp dtsi file.
It is required to isolate idp and crd-rev3 platform device tree nodes
and convert crd-rev3 platform device tree nodes into audioreach specific
device tree nodes.
Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
Tested-by: Mohammad Rafi Shaik <[email protected]>
---
arch/arm64/boot/dts/qcom/sc7280-audio-idp.dtsi | 135 +++++++++++++++++++++++++
arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts | 1 +
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 126 -----------------------
3 files changed, 136 insertions(+), 126 deletions(-)
create mode 100644 arch/arm64/boot/dts/qcom/sc7280-audio-idp.dtsi
diff --git a/arch/arm64/boot/dts/qcom/sc7280-audio-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-audio-idp.dtsi
new file mode 100644
index 0000000..614fb06
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sc7280-audio-idp.dtsi
@@ -0,0 +1,135 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * sc7280 Audio IDP board device tree source (common between SKU1 and SKU2)
+ *
+ * Copyright (c) 2022, The Linux Foundation. All rights reserved.
+ */
+
+/{
+ /* BOARD-SPECIFIC TOP LEVEL NODES */
+ sound: sound {
+ compatible = "google,sc7280-herobrine";
+ model = "sc7280-wcd938x-max98360a-1mic";
+
+ audio-routing =
+ "IN1_HPHL", "HPHL_OUT",
+ "IN2_HPHR", "HPHR_OUT",
+ "AMIC1", "MIC BIAS1",
+ "AMIC2", "MIC BIAS2",
+ "VA DMIC0", "MIC BIAS3",
+ "VA DMIC1", "MIC BIAS3",
+ "VA DMIC2", "MIC BIAS1",
+ "VA DMIC3", "MIC BIAS1",
+ "TX SWR_ADC0", "ADC1_OUTPUT",
+ "TX SWR_ADC1", "ADC2_OUTPUT",
+ "TX SWR_ADC2", "ADC3_OUTPUT",
+ "TX SWR_DMIC0", "DMIC1_OUTPUT",
+ "TX SWR_DMIC1", "DMIC2_OUTPUT",
+ "TX SWR_DMIC2", "DMIC3_OUTPUT",
+ "TX SWR_DMIC3", "DMIC4_OUTPUT",
+ "TX SWR_DMIC4", "DMIC5_OUTPUT",
+ "TX SWR_DMIC5", "DMIC6_OUTPUT",
+ "TX SWR_DMIC6", "DMIC7_OUTPUT",
+ "TX SWR_DMIC7", "DMIC8_OUTPUT";
+
+ qcom,msm-mbhc-hphl-swh = <1>;
+ qcom,msm-mbhc-gnd-swh = <1>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #sound-dai-cells = <0>;
+
+ dai-link@0 {
+ link-name = "MAX98360A";
+ reg = <0>;
+
+ cpu {
+ sound-dai = <&lpass_cpu MI2S_SECONDARY>;
+ };
+
+ codec {
+ sound-dai = <&max98360a>;
+ };
+ };
+
+ dai-link@1 {
+ link-name = "DisplayPort";
+ reg = <1>;
+
+ cpu {
+ sound-dai = <&lpass_cpu LPASS_DP_RX>;
+ };
+
+ codec {
+ sound-dai = <&mdss_dp>;
+ };
+ };
+
+ dai-link@2 {
+ link-name = "WCD9385 Playback";
+ reg = <2>;
+
+ cpu {
+ sound-dai = <&lpass_cpu LPASS_CDC_DMA_RX0>;
+ };
+
+ codec {
+ sound-dai = <&wcd9385 0>, <&swr0 0>, <&lpass_rx_macro 0>;
+ };
+ };
+
+ dai-link@3 {
+ link-name = "WCD9385 Capture";
+ reg = <3>;
+
+ cpu {
+ sound-dai = <&lpass_cpu LPASS_CDC_DMA_TX3>;
+ };
+
+ codec {
+ sound-dai = <&wcd9385 1>, <&swr1 0>, <&lpass_tx_macro 0>;
+ };
+ };
+
+ dai-link@4 {
+ link-name = "DMIC";
+ reg = <4>;
+
+ cpu {
+ sound-dai = <&lpass_cpu LPASS_CDC_DMA_VA_TX0>;
+ };
+
+ codec {
+ sound-dai = <&lpass_va_macro 0>;
+ };
+ };
+ };
+};
+
+&lpass_cpu {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&mi2s1_data0>, <&mi2s1_sclk>, <&mi2s1_ws>;
+
+ dai-link@1 {
+ reg = <MI2S_SECONDARY>;
+ qcom,playback-sd-lines = <0>;
+ };
+
+ dai-link@5 {
+ reg = <LPASS_DP_RX>;
+ };
+
+ dai-link@6 {
+ reg = <LPASS_CDC_DMA_RX0>;
+ };
+
+ dai-link@19 {
+ reg = <LPASS_CDC_DMA_TX3>;
+ };
+
+ dai-link@25 {
+ reg = <LPASS_CDC_DMA_VA_TX0>;
+ };
+};
diff --git a/arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts b/arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts
index 1185141..b024626 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts
+++ b/arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts
@@ -8,6 +8,7 @@
/dts-v1/;
#include "sc7280-idp.dtsi"
+#include "sc7280-audio-idp.dtsi"
#include "sc7280-idp-ec-h1.dtsi"
/ {
diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
index fa10ddd..6b41574 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
@@ -87,104 +87,6 @@
pinctrl-names = "default";
pinctrl-0 = <&nvme_pwren>;
};
-
- sound: sound {
- compatible = "google,sc7280-herobrine";
- model = "sc7280-wcd938x-max98360a-1mic";
-
- audio-routing =
- "IN1_HPHL", "HPHL_OUT",
- "IN2_HPHR", "HPHR_OUT",
- "AMIC1", "MIC BIAS1",
- "AMIC2", "MIC BIAS2",
- "VA DMIC0", "MIC BIAS3",
- "VA DMIC1", "MIC BIAS3",
- "VA DMIC2", "MIC BIAS1",
- "VA DMIC3", "MIC BIAS1",
- "TX SWR_ADC0", "ADC1_OUTPUT",
- "TX SWR_ADC1", "ADC2_OUTPUT",
- "TX SWR_ADC2", "ADC3_OUTPUT",
- "TX SWR_DMIC0", "DMIC1_OUTPUT",
- "TX SWR_DMIC1", "DMIC2_OUTPUT",
- "TX SWR_DMIC2", "DMIC3_OUTPUT",
- "TX SWR_DMIC3", "DMIC4_OUTPUT",
- "TX SWR_DMIC4", "DMIC5_OUTPUT",
- "TX SWR_DMIC5", "DMIC6_OUTPUT",
- "TX SWR_DMIC6", "DMIC7_OUTPUT",
- "TX SWR_DMIC7", "DMIC8_OUTPUT";
-
- qcom,msm-mbhc-hphl-swh = <1>;
- qcom,msm-mbhc-gnd-swh = <1>;
-
- #address-cells = <1>;
- #size-cells = <0>;
- #sound-dai-cells = <0>;
-
- dai-link@0 {
- link-name = "MAX98360A";
- reg = <0>;
-
- cpu {
- sound-dai = <&lpass_cpu MI2S_SECONDARY>;
- };
-
- codec {
- sound-dai = <&max98360a>;
- };
- };
-
- dai-link@1 {
- link-name = "DisplayPort";
- reg = <1>;
-
- cpu {
- sound-dai = <&lpass_cpu LPASS_DP_RX>;
- };
-
- codec {
- sound-dai = <&mdss_dp>;
- };
- };
-
- dai-link@2 {
- link-name = "WCD9385 Playback";
- reg = <2>;
-
- cpu {
- sound-dai = <&lpass_cpu LPASS_CDC_DMA_RX0>;
- };
-
- codec {
- sound-dai = <&wcd9385 0>, <&swr0 0>, <&lpass_rx_macro 0>;
- };
- };
-
- dai-link@3 {
- link-name = "WCD9385 Capture";
- reg = <3>;
-
- cpu {
- sound-dai = <&lpass_cpu LPASS_CDC_DMA_TX3>;
- };
-
- codec {
- sound-dai = <&wcd9385 1>, <&swr1 0>, <&lpass_tx_macro 0>;
- };
- };
-
- dai-link@4 {
- link-name = "DMIC";
- reg = <4>;
-
- cpu {
- sound-dai = <&lpass_cpu LPASS_CDC_DMA_VA_TX0>;
- };
-
- codec {
- sound-dai = <&lpass_va_macro 0>;
- };
- };
- };
};
&apps_rsc {
@@ -377,34 +279,6 @@
status = "okay";
};
-&lpass_cpu {
- status = "okay";
-
- pinctrl-names = "default";
- pinctrl-0 = <&mi2s1_data0>, <&mi2s1_sclk>, <&mi2s1_ws>;
-
- dai-link@1 {
- reg = <MI2S_SECONDARY>;
- qcom,playback-sd-lines = <0>;
- };
-
- dai-link@5 {
- reg = <LPASS_DP_RX>;
- };
-
- dai-link@6 {
- reg = <LPASS_CDC_DMA_RX0>;
- };
-
- dai-link@19 {
- reg = <LPASS_CDC_DMA_TX3>;
- };
-
- dai-link@25 {
- reg = <LPASS_CDC_DMA_VA_TX0>;
- };
-};
-
&lpass_rx_macro {
status = "okay";
};
--
2.7.4
Update lpass_tlmm clock properties, as different clock sources
are required in ADSP enabled platforms
Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
Tested-by: Mohammad Rafi Shaik <[email protected]>
---
.../arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
index 674b01a..232e1dc 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
@@ -167,6 +167,15 @@
};
};
+&lpass_tlmm {
+ clocks = <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
+
+ clock-names = "core", "audio";
+ reg = <0 0x033c0000 0x0 0x20000>,
+ <0 0x03550000 0x0 0xa100>;
+};
+
&remoteproc_adsp {
status = "okay";
};
--
2.7.4
On 19/01/2023 13:27, Srinivasa Rao Mandadapu wrote:
> Update lpass_tlmm clock properties, as different clock sources
> are required in ADSP enabled platforms
>
> Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
> Tested-by: Mohammad Rafi Shaik <[email protected]>
> ---
> .../arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
> index 674b01a..232e1dc 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
> @@ -167,6 +167,15 @@
> };
> };
>
> +&lpass_tlmm {
> + clocks = <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
> +
> + clock-names = "core", "audio";
> + reg = <0 0x033c0000 0x0 0x20000>,
> + <0 0x03550000 0x0 0xa100>;
What is the difference? The length of audio IO space? You need to
explain this in commit msg.
Best regards,
Krzysztof