Hi Palmer,
FYI, the error/warning still remains.
tree: https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq/core
head: ba63053f018721a0ad60b083e21a15e324a4a8c4
commit: 886d70aac148f6015ae3d1379c81b98af3e70981 [12/13] ARM: irq: Convert to GENERIC_IRQ_MULTI_HANDLER
config: arm-netx_defconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
git checkout 886d70aac148f6015ae3d1379c81b98af3e70981
# save the attached .config to linux build tree
make.cross ARCH=arm
All errors (new ones prefixed by >>):
drivers/irqchip/irq-vic.c: In function 'vic_register':
>> drivers/irqchip/irq-vic.c:295:2: error: implicit declaration of function 'set_handle_irq'; did you mean 'vic_handle_irq'? [-Werror=implicit-function-declaration]
set_handle_irq(vic_handle_irq);
^~~~~~~~~~~~~~
vic_handle_irq
cc1: some warnings being treated as errors
vim +295 drivers/irqchip/irq-vic.c
ce94df9c0 arch/arm/common/vic.c Linus Walleij 2012-04-20 262
bb06b7371 arch/arm/common/vic.c Hartley Sweeten 2010-01-12 263 /**
f9b28ccbc arch/arm/common/vic.c Jamie Iles 2011-09-27 264 * vic_register() - Register a VIC.
bb06b7371 arch/arm/common/vic.c Hartley Sweeten 2010-01-12 265 * @base: The base address of the VIC.
e641b987c drivers/irqchip/irq-vic.c Linus Walleij 2013-11-21 266 * @parent_irq: The parent IRQ if cascaded, else 0.
bb06b7371 arch/arm/common/vic.c Hartley Sweeten 2010-01-12 267 * @irq: The base IRQ for the VIC.
fa943bed6 arch/arm/common/vic.c Linus Walleij 2012-04-20 268 * @valid_sources: bitmask of valid interrupts
bb06b7371 arch/arm/common/vic.c Hartley Sweeten 2010-01-12 269 * @resume_sources: bitmask of interrupts allowed for resume sources.
f9b28ccbc arch/arm/common/vic.c Jamie Iles 2011-09-27 270 * @node: The device tree node associated with the VIC.
bb06b7371 arch/arm/common/vic.c Hartley Sweeten 2010-01-12 271 *
bb06b7371 arch/arm/common/vic.c Hartley Sweeten 2010-01-12 272 * Register the VIC with the system device tree so that it can be notified
bb06b7371 arch/arm/common/vic.c Hartley Sweeten 2010-01-12 273 * of suspend and resume requests and ensure that the correct actions are
bb06b7371 arch/arm/common/vic.c Hartley Sweeten 2010-01-12 274 * taken to re-instate the settings on resume.
f9b28ccbc arch/arm/common/vic.c Jamie Iles 2011-09-27 275 *
f9b28ccbc arch/arm/common/vic.c Jamie Iles 2011-09-27 276 * This also configures the IRQ domain for the VIC.
bb06b7371 arch/arm/common/vic.c Hartley Sweeten 2010-01-12 277 */
e641b987c drivers/irqchip/irq-vic.c Linus Walleij 2013-11-21 278 static void __init vic_register(void __iomem *base, unsigned int parent_irq,
e641b987c drivers/irqchip/irq-vic.c Linus Walleij 2013-11-21 279 unsigned int irq,
fa943bed6 arch/arm/common/vic.c Linus Walleij 2012-04-20 280 u32 valid_sources, u32 resume_sources,
fa943bed6 arch/arm/common/vic.c Linus Walleij 2012-04-20 281 struct device_node *node)
bb06b7371 arch/arm/common/vic.c Hartley Sweeten 2010-01-12 282 {
bb06b7371 arch/arm/common/vic.c Hartley Sweeten 2010-01-12 283 struct vic_device *v;
5ced33bc0 arch/arm/common/vic.c Linus Walleij 2012-12-26 284 int i;
bb06b7371 arch/arm/common/vic.c Hartley Sweeten 2010-01-12 285
f9b28ccbc arch/arm/common/vic.c Jamie Iles 2011-09-27 286 if (vic_id >= ARRAY_SIZE(vic_devices)) {
bb06b7371 arch/arm/common/vic.c Hartley Sweeten 2010-01-12 287 printk(KERN_ERR "%s: too few VICs, increase CONFIG_ARM_VIC_NR\n", __func__);
f9b28ccbc arch/arm/common/vic.c Jamie Iles 2011-09-27 288 return;
f9b28ccbc arch/arm/common/vic.c Jamie Iles 2011-09-27 289 }
f9b28ccbc arch/arm/common/vic.c Jamie Iles 2011-09-27 290
bb06b7371 arch/arm/common/vic.c Hartley Sweeten 2010-01-12 291 v = &vic_devices[vic_id];
bb06b7371 arch/arm/common/vic.c Hartley Sweeten 2010-01-12 292 v->base = base;
ce94df9c0 arch/arm/common/vic.c Linus Walleij 2012-04-20 293 v->valid_sources = valid_sources;
bb06b7371 arch/arm/common/vic.c Hartley Sweeten 2010-01-12 294 v->resume_sources = resume_sources;
7fb7d8ae1 arch/arm/common/vic.c Rob Herring 2012-11-20 @295 set_handle_irq(vic_handle_irq);
bb06b7371 arch/arm/common/vic.c Hartley Sweeten 2010-01-12 296 vic_id++;
e641b987c drivers/irqchip/irq-vic.c Linus Walleij 2013-11-21 297
e641b987c drivers/irqchip/irq-vic.c Linus Walleij 2013-11-21 298 if (parent_irq) {
9f2135419 drivers/irqchip/irq-vic.c Thomas Gleixner 2015-06-21 299 irq_set_chained_handler_and_data(parent_irq,
9f2135419 drivers/irqchip/irq-vic.c Thomas Gleixner 2015-06-21 300 vic_handle_irq_cascaded, v);
e641b987c drivers/irqchip/irq-vic.c Linus Walleij 2013-11-21 301 }
e641b987c drivers/irqchip/irq-vic.c Linus Walleij 2013-11-21 302
07c9249f1 arch/arm/common/vic.c Linus Walleij 2012-10-16 303 v->domain = irq_domain_add_simple(node, fls(valid_sources), irq,
fa943bed6 arch/arm/common/vic.c Linus Walleij 2012-04-20 304 &vic_irqdomain_ops, v);
5ced33bc0 arch/arm/common/vic.c Linus Walleij 2012-12-26 305 /* create an IRQ mapping for each valid IRQ */
5ced33bc0 arch/arm/common/vic.c Linus Walleij 2012-12-26 306 for (i = 0; i < fls(valid_sources); i++)
5ced33bc0 arch/arm/common/vic.c Linus Walleij 2012-12-26 307 if (valid_sources & (1 << i))
5ced33bc0 arch/arm/common/vic.c Linus Walleij 2012-12-26 308 irq_create_mapping(v->domain, i);
3b4df9dbd drivers/irqchip/irq-vic.c Linus Walleij 2013-11-24 309 /* If no base IRQ was passed, figure out our allocated base */
3b4df9dbd drivers/irqchip/irq-vic.c Linus Walleij 2013-11-24 310 if (irq)
3b4df9dbd drivers/irqchip/irq-vic.c Linus Walleij 2013-11-24 311 v->irq = irq;
3b4df9dbd drivers/irqchip/irq-vic.c Linus Walleij 2013-11-24 312 else
3b4df9dbd drivers/irqchip/irq-vic.c Linus Walleij 2013-11-24 313 v->irq = irq_find_mapping(v->domain, 0);
bb06b7371 arch/arm/common/vic.c Hartley Sweeten 2010-01-12 314 }
bb06b7371 arch/arm/common/vic.c Hartley Sweeten 2010-01-12 315
:::::: The code at line 295 was first introduced by commit
:::::: 7fb7d8ae1036f1002fe8b16c15cc26d32046df64 ARM: VIC: set handle_arch_irq in VIC initialization
:::::: TO: Rob Herring <[email protected]>
:::::: CC: Rob Herring <[email protected]>
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
On Tue, 20 Mar 2018, kbuild test robot wrote:
> Hi Palmer,
>
> FYI, the error/warning still remains.
Zapped the commit as well...
On Tue, 20 Mar 2018 00:53:21 PDT (-0700), [email protected] wrote:
> On Tue, 20 Mar 2018, kbuild test robot wrote:
>
>> Hi Palmer,
>>
>> FYI, the error/warning still remains.
>
> Zapped the commit as well...
Sorry, I got the flu at ELC and have been offline for a bit. It looks like
you've kept the IRQ and RISC-V patches, I'll fix up the others are re-submit
them as a separate patch set.
On Tue, Mar 20, 2018 at 6:52 PM, Palmer Dabbelt <[email protected]> wrote:
> On Tue, 20 Mar 2018 00:53:21 PDT (-0700), [email protected] wrote:
>>
>> On Tue, 20 Mar 2018, kbuild test robot wrote:
>>
>>> Hi Palmer,
>>>
>>> FYI, the error/warning still remains.
>>
>>
>> Zapped the commit as well...
>
>
> Sorry, I got the flu at ELC and have been offline for a bit. It looks like
> you've kept the IRQ and RISC-V patches, I'll fix up the others are re-submit
> them as a separate patch set.
Not sure which patches are in flight at the moment. To get a clean build
on arm32 and arm64 randconfig kernels, I needed the fixup below
on top of linux-next (not meant to be applied like this, just for reference).
Arnd
diff --git a/arch/arm64/include/asm/irq.h b/arch/arm64/include/asm/irq.h
index a0fee6985e6a..b2b0c6405eb0 100644
--- a/arch/arm64/include/asm/irq.h
+++ b/arch/arm64/include/asm/irq.h
@@ -8,8 +8,6 @@
struct pt_regs;
-extern void set_handle_irq(void (*handle_irq)(struct pt_regs *));
-
static inline int nr_legacy_irqs(void)
{
return 0;
diff --git a/arch/arm64/kernel/irq.c b/arch/arm64/kernel/irq.c
index 60e5fc661f74..780a12f59a8f 100644
--- a/arch/arm64/kernel/irq.c
+++ b/arch/arm64/kernel/irq.c
@@ -42,16 +42,6 @@ int arch_show_interrupts(struct seq_file *p, int prec)
return 0;
}
-void (*handle_arch_irq)(struct pt_regs *) = NULL;
-
-void __init set_handle_irq(void (*handle_irq)(struct pt_regs *))
-{
- if (handle_arch_irq)
- return;
-
- handle_arch_irq = handle_irq;
-}
-
#ifdef CONFIG_VMAP_STACK
static void init_irq_stacks(void)
{
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index e9233db16e03..164516c1d49d 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -8,8 +8,8 @@ config ARM_GIC
bool
select IRQ_DOMAIN
select IRQ_DOMAIN_HIERARCHY
- select MULTI_IRQ_HANDLER
select GENERIC_IRQ_EFFECTIVE_AFF_MASK
+ select GENERIC_IRQ_MULTI_HANDLER
config ARM_GIC_PM
bool
@@ -34,10 +34,9 @@ config GIC_NON_BANKED
config ARM_GIC_V3
bool
select IRQ_DOMAIN
- select MULTI_IRQ_HANDLER
- select IRQ_DOMAIN_HIERARCHY
select PARTITION_PERCPU
select GENERIC_IRQ_EFFECTIVE_AFF_MASK
+ select GENERIC_IRQ_MULTI_HANDLER
config ARM_GIC_V3_ITS
bool
@@ -66,7 +65,7 @@ config ARM_NVIC
config ARM_VIC
bool
select IRQ_DOMAIN
- select MULTI_IRQ_HANDLER
+ select GENERIC_IRQ_MULTI_HANDLER
config ARM_VIC_NR
int
@@ -92,15 +91,15 @@ config ALPINE_MSI
config ATMEL_AIC_IRQ
bool
select GENERIC_IRQ_CHIP
+ select GENERIC_IRQ_MULTI_HANDLER
select IRQ_DOMAIN
- select MULTI_IRQ_HANDLER
select SPARSE_IRQ
config ATMEL_AIC5_IRQ
bool
select GENERIC_IRQ_CHIP
+ select GENERIC_IRQ_MULTI_HANDLER
select IRQ_DOMAIN
- select MULTI_IRQ_HANDLER
select SPARSE_IRQ
config I8259
@@ -136,8 +135,8 @@ config DW_APB_ICTL
config FARADAY_FTINTC010
bool
+ select GENERIC_IRQ_MULTI_HANDLER
select IRQ_DOMAIN
- select MULTI_IRQ_HANDLER
select SPARSE_IRQ
config HISILICON_IRQ_MBIGEN
@@ -162,7 +161,7 @@ config CLPS711X_IRQCHIP
bool
depends on ARCH_CLPS711X
select IRQ_DOMAIN
- select MULTI_IRQ_HANDLER
+ select GENERIC_IRQ_MULTI_HANDLER
select SPARSE_IRQ
default y
@@ -180,8 +179,8 @@ config OMAP_IRQCHIP
config ORION_IRQCHIP
bool
+ select GENERIC_IRQ_MULTI_HANDLER
select IRQ_DOMAIN
- select MULTI_IRQ_HANDLER
config PIC32_EVIC
bool
On Mon, 26 Mar 2018 01:07:54 PDT (-0700), Arnd Bergmann wrote:
> On Tue, Mar 20, 2018 at 6:52 PM, Palmer Dabbelt <[email protected]> wrote:
>> On Tue, 20 Mar 2018 00:53:21 PDT (-0700), [email protected] wrote:
>>>
>>> On Tue, 20 Mar 2018, kbuild test robot wrote:
>>>
>>>> Hi Palmer,
>>>>
>>>> FYI, the error/warning still remains.
>>>
>>>
>>> Zapped the commit as well...
>>
>>
>> Sorry, I got the flu at ELC and have been offline for a bit. It looks like
>> you've kept the IRQ and RISC-V patches, I'll fix up the others are re-submit
>> them as a separate patch set.
>
> Not sure which patches are in flight at the moment. To get a clean build
> on arm32 and arm64 randconfig kernels, I needed the fixup below
> on top of linux-next (not meant to be applied like this, just for reference).
Thanks, I missed these during my original patch submission. I think the
cleanest way to submit this is to spin a whole new patch set, including those
that are already in tip. Would it be possible to just remove my IRQ cleanups
from tip so I can try again?
>
> Arnd
>
> diff --git a/arch/arm64/include/asm/irq.h b/arch/arm64/include/asm/irq.h
> index a0fee6985e6a..b2b0c6405eb0 100644
> --- a/arch/arm64/include/asm/irq.h
> +++ b/arch/arm64/include/asm/irq.h
> @@ -8,8 +8,6 @@
>
> struct pt_regs;
>
> -extern void set_handle_irq(void (*handle_irq)(struct pt_regs *));
> -
> static inline int nr_legacy_irqs(void)
> {
> return 0;
> diff --git a/arch/arm64/kernel/irq.c b/arch/arm64/kernel/irq.c
> index 60e5fc661f74..780a12f59a8f 100644
> --- a/arch/arm64/kernel/irq.c
> +++ b/arch/arm64/kernel/irq.c
> @@ -42,16 +42,6 @@ int arch_show_interrupts(struct seq_file *p, int prec)
> return 0;
> }
>
> -void (*handle_arch_irq)(struct pt_regs *) = NULL;
> -
> -void __init set_handle_irq(void (*handle_irq)(struct pt_regs *))
> -{
> - if (handle_arch_irq)
> - return;
> -
> - handle_arch_irq = handle_irq;
> -}
> -
> #ifdef CONFIG_VMAP_STACK
> static void init_irq_stacks(void)
> {
> diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
> index e9233db16e03..164516c1d49d 100644
> --- a/drivers/irqchip/Kconfig
> +++ b/drivers/irqchip/Kconfig
> @@ -8,8 +8,8 @@ config ARM_GIC
> bool
> select IRQ_DOMAIN
> select IRQ_DOMAIN_HIERARCHY
> - select MULTI_IRQ_HANDLER
> select GENERIC_IRQ_EFFECTIVE_AFF_MASK
> + select GENERIC_IRQ_MULTI_HANDLER
>
> config ARM_GIC_PM
> bool
> @@ -34,10 +34,9 @@ config GIC_NON_BANKED
> config ARM_GIC_V3
> bool
> select IRQ_DOMAIN
> - select MULTI_IRQ_HANDLER
> - select IRQ_DOMAIN_HIERARCHY
> select PARTITION_PERCPU
> select GENERIC_IRQ_EFFECTIVE_AFF_MASK
> + select GENERIC_IRQ_MULTI_HANDLER
>
> config ARM_GIC_V3_ITS
> bool
> @@ -66,7 +65,7 @@ config ARM_NVIC
> config ARM_VIC
> bool
> select IRQ_DOMAIN
> - select MULTI_IRQ_HANDLER
> + select GENERIC_IRQ_MULTI_HANDLER
>
> config ARM_VIC_NR
> int
> @@ -92,15 +91,15 @@ config ALPINE_MSI
> config ATMEL_AIC_IRQ
> bool
> select GENERIC_IRQ_CHIP
> + select GENERIC_IRQ_MULTI_HANDLER
> select IRQ_DOMAIN
> - select MULTI_IRQ_HANDLER
> select SPARSE_IRQ
>
> config ATMEL_AIC5_IRQ
> bool
> select GENERIC_IRQ_CHIP
> + select GENERIC_IRQ_MULTI_HANDLER
> select IRQ_DOMAIN
> - select MULTI_IRQ_HANDLER
> select SPARSE_IRQ
>
> config I8259
> @@ -136,8 +135,8 @@ config DW_APB_ICTL
>
> config FARADAY_FTINTC010
> bool
> + select GENERIC_IRQ_MULTI_HANDLER
> select IRQ_DOMAIN
> - select MULTI_IRQ_HANDLER
> select SPARSE_IRQ
>
> config HISILICON_IRQ_MBIGEN
> @@ -162,7 +161,7 @@ config CLPS711X_IRQCHIP
> bool
> depends on ARCH_CLPS711X
> select IRQ_DOMAIN
> - select MULTI_IRQ_HANDLER
> + select GENERIC_IRQ_MULTI_HANDLER
> select SPARSE_IRQ
> default y
>
> @@ -180,8 +179,8 @@ config OMAP_IRQCHIP
>
> config ORION_IRQCHIP
> bool
> + select GENERIC_IRQ_MULTI_HANDLER
> select IRQ_DOMAIN
> - select MULTI_IRQ_HANDLER
>
> config PIC32_EVIC
> bool
On Mon, 26 Mar 2018, Palmer Dabbelt wrote:
> On Mon, 26 Mar 2018 01:07:54 PDT (-0700), Arnd Bergmann wrote:
> > On Tue, Mar 20, 2018 at 6:52 PM, Palmer Dabbelt <[email protected]> wrote:
> > > On Tue, 20 Mar 2018 00:53:21 PDT (-0700), [email protected] wrote:
> > > >
> > > > On Tue, 20 Mar 2018, kbuild test robot wrote:
> > > >
> > > > > Hi Palmer,
> > > > >
> > > > > FYI, the error/warning still remains.
> > > >
> > > >
> > > > Zapped the commit as well...
> > >
> > >
> > > Sorry, I got the flu at ELC and have been offline for a bit. It looks
> > > like
> > > you've kept the IRQ and RISC-V patches, I'll fix up the others are
> > > re-submit
> > > them as a separate patch set.
> >
> > Not sure which patches are in flight at the moment. To get a clean build
> > on arm32 and arm64 randconfig kernels, I needed the fixup below
> > on top of linux-next (not meant to be applied like this, just for
> > reference).
>
> Thanks, I missed these during my original patch submission. I think the
> cleanest way to submit this is to spin a whole new patch set, including those
> that are already in tip. Would it be possible to just remove my IRQ cleanups
> from tip so I can try again?
The commits in tip right now are:
cc6c98485f8e ("RISC-V: Move to the new GENERIC_IRQ_MULTI_HANDLER handler")
caacdbf4aa56 ("genirq: Add CONFIG_GENERIC_IRQ_MULTI_HANDLER")
I surely can revert them, but I don't see how they would break arm or
anything else.
Thanks,
tglx
On Mon, 26 Mar 2018 22:27:36 PDT (-0700), [email protected] wrote:
> On Mon, 26 Mar 2018, Palmer Dabbelt wrote:
>> On Mon, 26 Mar 2018 01:07:54 PDT (-0700), Arnd Bergmann wrote:
>> > On Tue, Mar 20, 2018 at 6:52 PM, Palmer Dabbelt <[email protected]> wrote:
>> > > On Tue, 20 Mar 2018 00:53:21 PDT (-0700), [email protected] wrote:
>> > > >
>> > > > On Tue, 20 Mar 2018, kbuild test robot wrote:
>> > > >
>> > > > > Hi Palmer,
>> > > > >
>> > > > > FYI, the error/warning still remains.
>> > > >
>> > > >
>> > > > Zapped the commit as well...
>> > >
>> > >
>> > > Sorry, I got the flu at ELC and have been offline for a bit. It looks
>> > > like
>> > > you've kept the IRQ and RISC-V patches, I'll fix up the others are
>> > > re-submit
>> > > them as a separate patch set.
>> >
>> > Not sure which patches are in flight at the moment. To get a clean build
>> > on arm32 and arm64 randconfig kernels, I needed the fixup below
>> > on top of linux-next (not meant to be applied like this, just for
>> > reference).
>>
>> Thanks, I missed these during my original patch submission. I think the
>> cleanest way to submit this is to spin a whole new patch set, including those
>> that are already in tip. Would it be possible to just remove my IRQ cleanups
>> from tip so I can try again?
>
> The commits in tip right now are:
>
> cc6c98485f8e ("RISC-V: Move to the new GENERIC_IRQ_MULTI_HANDLER handler")
> caacdbf4aa56 ("genirq: Add CONFIG_GENERIC_IRQ_MULTI_HANDLER")
>
> I surely can revert them, but I don't see how they would break arm or
> anything else.
If GENERIC_IRQ_MULTI_HANDLER is set via randconfig then set_handle_irq() is
pulled in from the generic code, which conflicts with the definitions in arm,
arm64, and openrisc. The RISC-V commit depends on the genirq one.
On Tue, 27 Mar 2018, Palmer Dabbelt wrote:
> On Mon, 26 Mar 2018 22:27:36 PDT (-0700), [email protected] wrote:
> >
> > The commits in tip right now are:
> >
> > cc6c98485f8e ("RISC-V: Move to the new GENERIC_IRQ_MULTI_HANDLER handler")
> > caacdbf4aa56 ("genirq: Add CONFIG_GENERIC_IRQ_MULTI_HANDLER")
> >
> > I surely can revert them, but I don't see how they would break arm or
> > anything else.
>
> If GENERIC_IRQ_MULTI_HANDLER is set via randconfig then set_handle_irq() is
> pulled in from the generic code, which conflicts with the definitions in arm,
> arm64, and openrisc. The RISC-V commit depends on the genirq one.
Two ways to fix that:
- Rename set_handle_irq() in tip:irq/core and then convert the rest of the
tree over. A few more files touched, but nothing harmful
- Make GENERIC_IRQ_MULTI_HANDLER depend on !IRQ_MULTI_HANDLER. That should
cure it as well
Thanks,
tglx
On Tue, 27 Mar 2018 08:38:29 PDT (-0700), [email protected] wrote:
> On Tue, 27 Mar 2018, Palmer Dabbelt wrote:
>> On Mon, 26 Mar 2018 22:27:36 PDT (-0700), [email protected] wrote:
>> >
>> > The commits in tip right now are:
>> >
>> > cc6c98485f8e ("RISC-V: Move to the new GENERIC_IRQ_MULTI_HANDLER handler")
>> > caacdbf4aa56 ("genirq: Add CONFIG_GENERIC_IRQ_MULTI_HANDLER")
>> >
>> > I surely can revert them, but I don't see how they would break arm or
>> > anything else.
>>
>> If GENERIC_IRQ_MULTI_HANDLER is set via randconfig then set_handle_irq() is
>> pulled in from the generic code, which conflicts with the definitions in arm,
>> arm64, and openrisc. The RISC-V commit depends on the genirq one.
>
> Two ways to fix that:
>
> - Rename set_handle_irq() in tip:irq/core and then convert the rest of the
> tree over. A few more files touched, but nothing harmful
>
> - Make GENERIC_IRQ_MULTI_HANDLER depend on !IRQ_MULTI_HANDLER. That should
> cure it as well
I have a patch set that does the second one, but it's done in a manner that
assumes the partial patch set got merged. Let me just send it out...