2023-06-16 17:36:53

by Sebastian Reichel

Subject: [PATCH v1 3/4] dt-bindings: PCI: dwc: rockchip: Update for RK3588

The PCIe 2.0 controllers on RK3588 need one additional clock,
one additional reset line and one for ranges entry.

Signed-off-by: Sebastian Reichel <[email protected]>
---
.../bindings/pci/rockchip-dw-pcie.yaml | 16 +++++++++++++---
1 file changed, 13 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
index bf81d306cc80..7897af0ec297 100644
--- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
@@ -41,20 +41,24 @@ properties:
- const: config

clocks:
+ minItems: 5
items:
- description: AHB clock for PCIe master
- description: AHB clock for PCIe slave
- description: AHB clock for PCIe dbi
- description: APB clock for PCIe
- description: Auxiliary clock for PCIe
+ - description: PIPE clock

clock-names:
+ minItems: 5
items:
- const: aclk_mst
- const: aclk_slv
- const: aclk_dbi
- const: pclk
- const: aux
+ - const: pipe

interrupts:
maxItems: 5
@@ -97,13 +101,19 @@ properties:
maxItems: 1

ranges:
- maxItems: 2
+ minItems: 2
+ maxItems: 3

resets:
- maxItems: 1
+ minItems: 1
+ maxItems: 2

reset-names:
- const: pipe
+ oneOf:
+ - const: pipe
+ - items:
+ - const: pwr
+ - const: pipe

vpcie3v3-supply: true

--
2.39.2

2023-06-20 17:50:24

by Rob Herring (Arm)

Subject: Re: [PATCH v1 3/4] dt-bindings: PCI: dwc: rockchip: Update for RK3588

On Fri, 16 Jun 2023 19:00:21 +0200, Sebastian Reichel wrote:
> The PCIe 2.0 controllers on RK3588 need one additional clock,
> one additional reset line and one for ranges entry.
>
> Signed-off-by: Sebastian Reichel <[email protected]>
> ---
> .../bindings/pci/rockchip-dw-pcie.yaml | 16 +++++++++++++---
> 1 file changed, 13 insertions(+), 3 deletions(-)
>

Reviewed-by: Rob Herring <[email protected]>

2023-06-27 13:39:34

by Serge Semin

Subject: Re: [PATCH v1 3/4] dt-bindings: PCI: dwc: rockchip: Update for RK3588

On Fri, Jun 16, 2023 at 07:00:21PM +0200, Sebastian Reichel wrote:
> The PCIe 2.0 controllers on RK3588 need one additional clock,
> one additional reset line and one for ranges entry.

Just a nitpick: it would be perfect to have these new items evaluated
compatible-string conditionally. Anyway:

Reviewed-by: Serge Semin <[email protected]>

-Serge(y)

>
> Signed-off-by: Sebastian Reichel <[email protected]>
> ---
> .../bindings/pci/rockchip-dw-pcie.yaml | 16 +++++++++++++---
> 1 file changed, 13 insertions(+), 3 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
> index bf81d306cc80..7897af0ec297 100644
> --- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
> @@ -41,20 +41,24 @@ properties:
> - const: config
>
> clocks:
> + minItems: 5
> items:
> - description: AHB clock for PCIe master
> - description: AHB clock for PCIe slave
> - description: AHB clock for PCIe dbi
> - description: APB clock for PCIe
> - description: Auxiliary clock for PCIe
> + - description: PIPE clock
>
> clock-names:
> + minItems: 5
> items:
> - const: aclk_mst
> - const: aclk_slv
> - const: aclk_dbi
> - const: pclk
> - const: aux
> + - const: pipe
>
> interrupts:
> maxItems: 5
> @@ -97,13 +101,19 @@ properties:
> maxItems: 1
>
> ranges:
> - maxItems: 2
> + minItems: 2
> + maxItems: 3
>
> resets:
> - maxItems: 1
> + minItems: 1
> + maxItems: 2
>
> reset-names:
> - const: pipe
> + oneOf:
> + - const: pipe
> + - items:
> + - const: pwr
> + - const: pipe
>
> vpcie3v3-supply: true
>
> --
> 2.39.2
>