2013-09-11 15:22:27

by Stephane Eranian

[permalink] [raw]
Subject: [PATCH] perf,x86: add constraint for IVB CYCLE_ACTIVITY:CYCLES_LDM_PENDING


The IvyBridge event CYCLE_ACTIVITY:CYCLES_LDM_PENDING can only
be measured on counters 0-3 when HT is off. When HT is on, you
only have counters 0-3.

If you program it on the eight counters for 1s on a 3GHz
IVB laptop running a noploop, you see:

2 747 527 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
2 747 527 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
2 747 527 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
2 747 527 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
3 280 563 608 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
3 280 563 608 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
3 280 563 608 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
3 280 563 608 CYCLE_ACTIVITY:CYCLES_LDM_PENDING

Clearly the last 4 values are bogus.

Signed-off-by: Stephane Eranian <[email protected]>
---
arch/x86/kernel/cpu/perf_event_intel.c | 1 +
1 file changed, 1 insertion(+)

diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index 0abf674..c62d883 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -124,6 +124,7 @@ static struct event_constraint intel_ivb_event_constraints[] __read_mostly =
INTEL_UEVENT_CONSTRAINT(0x0148, 0x4), /* L1D_PEND_MISS.PENDING */
INTEL_UEVENT_CONSTRAINT(0x0279, 0xf), /* IDQ.EMTPY */
INTEL_UEVENT_CONSTRAINT(0x019c, 0xf), /* IDQ_UOPS_NOT_DELIVERED.CORE */
+ INTEL_UEVENT_CONSTRAINT(0x02a3, 0xf), /* CYCLE_ACTIVITY.CYCLES_LDM_PENDING */
INTEL_UEVENT_CONSTRAINT(0x04a3, 0xf), /* CYCLE_ACTIVITY.CYCLES_NO_EXECUTE */
INTEL_UEVENT_CONSTRAINT(0x05a3, 0xf), /* CYCLE_ACTIVITY.STALLS_L2_PENDING */
INTEL_UEVENT_CONSTRAINT(0x06a3, 0xf), /* CYCLE_ACTIVITY.STALLS_LDM_PENDING */
--
1.8.4


2013-09-11 16:50:32

by Andi Kleen

[permalink] [raw]
Subject: Re: [PATCH] perf,x86: add constraint for IVB CYCLE_ACTIVITY:CYCLES_LDM_PENDING

On Wed, Sep 11, 2013 at 08:22:22AM -0700, Stephane Eranian wrote:
>
> The IvyBridge event CYCLE_ACTIVITY:CYCLES_LDM_PENDING can only
> be measured on counters 0-3 when HT is off. When HT is on, you
> only have counters 0-3.
>
> If you program it on the eight counters for 1s on a 3GHz
> IVB laptop running a noploop, you see:
>
> 2 747 527 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
> 2 747 527 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
> 2 747 527 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
> 2 747 527 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
> 3 280 563 608 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
> 3 280 563 608 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
> 3 280 563 608 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
> 3 280 563 608 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
>
> Clearly the last 4 values are bogus.

Thanks looks good.

Likely need it on Haswell too?

-Andi

2013-09-11 16:55:31

by Stephane Eranian

[permalink] [raw]
Subject: Re: [PATCH] perf,x86: add constraint for IVB CYCLE_ACTIVITY:CYCLES_LDM_PENDING

On Wed, Sep 11, 2013 at 6:50 PM, Andi Kleen <[email protected]> wrote:
> On Wed, Sep 11, 2013 at 08:22:22AM -0700, Stephane Eranian wrote:
>>
>> The IvyBridge event CYCLE_ACTIVITY:CYCLES_LDM_PENDING can only
>> be measured on counters 0-3 when HT is off. When HT is on, you
>> only have counters 0-3.
>>
>> If you program it on the eight counters for 1s on a 3GHz
>> IVB laptop running a noploop, you see:
>>
>> 2 747 527 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
>> 2 747 527 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
>> 2 747 527 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
>> 2 747 527 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
>> 3 280 563 608 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
>> 3 280 563 608 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
>> 3 280 563 608 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
>> 3 280 563 608 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
>>
>> Clearly the last 4 values are bogus.
>
> Thanks looks good.
>
> Likely need it on Haswell too?
>
Will check on that one later this week.
But I think you are right.

> -Andi

Subject: [tip:perf/urgent] perf/x86: Add constraint for IVB CYCLE_ACTIVITY :CYCLES_LDM_PENDING

Commit-ID: 6113af14c82726d5a2993a7ba238df24c990a5ee
Gitweb: http://git.kernel.org/tip/6113af14c82726d5a2993a7ba238df24c990a5ee
Author: Stephane Eranian <[email protected]>
AuthorDate: Wed, 11 Sep 2013 08:22:22 -0700
Committer: Ingo Molnar <[email protected]>
CommitDate: Thu, 12 Sep 2013 07:58:26 +0200

perf/x86: Add constraint for IVB CYCLE_ACTIVITY:CYCLES_LDM_PENDING

The IvyBridge event CYCLE_ACTIVITY:CYCLES_LDM_PENDING can only
be measured on counters 0-3 when HT is off. When HT is on, you
only have counters 0-3.

If you program it on the eight counters for 1s on a 3GHz
IVB laptop running a noploop, you see:

2 747 527 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
2 747 527 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
2 747 527 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
2 747 527 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
3 280 563 608 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
3 280 563 608 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
3 280 563 608 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
3 280 563 608 CYCLE_ACTIVITY:CYCLES_LDM_PENDING

Clearly the last 4 values are bogus.

Signed-off-by: Stephane Eranian <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Link: http://lkml.kernel.org/r/[email protected]
Signed-off-by: Ingo Molnar <[email protected]>
---
arch/x86/kernel/cpu/perf_event_intel.c | 1 +
1 file changed, 1 insertion(+)

diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index 0abf674..c62d883 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -124,6 +124,7 @@ static struct event_constraint intel_ivb_event_constraints[] __read_mostly =
INTEL_UEVENT_CONSTRAINT(0x0148, 0x4), /* L1D_PEND_MISS.PENDING */
INTEL_UEVENT_CONSTRAINT(0x0279, 0xf), /* IDQ.EMTPY */
INTEL_UEVENT_CONSTRAINT(0x019c, 0xf), /* IDQ_UOPS_NOT_DELIVERED.CORE */
+ INTEL_UEVENT_CONSTRAINT(0x02a3, 0xf), /* CYCLE_ACTIVITY.CYCLES_LDM_PENDING */
INTEL_UEVENT_CONSTRAINT(0x04a3, 0xf), /* CYCLE_ACTIVITY.CYCLES_NO_EXECUTE */
INTEL_UEVENT_CONSTRAINT(0x05a3, 0xf), /* CYCLE_ACTIVITY.STALLS_L2_PENDING */
INTEL_UEVENT_CONSTRAINT(0x06a3, 0xf), /* CYCLE_ACTIVITY.STALLS_LDM_PENDING */