From: Frank Wunderlich <[email protected]>
This Series adds some Nodes to mt7986 devicetree and the BananaPi R3
This version is rebased on linux next from 2022/11/27.
i included sams series for mt7986 DTS with small changes
https://patchwork.kernel.org/project/linux-mediatek/cover/20220427124741.18245->
i had run full dtbs-check but i end up with some strange warnings in
ethernet-node that should not come up as phy-handle and sfp/managed
properties are already defined. These errors also came up for mt7986a-rfb.
phy-handle made optional
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/net/mediatek,net.yaml#n265
property sfp/managed (which is included for mac subnode in yaml above):
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/net/ethernet-controller.yaml#n137
changes:
v7:
- rebase on next so dropped already applied patches
- squashed overlay-patch into the bpi-r3 base support
- moved regulators from mmc-dts to common dtsi
- changed dtsi to dts (as board base dtb) and mmc-dts to overlays
- renamed overlays to dtso
- removed angelos RB because of changes in bpi-r3 patch
v6:
- dropped regulators from usb-patch as suggested by chunfeng yun
- moved 3v3 regulator to mmc-patch as it is needed for emmc to work
rfbs were tested by sam shih, r3 by me
- dropped RB from AngeloGioacchino from mmc-patch due to this change
- fixed links in coverletter which were broken in v5
- i hope this series is sent without errors now (my mailprovider limited
mails last 2 times while sending part 10)
v5:
- changed usb ranges/reg/unit-adress
- added reviewd-by's except usb-part due to changes
v4:
- dropped RFC prefix
- rebase on matthias' mtk dts-next (for 6.2) branch
- added author information to overlays
- fixed sfp binding error
- added fix for moving wed_pcie node
- readded missing compatible patches
v3:
- changed mmc pull-ups
- added patch for board binding (sent separately before)
- added pcie node in mt7986 (not yet again in r3)
- added dt overlays
Frank Wunderlich (5):
dt-bindings: phy: mediatek,tphy: add support for mt7986
dt-bindings: usb: mtk-xhci: add support for mt7986
dt-bindings: PCI: mediatek-gen3: add SoC based clock config
dt-bindings: PCI: mediatek-gen3: add support for mt7986
arm64: dts: mt7986: add Bananapi R3
Sam Shih (3):
arm64: dts: mt7986: add usb related device nodes
arm64: dts: mt7986: add mmc related device nodes
arm64: dts: mt7986: add pcie related device nodes
.../bindings/pci/mediatek-pcie-gen3.yaml | 64 ++-
.../bindings/phy/mediatek,tphy.yaml | 1 +
.../bindings/usb/mediatek,mtk-xhci.yaml | 1 +
arch/arm64/boot/dts/mediatek/Makefile | 5 +
.../mt7986a-bananapi-bpi-r3-emmc.dtso | 30 ++
.../mt7986a-bananapi-bpi-r3-nand.dtso | 55 +++
.../mediatek/mt7986a-bananapi-bpi-r3-nor.dtso | 68 +++
.../mediatek/mt7986a-bananapi-bpi-r3-sd.dtso | 24 +
.../dts/mediatek/mt7986a-bananapi-bpi-r3.dts | 448 ++++++++++++++++++
arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 120 +++++
arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 122 +++++
arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts | 8 +
12 files changed, 934 insertions(+), 12 deletions(-)
create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-emmc.dtso
create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nand.dtso
create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nor.dtso
create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-sd.dtso
create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts
--
2.34.1
From: Frank Wunderlich <[email protected]>
Add support for Bananapi R3 SBC.
- SD/eMMC support (switching first 4 bits of data-bus with sw6/D)
- SPI-NAND/NOR support (switched CS by sw5/C)
- all rj45 ports and both SFP working (eth1/lan4)
- all USB-Ports + SIM-Slot tested
- i2c and all uarts tested
- wifi tested (with eeprom calibration data)
The device can boot from all 4 storage options. Both, SPI and MMC, can
be switched using hardware switches on the board, see
https://wiki.banana-pi.org/Banana_Pi_BPI-R3#Jumper_setting
Signed-off-by: Frank Wunderlich <[email protected]>
---
changes:
v7:
- squashed overlay-patch and converted sd/emmc dts to overlay too
- moved mmc-regulators to base dts
- changed common dtsi to (base dts) and overlay extension to dtso
v6:
- drop usb 5v regulator from bpi-r3
based on chunfengs response it is only needed if regulator is
switched (like for otg), usb works without it.
v4:
- add PCIe nodes
- fix sfp-properties of sfp-1 (need to be plural)
thx to Denis Odintsov for this
v3:
- rename factory-key to reset-key
- add dcin regulator and add it as input for 3v3 (with renaming)
- remove memory-node
- dropped wifi eeprom (calibration) data
- move mmc0 pinctrl to common dtsi and drop sdcard comment
- change mmc pull-up/down to have generic bias-pull*
v2:
- remove pcie to be added later (discussion about clocks)
- some fixes based on suggestions on ML
- add key suffix like it's done in mt7622-bpi-r64 devicetree
- add dash in sfp node names
- use reg as unit for switch-node
- drop "-3-4" suffix from i2c-pins node name
- fix order in Makefile
---
arch/arm64/boot/dts/mediatek/Makefile | 5 +
.../mt7986a-bananapi-bpi-r3-emmc.dtso | 30 ++
.../mt7986a-bananapi-bpi-r3-nand.dtso | 55 +++
.../mediatek/mt7986a-bananapi-bpi-r3-nor.dtso | 68 +++
.../mediatek/mt7986a-bananapi-bpi-r3-sd.dtso | 24 +
.../dts/mediatek/mt7986a-bananapi-bpi-r3.dts | 448 ++++++++++++++++++
6 files changed, 630 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-emmc.dtso
create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nand.dtso
create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nor.dtso
create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-sd.dtso
create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts
diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile
index 813e735c5b96..d5cd7b3e09cf 100644
--- a/arch/arm64/boot/dts/mediatek/Makefile
+++ b/arch/arm64/boot/dts/mediatek/Makefile
@@ -8,6 +8,11 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-x20-dev.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-rfb1.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-bananapi-bpi-r64.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3-emmc.dtbo
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3-nand.dtbo
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3-nor.dtbo
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3-sd.dtbo
dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-rfb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986b-rfb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8167-pumpkin.dtb
diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-emmc.dtso b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-emmc.dtso
new file mode 100644
index 000000000000..c15f2f5760ed
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-emmc.dtso
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2021 MediaTek Inc.
+ * Author: Sam.Shih <[email protected]>
+ */
+
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "bananapi,bpi-r3", "mediatek,mt7986a";
+ model = "Bananapi BPI-R3 (emmc)";
+
+ fragment@0 {
+ target-path = "/soc/mmc@11230000";
+ __overlay__ {
+ bus-width = <8>;
+ max-frequency = <200000000>;
+ cap-mmc-highspeed;
+ mmc-hs200-1_8v;
+ mmc-hs400-1_8v;
+ hs400-ds-delay = <0x14014>;
+ non-removable;
+ no-sd;
+ no-sdio;
+ status = "okay";
+ };
+ };
+};
+
diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nand.dtso b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nand.dtso
new file mode 100644
index 000000000000..15ee8c568f3c
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nand.dtso
@@ -0,0 +1,55 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
+/*
+ * Authors: Daniel Golle <[email protected]>
+ * Frank Wunderlich <[email protected]>
+ */
+
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "bananapi,bpi-r3", "mediatek,mt7986a";
+
+ fragment@0 {
+ target-path = "/soc/spi@1100a000";
+ __overlay__ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spi_nand: spi_nand@0 {
+ compatible = "spi-nand";
+ reg = <0>;
+ spi-max-frequency = <10000000>;
+ spi-tx-buswidth = <4>;
+ spi-rx-buswidth = <4>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "bl2";
+ reg = <0x0 0x80000>;
+ read-only;
+ };
+
+ partition@80000 {
+ label = "reserved";
+ reg = <0x80000 0x300000>;
+ };
+
+ partition@380000 {
+ label = "fip";
+ reg = <0x380000 0x200000>;
+ read-only;
+ };
+
+ partition@580000 {
+ label = "ubi";
+ reg = <0x580000 0x7a80000>;
+ };
+ };
+ };
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nor.dtso b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nor.dtso
new file mode 100644
index 000000000000..84aa229e80f3
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nor.dtso
@@ -0,0 +1,68 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
+/*
+ * Authors: Daniel Golle <[email protected]>
+ * Frank Wunderlich <[email protected]>
+ */
+
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "bananapi,bpi-r3", "mediatek,mt7986a";
+
+ fragment@0 {
+ target-path = "/soc/spi@1100a000";
+ __overlay__ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <10000000>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "bl2";
+ reg = <0x0 0x20000>;
+ read-only;
+ };
+
+ partition@20000 {
+ label = "reserved";
+ reg = <0x20000 0x20000>;
+ };
+
+ partition@40000 {
+ label = "u-boot-env";
+ reg = <0x40000 0x40000>;
+ };
+
+ partition@80000 {
+ label = "reserved2";
+ reg = <0x80000 0x80000>;
+ };
+
+ partition@100000 {
+ label = "fip";
+ reg = <0x100000 0x80000>;
+ read-only;
+ };
+
+ partition@180000 {
+ label = "recovery";
+ reg = <0x180000 0xa80000>;
+ };
+
+ partition@c00000 {
+ label = "fit";
+ reg = <0xc00000 0x1400000>;
+ };
+ };
+ };
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-sd.dtso b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-sd.dtso
new file mode 100644
index 000000000000..08af778d8adc
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-sd.dtso
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2021 MediaTek Inc.
+ * Author: Sam.Shih <[email protected]>
+ */
+
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "bananapi,bpi-r3", "mediatek,mt7986a";
+ model = "Bananapi BPI-R3 (sdmmc)";
+
+ fragment@0 {
+ target-path = "/soc/mmc@11230000";
+ __overlay__ {
+ bus-width = <4>;
+ max-frequency = <52000000>;
+ cap-sd-highspeed;
+ status = "okay";
+ };
+ };
+};
+
diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts
new file mode 100644
index 000000000000..618d3bb2f32f
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts
@@ -0,0 +1,448 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2021 MediaTek Inc.
+ * Authors: Sam.Shih <[email protected]>
+ * Frank Wunderlich <[email protected]>
+ * Daniel Golle <[email protected]>
+ */
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/pinctrl/mt65xx.h>
+
+#include "mt7986a.dtsi"
+
+/ {
+ model = "Bananapi BPI-R3";
+ compatible = "bananapi,bpi-r3", "mediatek,mt7986a";
+
+ aliases {
+ serial0 = &uart0;
+ ethernet0 = &gmac0;
+ ethernet1 = &gmac1;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ dcin: regulator-12vd {
+ compatible = "regulator-fixed";
+ regulator-name = "12vd";
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ reset-key {
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&pio 9 GPIO_ACTIVE_LOW>;
+ };
+
+ wps-key {
+ label = "wps";
+ linux,code = <KEY_WPS_BUTTON>;
+ gpios = <&pio 10 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ /* i2c of the left SFP cage (wan) */
+ i2c_sfp1: i2c-gpio-0 {
+ compatible = "i2c-gpio";
+ sda-gpios = <&pio 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ scl-gpios = <&pio 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ i2c-gpio,delay-us = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ /* i2c of the right SFP cage (lan) */
+ i2c_sfp2: i2c-gpio-1 {
+ compatible = "i2c-gpio";
+ sda-gpios = <&pio 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ scl-gpios = <&pio 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ i2c-gpio,delay-us = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ green_led: led-0 {
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_POWER;
+ gpios = <&pio 69 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ };
+
+ blue_led: led-1 {
+ color = <LED_COLOR_ID_BLUE>;
+ function = LED_FUNCTION_STATUS;
+ gpios = <&pio 86 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+ };
+
+ reg_1p8v: regulator-1p8v {
+ compatible = "regulator-fixed";
+ regulator-name = "1.8vd";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ vin-supply = <&dcin>;
+ };
+
+ reg_3p3v: regulator-3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "3.3vd";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ vin-supply = <&dcin>;
+ };
+
+ /* left SFP cage (wan) */
+ sfp1: sfp-1 {
+ compatible = "sff,sfp";
+ i2c-bus = <&i2c_sfp1>;
+ los-gpios = <&pio 46 GPIO_ACTIVE_HIGH>;
+ mod-def0-gpios = <&pio 49 GPIO_ACTIVE_LOW>;
+ tx-disable-gpios = <&pio 20 GPIO_ACTIVE_HIGH>;
+ tx-fault-gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
+ };
+
+ /* right SFP cage (lan) */
+ sfp2: sfp-2 {
+ compatible = "sff,sfp";
+ i2c-bus = <&i2c_sfp2>;
+ los-gpios = <&pio 31 GPIO_ACTIVE_HIGH>;
+ mod-def0-gpios = <&pio 47 GPIO_ACTIVE_LOW>;
+ tx-disable-gpios = <&pio 15 GPIO_ACTIVE_HIGH>;
+ tx-fault-gpios = <&pio 48 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+&crypto {
+ status = "okay";
+};
+
+ð {
+ status = "okay";
+
+ gmac0: mac@0 {
+ compatible = "mediatek,eth-mac";
+ reg = <0>;
+ phy-mode = "2500base-x";
+
+ fixed-link {
+ speed = <2500>;
+ full-duplex;
+ pause;
+ };
+ };
+
+ gmac1: mac@1 {
+ compatible = "mediatek,eth-mac";
+ reg = <1>;
+ phy-mode = "2500base-x";
+ sfp = <&sfp1>;
+ managed = "in-band-status";
+ };
+
+ mdio: mdio-bus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+};
+
+&mdio {
+ switch: switch@31 {
+ compatible = "mediatek,mt7531";
+ reg = <31>;
+ reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+&mmc0 {
+ pinctrl-names = "default", "state_uhs";
+ pinctrl-0 = <&mmc0_pins_default>;
+ pinctrl-1 = <&mmc0_pins_uhs>;
+ vmmc-supply = <®_3p3v>;
+ vqmmc-supply = <®_1p8v>;
+};
+
+&i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c_pins>;
+ status = "okay";
+};
+
+&pcie {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_pins>;
+ status = "okay";
+};
+
+&pcie_phy {
+ status = "okay";
+};
+
+&pio {
+ i2c_pins: i2c-pins {
+ mux {
+ function = "i2c";
+ groups = "i2c";
+ };
+ };
+
+ mmc0_pins_default: mmc0-pins {
+ mux {
+ function = "emmc";
+ groups = "emmc_51";
+ };
+ conf-cmd-dat {
+ pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
+ "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
+ "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
+ input-enable;
+ drive-strength = <4>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
+ };
+ conf-clk {
+ pins = "EMMC_CK";
+ drive-strength = <6>;
+ bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
+ };
+ conf-ds {
+ pins = "EMMC_DSL";
+ bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
+ };
+ conf-rst {
+ pins = "EMMC_RSTB";
+ drive-strength = <4>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
+ };
+ };
+
+ mmc0_pins_uhs: mmc0-uhs-pins {
+ mux {
+ function = "emmc";
+ groups = "emmc_51";
+ };
+ conf-cmd-dat {
+ pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
+ "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
+ "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
+ input-enable;
+ drive-strength = <4>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
+ };
+ conf-clk {
+ pins = "EMMC_CK";
+ drive-strength = <6>;
+ bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
+ };
+ conf-ds {
+ pins = "EMMC_DSL";
+ bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
+ };
+ conf-rst {
+ pins = "EMMC_RSTB";
+ drive-strength = <4>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
+ };
+ };
+
+ pcie_pins: pcie-pins {
+ mux {
+ function = "pcie";
+ groups = "pcie_clk", "pcie_pereset";
+ };
+ };
+
+ spi_flash_pins: spi-flash-pins {
+ mux {
+ function = "spi";
+ groups = "spi0", "spi0_wp_hold";
+ };
+ };
+
+ spic_pins: spic-pins {
+ mux {
+ function = "spi";
+ groups = "spi1_0";
+ };
+ };
+
+ uart1_pins: uart1-pins {
+ mux {
+ function = "uart";
+ groups = "uart1_rx_tx";
+ };
+ };
+
+ uart2_pins: uart2-pins {
+ mux {
+ function = "uart";
+ groups = "uart2_0_rx_tx";
+ };
+ };
+
+ wf_2g_5g_pins: wf-2g-5g-pins {
+ mux {
+ function = "wifi";
+ groups = "wf_2g", "wf_5g";
+ };
+ conf {
+ pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
+ "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
+ "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
+ "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
+ "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
+ "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
+ "WF1_TOP_CLK", "WF1_TOP_DATA";
+ drive-strength = <4>;
+ };
+ };
+
+ wf_dbdc_pins: wf-dbdc-pins {
+ mux {
+ function = "wifi";
+ groups = "wf_dbdc";
+ };
+ conf {
+ pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
+ "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
+ "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
+ "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
+ "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
+ "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
+ "WF1_TOP_CLK", "WF1_TOP_DATA";
+ drive-strength = <4>;
+ };
+ };
+
+ wf_led_pins: wf-led-pins {
+ mux {
+ function = "led";
+ groups = "wifi_led";
+ };
+ };
+};
+
+&spi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi_flash_pins>;
+ cs-gpios = <0>, <0>;
+ status = "okay";
+};
+
+&spi1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spic_pins>;
+ cs-gpios = <0>, <0>;
+ status = "okay";
+};
+
+&ssusb {
+ status = "okay";
+};
+
+&switch {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ label = "wan";
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan0";
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan1";
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan2";
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "lan3";
+ };
+
+ port5: port@5 {
+ reg = <5>;
+ label = "lan4";
+ phy-mode = "2500base-x";
+ sfp = <&sfp2>;
+ managed = "in-band-status";
+ };
+
+ port@6 {
+ reg = <6>;
+ label = "cpu";
+ ethernet = <&gmac0>;
+ phy-mode = "2500base-x";
+
+ fixed-link {
+ speed = <2500>;
+ full-duplex;
+ pause;
+ };
+ };
+ };
+};
+
+&trng {
+ status = "okay";
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>;
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>;
+ status = "okay";
+};
+
+&usb_phy {
+ status = "okay";
+};
+
+&watchdog {
+ status = "okay";
+};
+
+&wifi {
+ status = "okay";
+ pinctrl-names = "default", "dbdc";
+ pinctrl-0 = <&wf_2g_5g_pins>, <&wf_led_pins>;
+ pinctrl-1 = <&wf_dbdc_pins>, <&wf_led_pins>;
+};
+
--
2.34.1
From: Sam Shih <[email protected]>
This patch adds mmc support for MT7986.
Signed-off-by: Sam Shih <[email protected]>
Signed-off-by: Frank Wunderlich <[email protected]>
---
v2:
- update mmc-node because clocks changed
v3:
- fix pullups/pulldowns for mt7986a-rfb to have generic bias-pull-*
v6:
- add 3v3 regulator in mt7986a-rfb (was in usb patch before)
- dropped AngeloGioacchino RB because of this change
---
arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 96 ++++++++++++++++++++
arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 15 +++
2 files changed, 111 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
index 58089fcf4d16..c7a2ac764a30 100644
--- a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
@@ -5,6 +5,8 @@
*/
/dts-v1/;
+#include <dt-bindings/pinctrl/mt65xx.h>
+
#include "mt7986a.dtsi"
/ {
@@ -23,6 +25,24 @@ memory@40000000 {
device_type = "memory";
reg = <0 0x40000000 0 0x40000000>;
};
+
+ reg_1p8v: regulator-1p8v {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_3p3v: regulator-3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
};
&crypto {
@@ -58,7 +78,83 @@ switch: switch@0 {
};
};
+&mmc0 {
+ pinctrl-names = "default", "state_uhs";
+ pinctrl-0 = <&mmc0_pins_default>;
+ pinctrl-1 = <&mmc0_pins_uhs>;
+ bus-width = <8>;
+ max-frequency = <200000000>;
+ cap-mmc-highspeed;
+ mmc-hs200-1_8v;
+ mmc-hs400-1_8v;
+ hs400-ds-delay = <0x14014>;
+ vmmc-supply = <®_3p3v>;
+ vqmmc-supply = <®_1p8v>;
+ non-removable;
+ no-sd;
+ no-sdio;
+ status = "okay";
+};
+
&pio {
+ mmc0_pins_default: mmc0-pins {
+ mux {
+ function = "emmc";
+ groups = "emmc_51";
+ };
+ conf-cmd-dat {
+ pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
+ "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
+ "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
+ input-enable;
+ drive-strength = <4>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
+ };
+ conf-clk {
+ pins = "EMMC_CK";
+ drive-strength = <6>;
+ bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
+ };
+ conf-ds {
+ pins = "EMMC_DSL";
+ bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
+ };
+ conf-rst {
+ pins = "EMMC_RSTB";
+ drive-strength = <4>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
+ };
+ };
+
+ mmc0_pins_uhs: mmc0-uhs-pins {
+ mux {
+ function = "emmc";
+ groups = "emmc_51";
+ };
+ conf-cmd-dat {
+ pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
+ "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
+ "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
+ input-enable;
+ drive-strength = <4>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
+ };
+ conf-clk {
+ pins = "EMMC_CK";
+ drive-strength = <6>;
+ bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
+ };
+ conf-ds {
+ pins = "EMMC_DSL";
+ bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
+ };
+ conf-rst {
+ pins = "EMMC_RSTB";
+ drive-strength = <4>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
+ };
+ };
+
spi_flash_pins: spi-flash-pins {
mux {
function = "spi";
diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
index 9ff2968152ae..9c552442c02d 100644
--- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
@@ -346,6 +346,21 @@ ssusb: usb@11200000 {
status = "disabled";
};
+ mmc0: mmc@11230000 {
+ compatible = "mediatek,mt7986-mmc";
+ reg = <0 0x11230000 0 0x1000>,
+ <0 0x11c20000 0 0x1000>;
+ interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&topckgen CLK_TOP_EMMC_416M_SEL>,
+ <&infracfg CLK_INFRA_MSDC_HCK_CK>,
+ <&infracfg CLK_INFRA_MSDC_CK>,
+ <&infracfg CLK_INFRA_MSDC_133M_CK>,
+ <&infracfg CLK_INFRA_MSDC_66M_CK>;
+ clock-names = "source", "hclk", "source_cg", "bus_clk",
+ "sys_cg";
+ status = "disabled";
+ };
+
usb_phy: t-phy@11e10000 {
compatible = "mediatek,mt7986-tphy",
"mediatek,generic-tphy-v2";
--
2.34.1
From: Sam Shih <[email protected]>
This patch adds PCIe support for MT7986.
Signed-off-by: Jieyy Yang <[email protected]>
Signed-off-by: Sam Shih <[email protected]>
Signed-off-by: Frank Wunderlich <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
---
changes compared to sams original version:
- add clock-names to pcie node
- update clocks to new binding
---
bindings-patches:
https://patchwork.kernel.org/project/linux-mediatek/list/?series=690172
---
arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 16 ++++++
arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 52 ++++++++++++++++++++
2 files changed, 68 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
index c7a2ac764a30..4f18b4a9a8c8 100644
--- a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
@@ -93,6 +93,15 @@ &mmc0 {
non-removable;
no-sd;
no-sdio;
+};
+
+&pcie {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_pins>;
+ status = "okay";
+};
+
+&pcie_phy {
status = "okay";
};
@@ -155,6 +164,13 @@ conf-rst {
};
};
+ pcie_pins: pcie-pins {
+ mux {
+ function = "pcie";
+ groups = "pcie_clk", "pcie_wake", "pcie_pereset";
+ };
+ };
+
spi_flash_pins: spi-flash-pins {
mux {
function = "spi";
diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
index 9c552442c02d..f6e980771b69 100644
--- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
@@ -8,6 +8,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/mt7986-clk.h>
#include <dt-bindings/reset/mt7986-resets.h>
+#include <dt-bindings/phy/phy.h>
/ {
compatible = "mediatek,mt7986a";
@@ -361,6 +362,57 @@ mmc0: mmc@11230000 {
status = "disabled";
};
+ pcie: pcie@11280000 {
+ compatible = "mediatek,mt7986-pcie",
+ "mediatek,mt8192-pcie";
+ device_type = "pci";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ reg = <0x00 0x11280000 0x00 0x4000>;
+ reg-names = "pcie-mac";
+ interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+ bus-range = <0x00 0xff>;
+ ranges = <0x82000000 0x00 0x20000000 0x00
+ 0x20000000 0x00 0x10000000>;
+ clocks = <&infracfg CLK_INFRA_IPCIE_PIPE_CK>,
+ <&infracfg CLK_INFRA_IPCIE_CK>,
+ <&infracfg CLK_INFRA_IPCIER_CK>,
+ <&infracfg CLK_INFRA_IPCIEB_CK>;
+ clock-names = "pl_250m", "tl_26m", "peri_26m", "top_133m";
+ status = "disabled";
+
+ phys = <&pcie_port PHY_TYPE_PCIE>;
+ phy-names = "pcie-phy";
+
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0x7>;
+ interrupt-map = <0 0 0 1 &pcie_intc 0>,
+ <0 0 0 2 &pcie_intc 1>,
+ <0 0 0 3 &pcie_intc 2>,
+ <0 0 0 4 &pcie_intc 3>;
+ pcie_intc: interrupt-controller {
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ };
+ };
+
+ pcie_phy: t-phy@11c00000 {
+ compatible = "mediatek,mt7986-tphy",
+ "mediatek,generic-tphy-v2";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ status = "disabled";
+
+ pcie_port: pcie-phy@11c00000 {
+ reg = <0 0x11c00000 0 0x20000>;
+ clocks = <&clk40m>;
+ clock-names = "ref";
+ #phy-cells = <1>;
+ };
+ };
+
usb_phy: t-phy@11e10000 {
compatible = "mediatek,mt7986-tphy",
"mediatek,generic-tphy-v2";
--
2.34.1
From: Frank Wunderlich <[email protected]>
Add compatible string for mt7986.
Signed-off-by: Frank Wunderlich <[email protected]>
Acked-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Chunfeng Yun <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Reviewed-by: Matthias Brugger <[email protected]>
---
Documentation/devicetree/bindings/phy/mediatek,tphy.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml
index 5613cc5106e3..230a17f24966 100644
--- a/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml
+++ b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml
@@ -79,6 +79,7 @@ properties:
- enum:
- mediatek,mt2712-tphy
- mediatek,mt7629-tphy
+ - mediatek,mt7986-tphy
- mediatek,mt8183-tphy
- mediatek,mt8186-tphy
- mediatek,mt8192-tphy
--
2.34.1
From: Frank Wunderlich <[email protected]>
The PCIe driver covers different SOC which needing different clock
configs. Define them based on compatible.
Signed-off-by: Frank Wunderlich <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Acked-by: Jianjun Wang <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Reviewed-by: Matthias Brugger <[email protected]>
---
v2:
- fix typo in mediatek,mt8192-pcie
v3:
- remove contains to match only if compatible is no fallback
tested with series "Add driver nodes for MT8195 SoC" and mt7986
pcie-nodes, dtbs_check is now clean
---
.../bindings/pci/mediatek-pcie-gen3.yaml | 47 ++++++++++++++-----
1 file changed, 35 insertions(+), 12 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
index bc90f0ec7bd9..ef5cc1fc4d10 100644
--- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
+++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
@@ -43,9 +43,6 @@ description: |+
each set has its own address for MSI message, and supports 32 MSI vectors
to generate interrupt.
-allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
-
properties:
compatible:
oneOf:
@@ -90,15 +87,7 @@ properties:
maxItems: 6
clock-names:
- items:
- - const: pl_250m
- - const: tl_26m
- - const: tl_96m
- - const: tl_32k
- - const: peri_26m
- - enum:
- - top_133m # for MT8192
- - peri_mem # for MT8188/MT8195
+ maxItems: 6
assigned-clocks:
maxItems: 1
@@ -147,6 +136,40 @@ required:
- '#interrupt-cells'
- interrupt-controller
+allOf:
+ - $ref: /schemas/pci/pci-bus.yaml#
+ - if:
+ properties:
+ compatible:
+ const: mediatek,mt8192-pcie
+ then:
+ properties:
+ clock-names:
+ items:
+ - const: pl_250m
+ - const: tl_26m
+ - const: tl_96m
+ - const: tl_32k
+ - const: peri_26m
+ - const: top_133m
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - mediatek,mt8188-pcie
+ - mediatek,mt8195-pcie
+ then:
+ properties:
+ clock-names:
+ items:
+ - const: pl_250m
+ - const: tl_26m
+ - const: tl_96m
+ - const: tl_32k
+ - const: peri_26m
+ - const: peri_mem
+
unevaluatedProperties: false
examples:
--
2.34.1
From: Frank Wunderlich <[email protected]>
Add compatible string and clock-definition for mt7986. It needs 4 clocks
for PCIe, define them in binding.
Signed-off-by: Frank Wunderlich <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Acked-by: Jianjun Wang <[email protected]>
Reviewed-by: Matthias Brugger <[email protected]>
---
v2:
- squashed patch 2+3 (compatible and clock definition)
---
.../bindings/pci/mediatek-pcie-gen3.yaml | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
index ef5cc1fc4d10..7e8c7a2a5f9b 100644
--- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
+++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
@@ -48,6 +48,7 @@ properties:
oneOf:
- items:
- enum:
+ - mediatek,mt7986-pcie
- mediatek,mt8188-pcie
- mediatek,mt8195-pcie
- const: mediatek,mt8192-pcie
@@ -84,9 +85,11 @@ properties:
enum: [ phy, mac ]
clocks:
+ minItems: 4
maxItems: 6
clock-names:
+ minItems: 4
maxItems: 6
assigned-clocks:
@@ -169,6 +172,20 @@ allOf:
- const: tl_32k
- const: peri_26m
- const: peri_mem
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - mediatek,mt7986-pcie
+ then:
+ properties:
+ clock-names:
+ items:
+ - const: pl_250m
+ - const: tl_26m
+ - const: peri_26m
+ - const: top_133m
unevaluatedProperties: false
--
2.34.1
From: Sam Shih <[email protected]>
This patch adds USB support for MT7986.
Signed-off-by: Sam Shih <[email protected]>
Signed-off-by: Frank Wunderlich <[email protected]>
Reviewed-by: Chunfeng Yun <[email protected]>
---
changes compared to sams original version:
- reorder xhci-clocks based on yaml binding
v5:
- update ranges/reg of usb-phy
- not added RB from AngeloGioacchino for v4 because of these changes
v6:
- remove unused usb regulators
- remove 3v3 regulator (will be added with emmc-patch)
---
arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 8 +++
arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 55 ++++++++++++++++++++
arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts | 8 +++
3 files changed, 71 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
index 9b83925893b7..58089fcf4d16 100644
--- a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
@@ -140,6 +140,10 @@ &spi1 {
status = "okay";
};
+&ssusb {
+ status = "okay";
+};
+
&switch {
ports {
#address-cells = <1>;
@@ -201,6 +205,10 @@ &uart2 {
status = "okay";
};
+&usb_phy {
+ status = "okay";
+};
+
&wifi {
status = "okay";
pinctrl-names = "default", "dbdc";
diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
index 0e9406fc63e2..9ff2968152ae 100644
--- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
@@ -323,6 +323,61 @@ spi1: spi@1100b000 {
status = "disabled";
};
+ ssusb: usb@11200000 {
+ compatible = "mediatek,mt7986-xhci",
+ "mediatek,mtk-xhci";
+ reg = <0 0x11200000 0 0x2e00>,
+ <0 0x11203e00 0 0x0100>;
+ reg-names = "mac", "ippc";
+ interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&infracfg CLK_INFRA_IUSB_SYS_CK>,
+ <&infracfg CLK_INFRA_IUSB_CK>,
+ <&infracfg CLK_INFRA_IUSB_133_CK>,
+ <&infracfg CLK_INFRA_IUSB_66M_CK>,
+ <&topckgen CLK_TOP_U2U3_XHCI_SEL>;
+ clock-names = "sys_ck",
+ "ref_ck",
+ "mcu_ck",
+ "dma_ck",
+ "xhci_ck";
+ phys = <&u2port0 PHY_TYPE_USB2>,
+ <&u3port0 PHY_TYPE_USB3>,
+ <&u2port1 PHY_TYPE_USB2>;
+ status = "disabled";
+ };
+
+ usb_phy: t-phy@11e10000 {
+ compatible = "mediatek,mt7986-tphy",
+ "mediatek,generic-tphy-v2";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0 0x11e10000 0x1700>;
+ status = "disabled";
+
+ u2port0: usb-phy@0 {
+ reg = <0x0 0x700>;
+ clocks = <&topckgen CLK_TOP_DA_U2_REFSEL>,
+ <&topckgen CLK_TOP_DA_U2_CK_1P_SEL>;
+ clock-names = "ref", "da_ref";
+ #phy-cells = <1>;
+ };
+
+ u3port0: usb-phy@700 {
+ reg = <0x700 0x900>;
+ clocks = <&topckgen CLK_TOP_USB3_PHY_SEL>;
+ clock-names = "ref";
+ #phy-cells = <1>;
+ };
+
+ u2port1: usb-phy@1000 {
+ reg = <0x1000 0x700>;
+ clocks = <&topckgen CLK_TOP_DA_U2_REFSEL>,
+ <&topckgen CLK_TOP_DA_U2_CK_1P_SEL>;
+ clock-names = "ref", "da_ref";
+ #phy-cells = <1>;
+ };
+ };
+
ethsys: syscon@15000000 {
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts
index 243760cd3011..188ce82ae56c 100644
--- a/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts
@@ -167,10 +167,18 @@ &spi1 {
status = "okay";
};
+&ssusb {
+ status = "okay";
+};
+
&uart0 {
status = "okay";
};
+&usb_phy {
+ status = "okay";
+};
+
&wifi {
status = "okay";
pinctrl-names = "default", "dbdc";
--
2.34.1
From: Frank Wunderlich <[email protected]>
Add compatible string for mt7986.
Signed-off-by: Frank Wunderlich <[email protected]>
Acked-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Chunfeng Yun <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Reviewed-by: Matthias Brugger <[email protected]>
---
Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml
index 939623867a64..a3c37944c630 100644
--- a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml
+++ b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml
@@ -28,6 +28,7 @@ properties:
- mediatek,mt7622-xhci
- mediatek,mt7623-xhci
- mediatek,mt7629-xhci
+ - mediatek,mt7986-xhci
- mediatek,mt8173-xhci
- mediatek,mt8183-xhci
- mediatek,mt8186-xhci
--
2.34.1
On Sun, Nov 27, 2022 at 12:41:34PM +0100, Frank Wunderlich wrote:
> From: Frank Wunderlich <[email protected]>
>
> This Series adds some Nodes to mt7986 devicetree and the BananaPi R3
>
> This version is rebased on linux next from 2022/11/27.
>
> i included sams series for mt7986 DTS with small changes
> https://patchwork.kernel.org/project/linux-mediatek/cover/20220427124741.18245->
>
> i had run full dtbs-check but i end up with some strange warnings in
> ethernet-node that should not come up as phy-handle and sfp/managed
> properties are already defined. These errors also came up for mt7986a-rfb.
>
> phy-handle made optional
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/net/mediatek,net.yaml#n265
>
> property sfp/managed (which is included for mac subnode in yaml above):
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/net/ethernet-controller.yaml#n137
>
> changes:
> v7:
> - rebase on next so dropped already applied patches
> - squashed overlay-patch into the bpi-r3 base support
> - moved regulators from mmc-dts to common dtsi
> - changed dtsi to dts (as board base dtb) and mmc-dts to overlays
> - renamed overlays to dtso
> - removed angelos RB because of changes in bpi-r3 patch
>
> v6:
> - dropped regulators from usb-patch as suggested by chunfeng yun
> - moved 3v3 regulator to mmc-patch as it is needed for emmc to work
> rfbs were tested by sam shih, r3 by me
> - dropped RB from AngeloGioacchino from mmc-patch due to this change
> - fixed links in coverletter which were broken in v5
> - i hope this series is sent without errors now (my mailprovider limited
> mails last 2 times while sending part 10)
>
> v5:
> - changed usb ranges/reg/unit-adress
> - added reviewd-by's except usb-part due to changes
>
> v4:
> - dropped RFC prefix
> - rebase on matthias' mtk dts-next (for 6.2) branch
> - added author information to overlays
> - fixed sfp binding error
> - added fix for moving wed_pcie node
> - readded missing compatible patches
>
> v3:
> - changed mmc pull-ups
> - added patch for board binding (sent separately before)
> - added pcie node in mt7986 (not yet again in r3)
> - added dt overlays
>
> Frank Wunderlich (5):
> dt-bindings: phy: mediatek,tphy: add support for mt7986
> dt-bindings: usb: mtk-xhci: add support for mt7986
> dt-bindings: PCI: mediatek-gen3: add SoC based clock config
> dt-bindings: PCI: mediatek-gen3: add support for mt7986
> arm64: dts: mt7986: add Bananapi R3
>
> Sam Shih (3):
> arm64: dts: mt7986: add usb related device nodes
> arm64: dts: mt7986: add mmc related device nodes
> arm64: dts: mt7986: add pcie related device nodes
>
> .../bindings/pci/mediatek-pcie-gen3.yaml | 64 ++-
> .../bindings/phy/mediatek,tphy.yaml | 1 +
> .../bindings/usb/mediatek,mtk-xhci.yaml | 1 +
> arch/arm64/boot/dts/mediatek/Makefile | 5 +
> .../mt7986a-bananapi-bpi-r3-emmc.dtso | 30 ++
> .../mt7986a-bananapi-bpi-r3-nand.dtso | 55 +++
> .../mediatek/mt7986a-bananapi-bpi-r3-nor.dtso | 68 +++
> .../mediatek/mt7986a-bananapi-bpi-r3-sd.dtso | 24 +
> .../dts/mediatek/mt7986a-bananapi-bpi-r3.dts | 448 ++++++++++++++++++
> arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 120 +++++
> arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 122 +++++
> arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts | 8 +
> 12 files changed, 934 insertions(+), 12 deletions(-)
> create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-emmc.dtso
> create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nand.dtso
> create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nor.dtso
> create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-sd.dtso
> create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts
Should I pick up patches [3,4] into the PCI tree ?
Thanks,
Lorenzo
On Sun, 27 Nov 2022 12:41:34 +0100, Frank Wunderlich wrote:
> From: Frank Wunderlich <[email protected]>
>
> This Series adds some Nodes to mt7986 devicetree and the BananaPi R3
>
> This version is rebased on linux next from 2022/11/27.
>
> i included sams series for mt7986 DTS with small changes
> https://patchwork.kernel.org/project/linux-mediatek/cover/20220427124741.18245->
>
> [...]
Applied to pci/dt, thanks!
[3/8] dt-bindings: PCI: mediatek-gen3: add SoC based clock config
https://git.kernel.org/lpieralisi/pci/c/ec9eaf68c1dc
[4/8] dt-bindings: PCI: mediatek-gen3: add support for mt7986
https://git.kernel.org/lpieralisi/pci/c/d3fd0ee7a4a1
Thanks,
Lorenzo
Hi Frank,
please see some comments inline below:
On Sun, Nov 27, 2022 at 12:41:42PM +0100, Frank Wunderlich wrote:
> From: Frank Wunderlich <[email protected]>
>
> Add support for Bananapi R3 SBC.
>
> - SD/eMMC support (switching first 4 bits of data-bus with sw6/D)
> - SPI-NAND/NOR support (switched CS by sw5/C)
> - all rj45 ports and both SFP working (eth1/lan4)
> - all USB-Ports + SIM-Slot tested
> - i2c and all uarts tested
> - wifi tested (with eeprom calibration data)
>
> The device can boot from all 4 storage options. Both, SPI and MMC, can
> be switched using hardware switches on the board, see
> https://wiki.banana-pi.org/Banana_Pi_BPI-R3#Jumper_setting
>
> Signed-off-by: Frank Wunderlich <[email protected]>
> ---
> changes:
> v7:
> - squashed overlay-patch and converted sd/emmc dts to overlay too
> - moved mmc-regulators to base dts
> - changed common dtsi to (base dts) and overlay extension to dtso
>
> v6:
> - drop usb 5v regulator from bpi-r3
> based on chunfengs response it is only needed if regulator is
> switched (like for otg), usb works without it.
>
> v4:
> - add PCIe nodes
> - fix sfp-properties of sfp-1 (need to be plural)
> thx to Denis Odintsov for this
>
> v3:
> - rename factory-key to reset-key
> - add dcin regulator and add it as input for 3v3 (with renaming)
> - remove memory-node
> - dropped wifi eeprom (calibration) data
> - move mmc0 pinctrl to common dtsi and drop sdcard comment
> - change mmc pull-up/down to have generic bias-pull*
>
> v2:
> - remove pcie to be added later (discussion about clocks)
> - some fixes based on suggestions on ML
> - add key suffix like it's done in mt7622-bpi-r64 devicetree
> - add dash in sfp node names
> - use reg as unit for switch-node
> - drop "-3-4" suffix from i2c-pins node name
> - fix order in Makefile
> ---
> arch/arm64/boot/dts/mediatek/Makefile | 5 +
> .../mt7986a-bananapi-bpi-r3-emmc.dtso | 30 ++
> .../mt7986a-bananapi-bpi-r3-nand.dtso | 55 +++
> .../mediatek/mt7986a-bananapi-bpi-r3-nor.dtso | 68 +++
> .../mediatek/mt7986a-bananapi-bpi-r3-sd.dtso | 24 +
> .../dts/mediatek/mt7986a-bananapi-bpi-r3.dts | 448 ++++++++++++++++++
> 6 files changed, 630 insertions(+)
> create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-emmc.dtso
> create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nand.dtso
> create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nor.dtso
> create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-sd.dtso
> create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts
>
> diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile
> index 813e735c5b96..d5cd7b3e09cf 100644
> --- a/arch/arm64/boot/dts/mediatek/Makefile
> +++ b/arch/arm64/boot/dts/mediatek/Makefile
> @@ -8,6 +8,11 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-evb.dtb
> dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-x20-dev.dtb
> dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-rfb1.dtb
> dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-bananapi-bpi-r64.dtb
> +dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3.dtb
> +dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3-emmc.dtbo
> +dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3-nand.dtbo
> +dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3-nor.dtbo
> +dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3-sd.dtbo
> dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-rfb.dtb
> dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986b-rfb.dtb
> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8167-pumpkin.dtb
> diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-emmc.dtso b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-emmc.dtso
> new file mode 100644
> index 000000000000..c15f2f5760ed
> --- /dev/null
> +++ b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-emmc.dtso
> @@ -0,0 +1,30 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> +/*
> + * Copyright (C) 2021 MediaTek Inc.
> + * Author: Sam.Shih <[email protected]>
> + */
> +
> +/dts-v1/;
> +/plugin/;
> +
> +/ {
> + compatible = "bananapi,bpi-r3", "mediatek,mt7986a";
> + model = "Bananapi BPI-R3 (emmc)";
Why do you set the model string here?
> +
> + fragment@0 {
> + target-path = "/soc/mmc@11230000";
> + __overlay__ {
> + bus-width = <8>;
> + max-frequency = <200000000>;
> + cap-mmc-highspeed;
> + mmc-hs200-1_8v;
> + mmc-hs400-1_8v;
> + hs400-ds-delay = <0x14014>;
> + non-removable;
> + no-sd;
> + no-sdio;
> + status = "okay";
> + };
> + };
> +};
> +
> diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nand.dtso b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nand.dtso
> new file mode 100644
> index 000000000000..15ee8c568f3c
> --- /dev/null
> +++ b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nand.dtso
> @@ -0,0 +1,55 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
> +/*
> + * Authors: Daniel Golle <[email protected]>
> + * Frank Wunderlich <[email protected]>
> + */
> +
> +/dts-v1/;
> +/plugin/;
> +
> +/ {
> + compatible = "bananapi,bpi-r3", "mediatek,mt7986a";
> +
> + fragment@0 {
> + target-path = "/soc/spi@1100a000";
> + __overlay__ {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + spi_nand: spi_nand@0 {
> + compatible = "spi-nand";
> + reg = <0>;
> + spi-max-frequency = <10000000>;
> + spi-tx-buswidth = <4>;
> + spi-rx-buswidth = <4>;
> +
> + partitions {
> + compatible = "fixed-partitions";
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + partition@0 {
> + label = "bl2";
> + reg = <0x0 0x80000>;
> + read-only;
> + };
> +
> + partition@80000 {
> + label = "reserved";
> + reg = <0x80000 0x300000>;
> + };
> +
> + partition@380000 {
> + label = "fip";
> + reg = <0x380000 0x200000>;
> + read-only;
> + };
> +
> + partition@580000 {
> + label = "ubi";
> + reg = <0x580000 0x7a80000>;
> + };
> + };
> + };
> + };
> + };
> +};
> diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nor.dtso b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nor.dtso
> new file mode 100644
> index 000000000000..84aa229e80f3
> --- /dev/null
> +++ b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nor.dtso
> @@ -0,0 +1,68 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
> +/*
> + * Authors: Daniel Golle <[email protected]>
> + * Frank Wunderlich <[email protected]>
> + */
> +
> +/dts-v1/;
> +/plugin/;
> +
> +/ {
> + compatible = "bananapi,bpi-r3", "mediatek,mt7986a";
> +
> + fragment@0 {
> + target-path = "/soc/spi@1100a000";
> + __overlay__ {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + flash@0 {
> + compatible = "jedec,spi-nor";
> + reg = <0>;
> + spi-max-frequency = <10000000>;
> +
> + partitions {
> + compatible = "fixed-partitions";
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + partition@0 {
> + label = "bl2";
> + reg = <0x0 0x20000>;
> + read-only;
> + };
> +
> + partition@20000 {
> + label = "reserved";
> + reg = <0x20000 0x20000>;
> + };
> +
> + partition@40000 {
> + label = "u-boot-env";
> + reg = <0x40000 0x40000>;
> + };
> +
> + partition@80000 {
> + label = "reserved2";
> + reg = <0x80000 0x80000>;
> + };
> +
> + partition@100000 {
> + label = "fip";
> + reg = <0x100000 0x80000>;
> + read-only;
> + };
> +
> + partition@180000 {
> + label = "recovery";
> + reg = <0x180000 0xa80000>;
> + };
> +
> + partition@c00000 {
> + label = "fit";
> + reg = <0xc00000 0x1400000>;
> + };
> + };
> + };
> + };
> + };
> +};
> diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-sd.dtso b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-sd.dtso
> new file mode 100644
> index 000000000000..08af778d8adc
> --- /dev/null
> +++ b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-sd.dtso
> @@ -0,0 +1,24 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> +/*
> + * Copyright (C) 2021 MediaTek Inc.
> + * Author: Sam.Shih <[email protected]>
> + */
> +
> +/dts-v1/;
> +/plugin/;
> +
> +/ {
> + compatible = "bananapi,bpi-r3", "mediatek,mt7986a";
> + model = "Bananapi BPI-R3 (sdmmc)";
> +
> + fragment@0 {
> + target-path = "/soc/mmc@11230000";
> + __overlay__ {
> + bus-width = <4>;
> + max-frequency = <52000000>;
> + cap-sd-highspeed;
> + status = "okay";
> + };
> + };
> +};
> +
> diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts
> new file mode 100644
> index 000000000000..618d3bb2f32f
> --- /dev/null
> +++ b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts
> @@ -0,0 +1,448 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> +/*
> + * Copyright (C) 2021 MediaTek Inc.
> + * Authors: Sam.Shih <[email protected]>
> + * Frank Wunderlich <[email protected]>
> + * Daniel Golle <[email protected]>
> + */
> +
> +/dts-v1/;
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/leds/common.h>
> +#include <dt-bindings/pinctrl/mt65xx.h>
> +
> +#include "mt7986a.dtsi"
> +
> +/ {
> + model = "Bananapi BPI-R3";
> + compatible = "bananapi,bpi-r3", "mediatek,mt7986a";
> +
> + aliases {
> + serial0 = &uart0;
> + ethernet0 = &gmac0;
> + ethernet1 = &gmac1;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + dcin: regulator-12vd {
> + compatible = "regulator-fixed";
> + regulator-name = "12vd";
> + regulator-min-microvolt = <12000000>;
> + regulator-max-microvolt = <12000000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + gpio-keys {
> + compatible = "gpio-keys";
> +
> + reset-key {
> + label = "reset";
> + linux,code = <KEY_RESTART>;
> + gpios = <&pio 9 GPIO_ACTIVE_LOW>;
> + };
> +
> + wps-key {
> + label = "wps";
> + linux,code = <KEY_WPS_BUTTON>;
> + gpios = <&pio 10 GPIO_ACTIVE_LOW>;
> + };
> + };
> +
> + /* i2c of the left SFP cage (wan) */
> + i2c_sfp1: i2c-gpio-0 {
> + compatible = "i2c-gpio";
> + sda-gpios = <&pio 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
> + scl-gpios = <&pio 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
> + i2c-gpio,delay-us = <2>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + /* i2c of the right SFP cage (lan) */
> + i2c_sfp2: i2c-gpio-1 {
> + compatible = "i2c-gpio";
> + sda-gpios = <&pio 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
> + scl-gpios = <&pio 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
> + i2c-gpio,delay-us = <2>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> +
> + green_led: led-0 {
> + color = <LED_COLOR_ID_GREEN>;
> + function = LED_FUNCTION_POWER;
> + gpios = <&pio 69 GPIO_ACTIVE_HIGH>;
> + default-state = "on";
> + };
> +
> + blue_led: led-1 {
> + color = <LED_COLOR_ID_BLUE>;
> + function = LED_FUNCTION_STATUS;
> + gpios = <&pio 86 GPIO_ACTIVE_HIGH>;
> + default-state = "off";
> + };
> + };
> +
> + reg_1p8v: regulator-1p8v {
> + compatible = "regulator-fixed";
> + regulator-name = "1.8vd";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-boot-on;
> + regulator-always-on;
> + vin-supply = <&dcin>;
> + };
> +
> + reg_3p3v: regulator-3p3v {
> + compatible = "regulator-fixed";
> + regulator-name = "3.3vd";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
> + vin-supply = <&dcin>;
> + };
> +
> + /* left SFP cage (wan) */
> + sfp1: sfp-1 {
> + compatible = "sff,sfp";
> + i2c-bus = <&i2c_sfp1>;
> + los-gpios = <&pio 46 GPIO_ACTIVE_HIGH>;
> + mod-def0-gpios = <&pio 49 GPIO_ACTIVE_LOW>;
> + tx-disable-gpios = <&pio 20 GPIO_ACTIVE_HIGH>;
> + tx-fault-gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
> + };
> +
> + /* right SFP cage (lan) */
> + sfp2: sfp-2 {
> + compatible = "sff,sfp";
> + i2c-bus = <&i2c_sfp2>;
> + los-gpios = <&pio 31 GPIO_ACTIVE_HIGH>;
> + mod-def0-gpios = <&pio 47 GPIO_ACTIVE_LOW>;
> + tx-disable-gpios = <&pio 15 GPIO_ACTIVE_HIGH>;
> + tx-fault-gpios = <&pio 48 GPIO_ACTIVE_HIGH>;
> + };
> +};
> +
> +&crypto {
> + status = "okay";
> +};
> +
> +ð {
> + status = "okay";
> +
> + gmac0: mac@0 {
> + compatible = "mediatek,eth-mac";
> + reg = <0>;
> + phy-mode = "2500base-x";
> +
> + fixed-link {
> + speed = <2500>;
> + full-duplex;
> + pause;
> + };
> + };
> +
> + gmac1: mac@1 {
> + compatible = "mediatek,eth-mac";
> + reg = <1>;
> + phy-mode = "2500base-x";
> + sfp = <&sfp1>;
> + managed = "in-band-status";
> + };
> +
> + mdio: mdio-bus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +};
> +
> +&mdio {
> + switch: switch@31 {
> + compatible = "mediatek,mt7531";
> + reg = <31>;
> + reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
Please add:
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&pio>;
interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
to have IRQ driven phy status instead of having to poll the link status
of the 5x rj-45 ports.
The value comes from schematics (pin AD24, GPIO66, 7531_INT) and I've
tested this on my board.
> + };
> +};
> +
> +&mmc0 {
> + pinctrl-names = "default", "state_uhs";
> + pinctrl-0 = <&mmc0_pins_default>;
> + pinctrl-1 = <&mmc0_pins_uhs>;
> + vmmc-supply = <®_3p3v>;
> + vqmmc-supply = <®_1p8v>;
> +};
> +
> +&i2c0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c_pins>;
> + status = "okay";
> +};
> +
> +&pcie {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pcie_pins>;
> + status = "okay";
> +};
> +
> +&pcie_phy {
> + status = "okay";
> +};
> +
> +&pio {
> + i2c_pins: i2c-pins {
> + mux {
> + function = "i2c";
> + groups = "i2c";
> + };
> + };
> +
> + mmc0_pins_default: mmc0-pins {
> + mux {
> + function = "emmc";
> + groups = "emmc_51";
> + };
> + conf-cmd-dat {
> + pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
> + "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
> + "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
> + input-enable;
> + drive-strength = <4>;
> + bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
> + };
> + conf-clk {
> + pins = "EMMC_CK";
> + drive-strength = <6>;
> + bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
> + };
> + conf-ds {
> + pins = "EMMC_DSL";
> + bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
> + };
> + conf-rst {
> + pins = "EMMC_RSTB";
> + drive-strength = <4>;
> + bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
> + };
> + };
> +
> + mmc0_pins_uhs: mmc0-uhs-pins {
> + mux {
> + function = "emmc";
> + groups = "emmc_51";
> + };
> + conf-cmd-dat {
> + pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
> + "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
> + "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
> + input-enable;
> + drive-strength = <4>;
> + bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
> + };
> + conf-clk {
> + pins = "EMMC_CK";
> + drive-strength = <6>;
> + bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
> + };
> + conf-ds {
> + pins = "EMMC_DSL";
> + bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
> + };
> + conf-rst {
> + pins = "EMMC_RSTB";
> + drive-strength = <4>;
> + bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
> + };
> + };
> +
> + pcie_pins: pcie-pins {
> + mux {
> + function = "pcie";
> + groups = "pcie_clk", "pcie_pereset";
> + };
> + };
> +
> + spi_flash_pins: spi-flash-pins {
> + mux {
> + function = "spi";
> + groups = "spi0", "spi0_wp_hold";
> + };
> + };
> +
> + spic_pins: spic-pins {
> + mux {
> + function = "spi";
> + groups = "spi1_0";
> + };
> + };
> +
> + uart1_pins: uart1-pins {
> + mux {
> + function = "uart";
> + groups = "uart1_rx_tx";
> + };
> + };
> +
> + uart2_pins: uart2-pins {
> + mux {
> + function = "uart";
> + groups = "uart2_0_rx_tx";
> + };
> + };
> +
> + wf_2g_5g_pins: wf-2g-5g-pins {
> + mux {
> + function = "wifi";
> + groups = "wf_2g", "wf_5g";
> + };
> + conf {
> + pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
> + "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
> + "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
> + "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
> + "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
> + "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
> + "WF1_TOP_CLK", "WF1_TOP_DATA";
> + drive-strength = <4>;
> + };
> + };
> +
> + wf_dbdc_pins: wf-dbdc-pins {
> + mux {
> + function = "wifi";
> + groups = "wf_dbdc";
> + };
> + conf {
> + pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
> + "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
> + "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
> + "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
> + "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
> + "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
> + "WF1_TOP_CLK", "WF1_TOP_DATA";
> + drive-strength = <4>;
> + };
> + };
> +
> + wf_led_pins: wf-led-pins {
> + mux {
> + function = "led";
> + groups = "wifi_led";
> + };
> + };
> +};
> +
> +&spi0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&spi_flash_pins>;
> + cs-gpios = <0>, <0>;
I don't think those bogus cs-gpios here and for spi1 below are needed.
> + status = "okay";
> +};
> +
> +&spi1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&spic_pins>;
> + cs-gpios = <0>, <0>;
> + status = "okay";
> +};
> +
> +&ssusb {
> + status = "okay";
> +};
> +
> +&switch {
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + label = "wan";
> + };
> +
> + port@1 {
> + reg = <1>;
> + label = "lan0";
> + };
> +
> + port@2 {
> + reg = <2>;
> + label = "lan1";
> + };
> +
> + port@3 {
> + reg = <3>;
> + label = "lan2";
> + };
> +
> + port@4 {
> + reg = <4>;
> + label = "lan3";
> + };
> +
> + port5: port@5 {
> + reg = <5>;
> + label = "lan4";
> + phy-mode = "2500base-x";
> + sfp = <&sfp2>;
> + managed = "in-band-status";
> + };
> +
> + port@6 {
> + reg = <6>;
> + label = "cpu";
> + ethernet = <&gmac0>;
> + phy-mode = "2500base-x";
> +
> + fixed-link {
> + speed = <2500>;
> + full-duplex;
> + pause;
> + };
> + };
> + };
> +};
> +
> +&trng {
> + status = "okay";
> +};
> +
> +&uart0 {
> + status = "okay";
> +};
> +
> +&uart1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart1_pins>;
> + status = "okay";
> +};
> +
> +&uart2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart2_pins>;
> + status = "okay";
> +};
> +
> +&usb_phy {
> + status = "okay";
> +};
> +
> +&watchdog {
> + status = "okay";
> +};
> +
> +&wifi {
> + status = "okay";
> + pinctrl-names = "default", "dbdc";
> + pinctrl-0 = <&wf_2g_5g_pins>, <&wf_led_pins>;
> + pinctrl-1 = <&wf_dbdc_pins>, <&wf_led_pins>;
> +};
> +
> --
> 2.34.1
>
>
Hi
> Gesendet: Samstag, 24. Dezember 2022 um 20:00 Uhr
> Von: "Daniel Golle" <[email protected]>
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-emmc.dtso
> > @@ -0,0 +1,30 @@
> > +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> > +/*
> > + * Copyright (C) 2021 MediaTek Inc.
> > + * Author: Sam.Shih <[email protected]>
> > + */
> > +
> > +/dts-v1/;
> > +/plugin/;
> > +
> > +/ {
> > + compatible = "bananapi,bpi-r3", "mediatek,mt7986a";
> > + model = "Bananapi BPI-R3 (emmc)";
>
> Why do you set the model string here?
seems to be a left over from testing where i wanted to see which base-dtb was
loaded without comparing mmc-node settings. Was easier to see with model-string :)
> > +
> > + fragment@0 {
> > + target-path = "/soc/mmc@11230000";
> > + __overlay__ {
> > + bus-width = <8>;
> > + max-frequency = <200000000>;
> > + cap-mmc-highspeed;
> > + mmc-hs200-1_8v;
> > + mmc-hs400-1_8v;
> > + hs400-ds-delay = <0x14014>;
> > + non-removable;
> > + no-sd;
> > + no-sdio;
> > + status = "okay";
> > + };
> > + };
> > +};
> > diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts
> > new file mode 100644
> > index 000000000000..618d3bb2f32f
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts
> > +&mdio {
> > + switch: switch@31 {
> > + compatible = "mediatek,mt7531";
> > + reg = <31>;
> > + reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
>
> Please add:
>
> interrupt-controller;
> #interrupt-cells = <1>;
> interrupt-parent = <&pio>;
> interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
>
> to have IRQ driven phy status instead of having to poll the link status
> of the 5x rj-45 ports.
> The value comes from schematics (pin AD24, GPIO66, 7531_INT) and I've
> tested this on my board.
ok, if you have it tested i add these properties in next version (and test it too).
I wait for tphy-binding to be applied to next (pcie and xhci already in torvalds/master).
> > + };
> > +};
> > +
> > +&spi0 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&spi_flash_pins>;
> > + cs-gpios = <0>, <0>;
>
> I don't think those bogus cs-gpios here and for spi1 below are needed.
can drop them in next version
> > + status = "okay";
> > +};
> > +
> > +&spi1 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&spic_pins>;
> > + cs-gpios = <0>, <0>;
> > + status = "okay";
> > +};
> > +
regards Frank
> Gesendet: Samstag, 24. Dezember 2022 um 20:00 Uhr
> Von: "Daniel Golle" <[email protected]>
> > +++ b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts
> > +&spi0 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&spi_flash_pins>;
> > + cs-gpios = <0>, <0>;
>
> I don't think those bogus cs-gpios here and for spi1 below are needed.
at first look it seems it is needed...as i get this trace with 6.2:
[ 2.145931] pc : mtk_spi_can_dma+0x0/0x34
[ 2.155212] lr : mtk_spi_interrupt+0x74/0x360
[ 2.091801] mtk-spi 1100a000.spi: spi-mem transfer timeout
[ 2.097310] spi-nor: probe of spi0.0 failed with error -110
[ 2.102930] Unable to handle kernel read from unreadable memory at virtual address 0000000000000010
but i get the same trace when reverting the cs-gpios change....seems something is broken in 6.2-rc1
6.1 works without the bogus cs-gpios (and the mt7531 interrupt-change)...
have tried reverting this commit, but it does not fix the issue:
8330e9e8269b 2022-12-07 spi: spi-mtk-nor: Add recovery mechanism for dma read timeout
any idea without doing a bisect?
regards Frank
> > + status = "okay";
> > +};
> > +
> > +&spi1 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&spic_pins>;
> > + cs-gpios = <0>, <0>;
> > + status = "okay";
> > +};
looks like i've found it:
when reverting these 2 (latter alone was not enough and seems not fixing the timeout as shown in my trace)
Revert "spi: mediatek: Enable irq when pdata is ready" (HEAD -> 6.2-rc)
Revert "spi: spi-mtk-nor: Add recovery mechanism for dma read timeout"
so this breaks spi on mt7986:
c6f7874687f7 2022-11-28 spi: mediatek: Enable irq when pdata is ready
have sent bug-report to mailinglist and author/reviewer/maintainer...
regards Frank
> Gesendet: Dienstag, 27. Dezember 2022 um 10:43 Uhr
> Von: "Frank Wunderlich" <[email protected]>
>
> at first look it seems it is needed...as i get this trace with 6.2:
>
> [ 2.145931] pc : mtk_spi_can_dma+0x0/0x34
> [ 2.155212] lr : mtk_spi_interrupt+0x74/0x360
>
> [ 2.091801] mtk-spi 1100a000.spi: spi-mem transfer timeout
> [ 2.097310] spi-nor: probe of spi0.0 failed with error -110
> [ 2.102930] Unable to handle kernel read from unreadable memory at virtual address 0000000000000010
>
> but i get the same trace when reverting the cs-gpios change....seems something is broken in 6.2-rc1
>
> 6.1 works without the bogus cs-gpios (and the mt7531 interrupt-change)...
>
> have tried reverting this commit, but it does not fix the issue:
>
> 8330e9e8269b 2022-12-07 spi: spi-mtk-nor: Add recovery mechanism for dma read timeout