2020-08-05 16:48:43

by David Woodhouse

[permalink] [raw]
Subject: [PATCH 1/3] arm: dts: remove stray /dts-v1/ from mt7623a.dtsi

From: David Woodhouse <[email protected]>

This isn't needed in dtsi files.

Signed-off-by: David Woodhouse <[email protected]>
---
arch/arm/boot/dts/mt7623a.dtsi | 1 -
1 file changed, 1 deletion(-)

diff --git a/arch/arm/boot/dts/mt7623a.dtsi b/arch/arm/boot/dts/mt7623a.dtsi
index 0735a1fb8ad9..a96075206cce 100644
--- a/arch/arm/boot/dts/mt7623a.dtsi
+++ b/arch/arm/boot/dts/mt7623a.dtsi
@@ -5,7 +5,6 @@
*
*/

-/dts-v1/;
#include <dt-bindings/power/mt7623a-power.h>
#include "mt7623.dtsi"

--
2.26.2


2020-08-05 16:51:32

by David Woodhouse

[permalink] [raw]
Subject: [PATCH 2/3] arm: dts: mt7623: move MT7623N GPU to separate mt7623n.dtsi file

From: David Woodhouse <[email protected]>

The MT7623A doesn't have a GPU; add it only for MT7623N boards.

Fixes: 1f6ed224594 ("arm: dts: mt7623: add Mali-450 device node")
Signed-off-by: David Woodhouse <[email protected]>
---
arch/arm/boot/dts/mt7623.dtsi | 24 -------------
arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 2 +-
arch/arm/boot/dts/mt7623n-rfb-emmc.dts | 2 +-
arch/arm/boot/dts/mt7623n.dtsi | 35 +++++++++++++++++++
4 files changed, 37 insertions(+), 26 deletions(-)
create mode 100644 arch/arm/boot/dts/mt7623n.dtsi

diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index 3a6b856e5b74..dcd2f5ba4e20 100644
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -734,30 +734,6 @@ g3dsys: syscon@13000000 {
#reset-cells = <1>;
};

- mali: gpu@13040000 {
- compatible = "mediatek,mt7623-mali", "arm,mali-450";
- reg = <0 0x13040000 0 0x30000>;
- interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_LOW>,
- <GIC_SPI 171 IRQ_TYPE_LEVEL_LOW>,
- <GIC_SPI 172 IRQ_TYPE_LEVEL_LOW>,
- <GIC_SPI 173 IRQ_TYPE_LEVEL_LOW>,
- <GIC_SPI 174 IRQ_TYPE_LEVEL_LOW>,
- <GIC_SPI 175 IRQ_TYPE_LEVEL_LOW>,
- <GIC_SPI 176 IRQ_TYPE_LEVEL_LOW>,
- <GIC_SPI 177 IRQ_TYPE_LEVEL_LOW>,
- <GIC_SPI 178 IRQ_TYPE_LEVEL_LOW>,
- <GIC_SPI 179 IRQ_TYPE_LEVEL_LOW>,
- <GIC_SPI 180 IRQ_TYPE_LEVEL_LOW>;
- interrupt-names = "gp", "gpmmu", "pp0", "ppmmu0", "pp1",
- "ppmmu1", "pp2", "ppmmu2", "pp3", "ppmmu3",
- "pp";
- clocks = <&topckgen CLK_TOP_MMPLL>,
- <&g3dsys CLK_G3DSYS_CORE>;
- clock-names = "bus", "core";
- power-domains = <&scpsys MT2701_POWER_DOMAIN_MFG>;
- resets = <&g3dsys MT2701_G3DSYS_CORE_RST>;
- };
-
mmsys: syscon@14000000 {
compatible = "mediatek,mt7623-mmsys",
"mediatek,mt2701-mmsys",
diff --git a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
index 2b760f90f38c..344f8c65c4aa 100644
--- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
+++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
@@ -6,7 +6,7 @@

/dts-v1/;
#include <dt-bindings/input/input.h>
-#include "mt7623.dtsi"
+#include "mt7623n.dtsi"
#include "mt6323.dtsi"

/ {
diff --git a/arch/arm/boot/dts/mt7623n-rfb-emmc.dts b/arch/arm/boot/dts/mt7623n-rfb-emmc.dts
index 0447748f9fa0..f8efcc364bc3 100644
--- a/arch/arm/boot/dts/mt7623n-rfb-emmc.dts
+++ b/arch/arm/boot/dts/mt7623n-rfb-emmc.dts
@@ -7,7 +7,7 @@

/dts-v1/;
#include <dt-bindings/input/input.h>
-#include "mt7623.dtsi"
+#include "mt7623n.dtsi"
#include "mt6323.dtsi"

/ {
diff --git a/arch/arm/boot/dts/mt7623n.dtsi b/arch/arm/boot/dts/mt7623n.dtsi
new file mode 100644
index 000000000000..7724a4d05b89
--- /dev/null
+++ b/arch/arm/boot/dts/mt7623n.dtsi
@@ -0,0 +1,35 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright © 2017-2020 MediaTek Inc.
+ * Author: Sean Wang <[email protected]>
+ * Ryder Lee <[email protected]>
+ *
+ */
+
+#include "mt7623.dtsi"
+
+/ {
+ mali: gpu@13040000 {
+ compatible = "mediatek,mt7623-mali", "arm,mali-450";
+ reg = <0 0x13040000 0 0x30000>;
+ interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 171 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 172 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 173 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 174 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 175 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 176 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 177 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 178 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 179 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 180 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-names = "gp", "gpmmu", "pp0", "ppmmu0", "pp1",
+ "ppmmu1", "pp2", "ppmmu2", "pp3", "ppmmu3",
+ "pp";
+ clocks = <&topckgen CLK_TOP_MMPLL>,
+ <&g3dsys CLK_G3DSYS_CORE>;
+ clock-names = "bus", "core";
+ power-domains = <&scpsys MT2701_POWER_DOMAIN_MFG>;
+ resets = <&g3dsys MT2701_G3DSYS_CORE_RST>;
+ };
+};
--
2.26.2

2020-08-05 17:10:58

by Frank Wunderlich

[permalink] [raw]
Subject: Aw: [PATCH 2/3] arm: dts: mt7623: move MT7623N GPU to separate mt7623n.dtsi file

Hi David

> Gesendet: Mittwoch, 05. August 2020 um 13:30 Uhr
> Von: "David Woodhouse" <[email protected]>
> From: David Woodhouse <[email protected]>
>
> The MT7623A doesn't have a GPU; add it only for MT7623N boards.
>
> Fixes: 1f6ed224594 ("arm: dts: mt7623: add Mali-450 device node")
> Signed-off-by: David Woodhouse <[email protected]>

> diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
> index 3a6b856e5b74..dcd2f5ba4e20 100644
> --- a/arch/arm/boot/dts/mt7623.dtsi
> +++ b/arch/arm/boot/dts/mt7623.dtsi
> @@ -734,30 +734,6 @@ g3dsys: syscon@13000000 {
> #reset-cells = <1>;
> };
>
> - mali: gpu@13040000 {
> - compatible = "mediatek,mt7623-mali", "arm,mali-450";
...
> - clocks = <&topckgen CLK_TOP_MMPLL>,
> - <&g3dsys CLK_G3DSYS_CORE>;
> - clock-names = "bus", "core";
> - power-domains = <&scpsys MT2701_POWER_DOMAIN_MFG>;
> - resets = <&g3dsys MT2701_G3DSYS_CORE_RST>;
> - };

i guess you should to move g3dsys too, and maybe the mmsys which is also drm-related?

I can add this to my series, but before i change my series, i need advice from MTK/DT owners whats the preferred way ;)

regards Frank

2020-08-05 19:56:19

by David Woodhouse

[permalink] [raw]
Subject: [PATCH 3/3] arm: dts: mt7623: add support for UniElec U7623 eMMC

From: David Woodhouse <[email protected]>

Based on a patch in OpenWrt from Kristian Evensen <[email protected]>

Signed-off-by: David Woodhouse <[email protected]>
---
arch/arm/boot/dts/Makefile | 1 +
.../boot/dts/mt7623a-unielec-u7623-emmc.dts | 347 ++++++++++++++++++
2 files changed, 348 insertions(+)
create mode 100644 arch/arm/boot/dts/mt7623a-unielec-u7623-emmc.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 4572db3fa5ae..52f3954b600c 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1347,6 +1347,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
mt6580-evbp1.dtb \
mt6589-aquaris5.dtb \
mt6592-evb.dtb \
+ mt7623a-unielec-u7623-emmc.dtb \
mt7623a-rfb-emmc.dtb \
mt7623a-rfb-nand.dtb \
mt7623n-rfb-emmc.dtb \
diff --git a/arch/arm/boot/dts/mt7623a-unielec-u7623-emmc.dts b/arch/arm/boot/dts/mt7623a-unielec-u7623-emmc.dts
new file mode 100644
index 000000000000..6205a32159ce
--- /dev/null
+++ b/arch/arm/boot/dts/mt7623a-unielec-u7623-emmc.dts
@@ -0,0 +1,347 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+/*
+ * Copyright © 2018 Kristian Evensen <[email protected]>
+ */
+
+/dts-v1/;
+#include <dt-bindings/input/input.h>
+#include "mt7623a.dtsi"
+#include "mt6323.dtsi"
+
+/ {
+ model = "UniElec U7623 eMMC";
+ compatible = "unielec,u7623-emmc", "mediatek,mt7623";
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0 0x80000000 0 0x20000000>;
+ };
+
+ aliases {
+ serial2 = &uart2;
+ };
+
+ chosen {
+ stdout-path = "serial2:115200n8";
+ };
+
+ cpus {
+ cpu@0 {
+ proc-supply = <&mt6323_vproc_reg>;
+ };
+
+ cpu@1 {
+ proc-supply = <&mt6323_vproc_reg>;
+ };
+
+ cpu@2 {
+ proc-supply = <&mt6323_vproc_reg>;
+ };
+
+ cpu@3 {
+ proc-supply = <&mt6323_vproc_reg>;
+ };
+ };
+
+ reg_1p8v: regulator-1p8v {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_3p3v: regulator-3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_5v: regulator-5v {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-5V";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <&key_pins_a>;
+
+ factory {
+ label = "factory";
+ linux,code = <KEY_RESTART>;
+ gpios = <&pio 256 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&led_pins_unielec>;
+
+ led3 {
+ label = "u7623-01:green:led3";
+ gpios = <&pio 14 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led4 {
+ label = "u7623-01:green:led4";
+ gpios = <&pio 15 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+ };
+};
+
+&crypto {
+ status = "okay";
+};
+
+&eth {
+ status = "okay";
+
+ gmac0: mac@0 {
+ compatible = "mediatek,eth-mac";
+ reg = <0>;
+ phy-mode = "trgmii";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ pause;
+ };
+ };
+
+ mdio: mdio-bus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mt7530: switch@0 {
+ compatible = "mediatek,mt7530";
+ };
+ };
+};
+
+&mt7530 {
+ compatible = "mediatek,mt7530";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ pinctrl-names = "default";
+ mediatek,mcm;
+ resets = <&ethsys 2>;
+ reset-names = "mcm";
+ core-supply = <&mt6323_vpa_reg>;
+ io-supply = <&mt6323_vemc3v3_reg>;
+
+ dsa,mii-bus = <&mdio>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ port@0 {
+ reg = <0>;
+ label = "lan0";
+ cpu = <&cpu_port0>;
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan1";
+ cpu = <&cpu_port0>;
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan2";
+ cpu = <&cpu_port0>;
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan3";
+ cpu = <&cpu_port0>;
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "wan";
+ cpu = <&cpu_port0>;
+ };
+
+ cpu_port0: port@6 {
+ reg = <6>;
+ label = "cpu";
+ ethernet = <&gmac0>;
+ phy-mode = "trgmii";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ };
+};
+
+&mmc0 {
+ pinctrl-names = "default", "state_uhs";
+ pinctrl-0 = <&mmc0_pins_default>;
+ pinctrl-1 = <&mmc0_pins_uhs>;
+ status = "okay";
+ bus-width = <8>;
+ max-frequency = <50000000>;
+ cap-mmc-highspeed;
+ vmmc-supply = <&reg_3p3v>;
+ vqmmc-supply = <&reg_1p8v>;
+ non-removable;
+};
+
+&pio {
+ key_pins_a: keys-alt {
+ pins-keys {
+ pinmux = <MT7623_PIN_256_GPIO256_FUNC_GPIO256>,
+ <MT7623_PIN_257_GPIO257_FUNC_GPIO257>;
+ input-enable;
+ };
+ };
+
+ led_pins_unielec: leds-unielec {
+ pins-leds {
+ pinmux = <MT7623_PIN_14_GPIO14_FUNC_GPIO14>,
+ <MT7623_PIN_15_GPIO15_FUNC_GPIO15>;
+ };
+ };
+
+ mmc0_pins_default: mmc0default {
+ pins_cmd_dat {
+ pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
+ <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
+ <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
+ <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
+ <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
+ <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
+ <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
+ <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
+ <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
+ input-enable;
+ bias-pull-up;
+ };
+
+ pins_clk {
+ pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
+ bias-pull-down;
+ };
+
+ pins_rst {
+ pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
+ bias-pull-up;
+ };
+ };
+
+ mmc0_pins_uhs: mmc0 {
+ pins_cmd_dat {
+ pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
+ <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
+ <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
+ <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
+ <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
+ <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
+ <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
+ <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
+ <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
+ input-enable;
+ drive-strength = <MTK_DRIVE_2mA>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
+ };
+
+ pins_clk {
+ pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
+ drive-strength = <MTK_DRIVE_2mA>;
+ bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
+ };
+
+ pins_rst {
+ pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
+ bias-pull-up;
+ };
+ };
+
+ pcie_default: pcie_pin_default {
+ pins_cmd_dat {
+ pinmux = <MT7623_PIN_208_AUD_EXT_CK1_FUNC_PCIE0_PERST_N>,
+ <MT7623_PIN_209_AUD_EXT_CK2_FUNC_PCIE1_PERST_N>;
+ bias-disable;
+ };
+ };
+};
+
+&pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm_pins_a>;
+ status = "okay";
+};
+
+&pwrap {
+ mt6323 {
+ mt6323led: led {
+ compatible = "mediatek,mt6323-led";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ led@0 {
+ reg = <0>;
+ label = "led0";
+ default-state = "off";
+ };
+ };
+ };
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins_b>;
+ status = "okay";
+};
+
+&usb1 {
+ vusb33-supply = <&reg_3p3v>;
+ vbus-supply = <&reg_3p3v>;
+ status = "okay";
+};
+
+&u3phy1 {
+ status = "okay";
+};
+
+&u3phy2 {
+ status = "okay";
+ mediatek,phy-switch = <&hifsys>;
+};
+
+&pcie {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_default>;
+ status = "okay";
+
+ pcie@1,0 {
+ status = "okay";
+ };
+
+ pcie@2,0 {
+ status = "okay";
+ };
+};
+
+&pcie1_phy {
+ status = "okay";
+};
--
2.26.2