From: Sebastian Reichel <[email protected]>
Hi,
This adds adds support for the UNI-T UTi260B thermal camera, which is based
on i.MX6ULL. Patches 1-14 clean up all warnings reported by CHECK_DTBS for
i.MX6ULL (i.e. for an empty board). They are not specific to the UTi260B and
in fact that machine has most of the IP handled by these patches marked as
disabled. Then patches 15+16 introduce the vendor and board compatible DT
bindings. Finally the last patches adds support for the thermal camera itself.
The DT is based on reverse engineered information. More information about
the device can be found in this presentation from Embedded Recipes 2023:
* https://embedded-recipes.org/2023/wp-content/uploads/2023/10/Running-FOSS-on-a-Thermal-Camera-Sebastian-Reichel-compressed.pdf
* https://www.youtube.com/watch?v=uvObsCG-Cqo
I also prepared a branch with these patches (and a minimal kernel config)
and published it here:
https://git.kernel.org/pub/scm/linux/kernel/git/sre/linux-misc.git/log/?h=uti260b-v3
Changes since PATCHv2:
* https://lore.kernel.org/all/[email protected]/
- drop fsl,imx-asrc YAML binding conversion (merged)
- collect a bunch of Reviewed-by/Acked-by tags
- weim DT binding: fix issue with requirements
- xnur-gpio -> xnur-gpios change: Improve patch long description
Changes since PATCHv1:
* https://lore.kernel.org/all/[email protected]/
- uni-t,imx6ull-uti260b -> uni-t,uti260b
- add Acked-by for uni-t vendor prefix
- add Acked-by for HDMI audio index fix
- add Acked-by for LCDIF power-domain requirement drop
- anatop DT binding: Fixed indentation in example
- anatop DT binding: Described IRQs
- touchscreen DT binding: change tsc@ to touchscreen@ in example
- touchscreen DT binding: change xnur-gpio to xnur-gpios
- weim DT binding: drop acme,whatever example
- weim DT binding: use flash@ instead of nor@
- weim DT binding: update weim.txt reference in arcx,anybus-controller.txt
- weim DT binding: switch to memory-controller binding
- fsl,imx-asrc DT binding: fix ASoC patch subject prefix
- fsl,imx-asrc DT binding: add constraints
- add new patch fixing xnur-gpio(s) in all i.MX6UL board DT files
- add new patch fixing touchscreen nodename in i.MX6UL SoC DT file
- add new patch fixing weim nodename in all i.MX SoC DT files
- device DTS: use color/functions for the led
- device DTS: increase SPI speed
- device DTS: add comment for SD / eMMC node
Unadressed feedback from PATCHv1:
- anatop phandle vs parent: technically it makes sense to just use the
parent, but this driver is only used by i.MX6. The current code makes
use of the phandle, so we cannot drop it because of backwards
compatibility. So I don't see a point in deprecating this property.
- touchscreen binding: I kept measure-delay-time and pre-charge-time
values in hex, since that is being used everywhere and the unit
is unknown. The values are directly written into HW registers and
the i.MX6UL TRM does not provide any hints about the unit. I do not
have an i.MX6UL device with a touchsreen, so I cannot test either.
- regulator name in DT: I did not rename the regulators to just
"regulator", since the nodename must be unique.
Greetings,
-- Sebastian
Sebastian Reichel (16):
dt-bindings: pinctrl: fsl,imx6ul-pinctrl: convert to YAML
dt-bindings: bus: imx-weim: convert to YAML
dt-bindings: input: touchscreen: fsl,imx6ul-tsc convert to YAML
dt-bindings: soc: imx: fsl,imx-anatop: add binding
dt-bindings: soc: imx: fsl,imx-iomuxc-gpr: add imx6
dt-bindings: lcdif: Do not require power-domains for i.MX6ULL
dt-bindings: fsl-imx-sdma: fix HDMI audio index
ARM: dts: imx6ull: fix pinctrl node name
ARM: dts: imx6ul: Remove fsl,anatop from usbotg1
ARM: dts: imx6ul: add missing #thermal-sensor-cells
ARM: dts: nxp: imx6ul: xnur-gpio -> xnur-gpios
ARM: dts: nxp: imx6ul: fix touchscreen node name
ARM: dts: nxp: imx: fix weim node name
dt-bindings: vendor-prefixes: add UNI-T
dt-bindings: arm: add UNI-T UTi260B
ARM: dts: imx6ull-uti260b: Add board
.../devicetree/bindings/arm/fsl.yaml | 1 +
.../devicetree/bindings/bus/imx-weim.txt | 117 ----
.../bindings/display/fsl,lcdif.yaml | 8 +-
.../devicetree/bindings/dma/fsl,imx-sdma.yaml | 3 +-
.../input/touchscreen/fsl,imx6ul-tsc.yaml | 97 +++
.../bindings/input/touchscreen/imx6ul_tsc.txt | 38 --
.../fsl/fsl,imx-weim-peripherals.yaml | 31 +
.../memory-controllers/fsl/fsl,imx-weim.yaml | 203 +++++++
.../mc-peripheral-props.yaml | 1 +
.../bindings/pinctrl/fsl,imx6ul-pinctrl.txt | 37 --
.../bindings/pinctrl/fsl,imx6ul-pinctrl.yaml | 116 ++++
.../bindings/soc/imx/fsl,imx-anatop.yaml | 128 ++++
.../bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml | 18 +-
.../devicetree/bindings/vendor-prefixes.yaml | 2 +
arch/arm/boot/dts/nxp/imx/Makefile | 1 +
arch/arm/boot/dts/nxp/imx/imx1.dtsi | 2 +-
arch/arm/boot/dts/nxp/imx/imx27.dtsi | 2 +-
arch/arm/boot/dts/nxp/imx/imx31.dtsi | 2 +-
arch/arm/boot/dts/nxp/imx/imx35.dtsi | 2 +-
arch/arm/boot/dts/nxp/imx/imx51.dtsi | 2 +-
arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi | 2 +-
arch/arm/boot/dts/nxp/imx/imx6sl.dtsi | 2 +-
arch/arm/boot/dts/nxp/imx/imx6sx.dtsi | 2 +-
.../boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi | 2 +-
arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts | 2 +-
.../nxp/imx/imx6ul-imx6ull-opos6uldev.dtsi | 2 +-
arch/arm/boot/dts/nxp/imx/imx6ul.dtsi | 6 +-
.../boot/dts/nxp/imx/imx6ull-dhcom-som.dtsi | 2 +-
arch/arm/boot/dts/nxp/imx/imx6ull-uti260b.dts | 572 ++++++++++++++++++
arch/arm/boot/dts/nxp/imx/imx6ull.dtsi | 2 +-
.../fieldbus/arcx,anybus-controller.txt | 2 +-
31 files changed, 1195 insertions(+), 212 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/bus/imx-weim.txt
create mode 100644 Documentation/devicetree/bindings/input/touchscreen/fsl,imx6ul-tsc.yaml
delete mode 100644 Documentation/devicetree/bindings/input/touchscreen/imx6ul_tsc.txt
create mode 100644 Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim-peripherals.yaml
create mode 100644 Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim.yaml
delete mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.txt
create mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.yaml
create mode 100644 Documentation/devicetree/bindings/soc/imx/fsl,imx-anatop.yaml
create mode 100644 arch/arm/boot/dts/nxp/imx/imx6ull-uti260b.dts
--
2.43.0
Add missing binding for i.MX anatop syscon.
Signed-off-by: Sebastian Reichel <[email protected]>
---
.../bindings/soc/imx/fsl,imx-anatop.yaml | 128 ++++++++++++++++++
1 file changed, 128 insertions(+)
create mode 100644 Documentation/devicetree/bindings/soc/imx/fsl,imx-anatop.yaml
diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx-anatop.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx-anatop.yaml
new file mode 100644
index 000000000000..5a59e3470510
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx-anatop.yaml
@@ -0,0 +1,128 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/imx/fsl,imx-anatop.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ANATOP register
+
+maintainers:
+ - Shawn Guo <[email protected]>
+ - Sascha Hauer <[email protected]>
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - fsl,imx6sl-anatop
+ - fsl,imx6sll-anatop
+ - fsl,imx6sx-anatop
+ - fsl,imx6ul-anatop
+ - fsl,imx7d-anatop
+ - const: fsl,imx6q-anatop
+ - const: syscon
+ - const: simple-mfd
+ - items:
+ - const: fsl,imx6q-anatop
+ - const: syscon
+ - const: simple-mfd
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ items:
+ - description: Temperature sensor event
+ - description: Brown-out event on either of the support regulators
+ - description: Brown-out event on either the core, gpu or soc regulators
+
+ tempmon:
+ type: object
+ unevaluatedProperties: false
+ $ref: /schemas/thermal/imx-thermal.yaml
+
+patternProperties:
+ "regulator-((3p0)|(vddcore)|(vddsoc))$":
+ type: object
+ unevaluatedProperties: false
+ $ref: /schemas/regulator/anatop-regulator.yaml
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/imx6ul-clock.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ anatop: anatop@20c8000 {
+ compatible = "fsl,imx6ul-anatop", "fsl,imx6q-anatop",
+ "syscon", "simple-mfd";
+ reg = <0x020c8000 0x1000>;
+ interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+
+ reg_3p0: regulator-3p0 {
+ compatible = "fsl,anatop-regulator";
+ regulator-name = "vdd3p0";
+ regulator-min-microvolt = <2625000>;
+ regulator-max-microvolt = <3400000>;
+ anatop-reg-offset = <0x120>;
+ anatop-vol-bit-shift = <8>;
+ anatop-vol-bit-width = <5>;
+ anatop-min-bit-val = <0>;
+ anatop-min-voltage = <2625000>;
+ anatop-max-voltage = <3400000>;
+ anatop-enable-bit = <0>;
+ };
+
+ reg_arm: regulator-vddcore {
+ compatible = "fsl,anatop-regulator";
+ regulator-name = "cpu";
+ regulator-min-microvolt = <725000>;
+ regulator-max-microvolt = <1450000>;
+ regulator-always-on;
+ anatop-reg-offset = <0x140>;
+ anatop-vol-bit-shift = <0>;
+ anatop-vol-bit-width = <5>;
+ anatop-delay-reg-offset = <0x170>;
+ anatop-delay-bit-shift = <24>;
+ anatop-delay-bit-width = <2>;
+ anatop-min-bit-val = <1>;
+ anatop-min-voltage = <725000>;
+ anatop-max-voltage = <1450000>;
+ };
+
+ reg_soc: regulator-vddsoc {
+ compatible = "fsl,anatop-regulator";
+ regulator-name = "vddsoc";
+ regulator-min-microvolt = <725000>;
+ regulator-max-microvolt = <1450000>;
+ regulator-always-on;
+ anatop-reg-offset = <0x140>;
+ anatop-vol-bit-shift = <18>;
+ anatop-vol-bit-width = <5>;
+ anatop-delay-reg-offset = <0x170>;
+ anatop-delay-bit-shift = <28>;
+ anatop-delay-bit-width = <2>;
+ anatop-min-bit-val = <1>;
+ anatop-min-voltage = <725000>;
+ anatop-max-voltage = <1450000>;
+ };
+
+ tempmon: tempmon {
+ compatible = "fsl,imx6ul-tempmon", "fsl,imx6sx-tempmon";
+ interrupt-parent = <&gpc>;
+ interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
+ fsl,tempmon = <&anatop>;
+ nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
+ nvmem-cell-names = "calib", "temp_grade";
+ clocks = <&clks IMX6UL_CLK_PLL3_USB_OTG>;
+ #thermal-sensor-cells = <0>;
+ };
+ };
--
2.43.0
Convert i.MX6UL pinctrl bindings to YAML.
Reviewed-by: Linus Walleij <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Sebastian Reichel <[email protected]>
---
.../bindings/pinctrl/fsl,imx6ul-pinctrl.txt | 37 ------
.../bindings/pinctrl/fsl,imx6ul-pinctrl.yaml | 116 ++++++++++++++++++
2 files changed, 116 insertions(+), 37 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.txt
create mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.yaml
diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.txt
deleted file mode 100644
index 7ca4f6118d9a..000000000000
--- a/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.txt
+++ /dev/null
@@ -1,37 +0,0 @@
-* Freescale i.MX6 UltraLite IOMUX Controller
-
-Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
-and usage.
-
-Required properties:
-- compatible: "fsl,imx6ul-iomuxc" for main IOMUX controller or
- "fsl,imx6ull-iomuxc-snvs" for i.MX 6ULL's SNVS IOMUX controller.
-- fsl,pins: each entry consists of 6 integers and represents the mux and config
- setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
- input_val> are specified using a PIN_FUNC_ID macro, which can be found in
- imx6ul-pinfunc.h under device tree source folder. The last integer CONFIG is
- the pad setting value like pull-up on this pin. Please refer to i.MX6 UltraLite
- Reference Manual for detailed CONFIG settings.
-
-CONFIG bits definition:
-PAD_CTL_HYS (1 << 16)
-PAD_CTL_PUS_100K_DOWN (0 << 14)
-PAD_CTL_PUS_47K_UP (1 << 14)
-PAD_CTL_PUS_100K_UP (2 << 14)
-PAD_CTL_PUS_22K_UP (3 << 14)
-PAD_CTL_PUE (1 << 13)
-PAD_CTL_PKE (1 << 12)
-PAD_CTL_ODE (1 << 11)
-PAD_CTL_SPEED_LOW (0 << 6)
-PAD_CTL_SPEED_MED (1 << 6)
-PAD_CTL_SPEED_HIGH (3 << 6)
-PAD_CTL_DSE_DISABLE (0 << 3)
-PAD_CTL_DSE_260ohm (1 << 3)
-PAD_CTL_DSE_130ohm (2 << 3)
-PAD_CTL_DSE_87ohm (3 << 3)
-PAD_CTL_DSE_65ohm (4 << 3)
-PAD_CTL_DSE_52ohm (5 << 3)
-PAD_CTL_DSE_43ohm (6 << 3)
-PAD_CTL_DSE_37ohm (7 << 3)
-PAD_CTL_SRE_FAST (1 << 0)
-PAD_CTL_SRE_SLOW (0 << 0)
diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.yaml
new file mode 100644
index 000000000000..906b264a9e3c
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.yaml
@@ -0,0 +1,116 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pinctrl/fsl,imx6ul-pinctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale IMX6UL IOMUX Controller
+
+maintainers:
+ - Dong Aisheng <[email protected]>
+
+description:
+ Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory
+ for common binding part and usage.
+
+allOf:
+ - $ref: pinctrl.yaml#
+
+properties:
+ compatible:
+ enum:
+ - fsl,imx6ul-iomuxc
+ - fsl,imx6ull-iomuxc-snvs
+
+ reg:
+ maxItems: 1
+
+# Client device subnode's properties
+patternProperties:
+ 'grp$':
+ type: object
+ description:
+ Pinctrl node's client devices use subnodes for desired pin configuration.
+ Client device subnodes use below standard properties.
+
+ properties:
+ fsl,pins:
+ description:
+ each entry consists of 6 integers and represents the mux and config
+ setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
+ mux_val input_val> are specified using a PIN_FUNC_ID macro, which can
+ be found in <arch/arm/boot/dts/imx6ul-pinfunc.h>. The last integer
+ CONFIG is the pad setting value like pull-up on this pin. Please
+ refer to i.MX6UL Reference Manual for detailed CONFIG settings.
+ $ref: /schemas/types.yaml#/definitions/uint32-matrix
+ items:
+ items:
+ - description: |
+ "mux_reg" indicates the offset of mux register.
+ - description: |
+ "conf_reg" indicates the offset of pad configuration register.
+ - description: |
+ "input_reg" indicates the offset of select input register.
+ - description: |
+ "mux_val" indicates the mux value to be applied.
+ - description: |
+ "input_val" indicates the select input value to be applied.
+ - description: |
+ "pad_setting" indicates the pad configuration value to be applied:
+ PAD_CTL_HYS (1 << 16)
+ PAD_CTL_PUS_100K_DOWN (0 << 14)
+ PAD_CTL_PUS_47K_UP (1 << 14)
+ PAD_CTL_PUS_100K_UP (2 << 14)
+ PAD_CTL_PUS_22K_UP (3 << 14)
+ PAD_CTL_PUE (1 << 13)
+ PAD_CTL_PKE (1 << 12)
+ PAD_CTL_ODE (1 << 11)
+ PAD_CTL_SPEED_LOW (0 << 6)
+ PAD_CTL_SPEED_MED (1 << 6)
+ PAD_CTL_SPEED_HIGH (3 << 6)
+ PAD_CTL_DSE_DISABLE (0 << 3)
+ PAD_CTL_DSE_260ohm (1 << 3)
+ PAD_CTL_DSE_130ohm (2 << 3)
+ PAD_CTL_DSE_87ohm (3 << 3)
+ PAD_CTL_DSE_65ohm (4 << 3)
+ PAD_CTL_DSE_52ohm (5 << 3)
+ PAD_CTL_DSE_43ohm (6 << 3)
+ PAD_CTL_DSE_37ohm (7 << 3)
+ PAD_CTL_SRE_FAST (1 << 0)
+ PAD_CTL_SRE_SLOW (0 << 0)
+
+ required:
+ - fsl,pins
+
+ additionalProperties: false
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ iomuxc: pinctrl@20e0000 {
+ compatible = "fsl,imx6ul-iomuxc";
+ reg = <0x020e0000 0x4000>;
+
+ mux_uart: uartgrp {
+ fsl,pins = <
+ 0x0084 0x0310 0x0000 0 0 0x1b0b1
+ 0x0088 0x0314 0x0624 0 3 0x1b0b1
+ >;
+ };
+ };
+ - |
+ iomuxc_snvs: pinctrl@2290000 {
+ compatible = "fsl,imx6ull-iomuxc-snvs";
+ reg = <0x02290000 0x4000>;
+
+ pinctrl_snvs_usbc_det: snvsusbcdetgrp {
+ fsl,pins = <
+ 0x0010 0x0054 0x0000 0x5 0x0 0x130b0
+ >;
+ };
+ };
--
2.43.0
Convert the i.MX Wireless External Interface Module binding to YAML.
Signed-off-by: Sebastian Reichel <[email protected]>
---
.../devicetree/bindings/bus/imx-weim.txt | 117 ----------
.../fsl/fsl,imx-weim-peripherals.yaml | 31 +++
.../memory-controllers/fsl/fsl,imx-weim.yaml | 203 ++++++++++++++++++
.../mc-peripheral-props.yaml | 1 +
.../fieldbus/arcx,anybus-controller.txt | 2 +-
5 files changed, 236 insertions(+), 118 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/bus/imx-weim.txt
create mode 100644 Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim-peripherals.yaml
create mode 100644 Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim.yaml
diff --git a/Documentation/devicetree/bindings/bus/imx-weim.txt b/Documentation/devicetree/bindings/bus/imx-weim.txt
deleted file mode 100644
index e7f502070d77..000000000000
--- a/Documentation/devicetree/bindings/bus/imx-weim.txt
+++ /dev/null
@@ -1,117 +0,0 @@
-Device tree bindings for i.MX Wireless External Interface Module (WEIM)
-
-The term "wireless" does not imply that the WEIM is literally an interface
-without wires. It simply means that this module was originally designed for
-wireless and mobile applications that use low-power technology.
-
-The actual devices are instantiated from the child nodes of a WEIM node.
-
-Required properties:
-
- - compatible: Should contain one of the following:
- "fsl,imx1-weim"
- "fsl,imx27-weim"
- "fsl,imx51-weim"
- "fsl,imx50-weim"
- "fsl,imx6q-weim"
- - reg: A resource specifier for the register space
- (see the example below)
- - clocks: the clock, see the example below.
- - #address-cells: Must be set to 2 to allow memory address translation
- - #size-cells: Must be set to 1 to allow CS address passing
- - ranges: Must be set up to reflect the memory layout with four
- integer values for each chip-select line in use:
-
- <cs-number> 0 <physical address of mapping> <size>
-
-Optional properties:
-
- - fsl,weim-cs-gpr: For "fsl,imx50-weim" and "fsl,imx6q-weim" type of
- devices, it should be the phandle to the system General
- Purpose Register controller that contains WEIM CS GPR
- register, e.g. IOMUXC_GPR1 on i.MX6Q. IOMUXC_GPR1[11:0]
- should be set up as one of the following 4 possible
- values depending on the CS space configuration.
-
- IOMUXC_GPR1[11:0] CS0 CS1 CS2 CS3
- ---------------------------------------------
- 05 128M 0M 0M 0M
- 033 64M 64M 0M 0M
- 0113 64M 32M 32M 0M
- 01111 32M 32M 32M 32M
-
- In case that the property is absent, the reset value or
- what bootloader sets up in IOMUXC_GPR1[11:0] will be
- used.
-
- - fsl,burst-clk-enable For "fsl,imx50-weim" and "fsl,imx6q-weim" type of
- devices, the presence of this property indicates that
- the weim bus should operate in Burst Clock Mode.
-
- - fsl,continuous-burst-clk Make Burst Clock to output continuous clock.
- Without this option Burst Clock will output clock
- only when necessary. This takes effect only if
- "fsl,burst-clk-enable" is set.
-
-Timing property for child nodes. It is mandatory, not optional.
-
- - fsl,weim-cs-timing: The timing array, contains timing values for the
- child node. We get the CS indexes from the address
- ranges in the child node's "reg" property.
- The number of registers depends on the selected chip:
- For i.MX1, i.MX21 ("fsl,imx1-weim") there are two
- registers: CSxU, CSxL.
- For i.MX25, i.MX27, i.MX31 and i.MX35 ("fsl,imx27-weim")
- there are three registers: CSCRxU, CSCRxL, CSCRxA.
- For i.MX50, i.MX53 ("fsl,imx50-weim"),
- i.MX51 ("fsl,imx51-weim") and i.MX6Q ("fsl,imx6q-weim")
- there are six registers: CSxGCR1, CSxGCR2, CSxRCR1,
- CSxRCR2, CSxWCR1, CSxWCR2.
-
-Example for an imx6q-sabreauto board, the NOR flash connected to the WEIM:
-
- weim: weim@21b8000 {
- compatible = "fsl,imx6q-weim";
- reg = <0x021b8000 0x4000>;
- clocks = <&clks 196>;
- #address-cells = <2>;
- #size-cells = <1>;
- ranges = <0 0 0x08000000 0x08000000>;
- fsl,weim-cs-gpr = <&gpr>;
-
- nor@0,0 {
- compatible = "cfi-flash";
- reg = <0 0 0x02000000>;
- #address-cells = <1>;
- #size-cells = <1>;
- bank-width = <2>;
- fsl,weim-cs-timing = <0x00620081 0x00000001 0x1c022000
- 0x0000c000 0x1404a38e 0x00000000>;
- };
- };
-
-Example for an imx6q-based board, a multi-chipselect device connected to WEIM:
-
-In this case, both chip select 0 and 1 will be configured with the same timing
-array values.
-
- weim: weim@21b8000 {
- compatible = "fsl,imx6q-weim";
- reg = <0x021b8000 0x4000>;
- clocks = <&clks 196>;
- #address-cells = <2>;
- #size-cells = <1>;
- ranges = <0 0 0x08000000 0x02000000
- 1 0 0x0a000000 0x02000000
- 2 0 0x0c000000 0x02000000
- 3 0 0x0e000000 0x02000000>;
- fsl,weim-cs-gpr = <&gpr>;
-
- acme@0 {
- compatible = "acme,whatever";
- reg = <0 0 0x100>, <0 0x400000 0x800>,
- <1 0x400000 0x800>;
- fsl,weim-cs-timing = <0x024400b1 0x00001010 0x20081100
- 0x00000000 0xa0000240 0x00000000>;
- };
- };
diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim-peripherals.yaml b/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim-peripherals.yaml
new file mode 100644
index 000000000000..82fc5f4a1ed6
--- /dev/null
+++ b/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim-peripherals.yaml
@@ -0,0 +1,31 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/memory-controllers/fsl/fsl,imx-weim-peripherals.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: i.MX WEIM Bus Peripheral Nodes
+
+maintainers:
+ - Shawn Guo <[email protected]>
+ - Sascha Hauer <[email protected]>
+
+description:
+ This binding is meant for the child nodes of the WEIM node. The node
+ represents any device connected to the WEIM bus. It may be a Flash chip,
+ RAM chip or Ethernet controller, etc. These properties are meant for
+ configuring the WEIM settings/timings and will accompany the bindings
+ supported by the respective device.
+
+properties:
+ reg: true
+
+ fsl,weim-cs-timing:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ description:
+ Timing values for the child node.
+ minItems: 2
+ maxItems: 6
+
+# the WEIM child will have its own native properties
+additionalProperties: true
diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim.yaml b/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim.yaml
new file mode 100644
index 000000000000..2db59f3b1eb9
--- /dev/null
+++ b/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim.yaml
@@ -0,0 +1,203 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/memory-controllers/fsl/fsl,imx-weim.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: i.MX Wireless External Interface Module (WEIM)
+
+maintainers:
+ - Shawn Guo <[email protected]>
+ - Sascha Hauer <[email protected]>
+
+description:
+ The term "wireless" does not imply that the WEIM is literally an interface
+ without wires. It simply means that this module was originally designed for
+ wireless and mobile applications that use low-power technology. The actual
+ devices are instantiated from the child nodes of a WEIM node.
+
+properties:
+ $nodename:
+ pattern: "^memory-controller@[0-9a-f]+$"
+
+ compatible:
+ oneOf:
+ - enum:
+ - fsl,imx1-weim
+ - fsl,imx27-weim
+ - fsl,imx50-weim
+ - fsl,imx51-weim
+ - fsl,imx6q-weim
+ - items:
+ - enum:
+ - fsl,imx31-weim
+ - fsl,imx35-weim
+ - const: fsl,imx27-weim
+ - items:
+ - enum:
+ - fsl,imx6sx-weim
+ - fsl,imx6ul-weim
+ - const: fsl,imx6q-weim
+
+ '#address-cells':
+ const: 2
+
+ '#size-cells':
+ const: 1
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ ranges: true
+
+ fsl,weim-cs-gpr:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description: |
+ Phandle to the system General Purpose Register controller that contains
+ WEIM CS GPR register, e.g. IOMUXC_GPR1 on i.MX6Q. IOMUXC_GPR1[11:0]
+ should be set up as one of the following 4 possible values depending on
+ the CS space configuration.
+
+ IOMUXC_GPR1[11:0] CS0 CS1 CS2 CS3
+ ---------------------------------------------
+ 05 128M 0M 0M 0M
+ 033 64M 64M 0M 0M
+ 0113 64M 32M 32M 0M
+ 01111 32M 32M 32M 32M
+
+ In case that the property is absent, the reset value or what bootloader
+ sets up in IOMUXC_GPR1[11:0] will be used.
+
+ fsl,burst-clk-enable:
+ type: boolean
+ description:
+ The presence of this property indicates that the weim bus should operate
+ in Burst Clock Mode.
+
+ fsl,continuous-burst-clk:
+ type: boolean
+ description:
+ Make Burst Clock to output continuous clock. Without this option Burst
+ Clock will output clock only when necessary.
+
+patternProperties:
+ "^.*@[0-7],[0-9a-f]+$":
+ type: object
+ description: Devices attached to chip selects are represented as subnodes.
+ $ref: fsl,imx-weim-peripherals.yaml
+ additionalProperties: true
+ required:
+ - fsl,weim-cs-timing
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - '#address-cells'
+ - '#size-cells'
+ - ranges
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ not:
+ contains:
+ enum:
+ - fsl,imx50-weim
+ - fsl,imx6q-weim
+ then:
+ properties:
+ fsl,weim-cs-gpr: false
+ fsl,burst-clk-enable: false
+ - if:
+ properties:
+ fsl,burst-clk-enable: false
+ then:
+ properties:
+ fsl,continuous-burst-clk: false
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: fsl,imx1-weim
+ then:
+ patternProperties:
+ "^.*@[0-7],[0-9a-f]+$":
+ properties:
+ fsl,weim-cs-timing:
+ items:
+ items:
+ - description: CSxU
+ - description: CSxL
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - fsl,imx27-weim
+ - fsl,imx31-weim
+ - fsl,imx35-weim
+ then:
+ patternProperties:
+ "^.*@[0-7],[0-9a-f]+$":
+ properties:
+ fsl,weim-cs-timing:
+ items:
+ items:
+ - description: CSCRxU
+ - description: CSCRxL
+ - description: CSCRxA
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - fsl,imx50-weim
+ - fsl,imx51-weim
+ - fsl,imx6q-weim
+ - fsl,imx6sx-weim
+ - fsl,imx6ul-weim
+ then:
+ patternProperties:
+ "^.*@[0-7],[0-9a-f]+$":
+ properties:
+ fsl,weim-cs-timing:
+ items:
+ items:
+ - description: CSxGCR1
+ - description: CSxGCR2
+ - description: CSxRCR1
+ - description: CSxRCR2
+ - description: CSxWCR1
+ - description: CSxWCR2
+
+additionalProperties: false
+
+examples:
+ - |
+ memory-controller@21b8000 {
+ compatible = "fsl,imx6q-weim";
+ reg = <0x021b8000 0x4000>;
+ clocks = <&clks 196>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+ ranges = <0 0 0x08000000 0x08000000>;
+ fsl,weim-cs-gpr = <&gpr>;
+
+ flash@0,0 {
+ compatible = "cfi-flash";
+ reg = <0 0 0x02000000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ bank-width = <2>;
+ fsl,weim-cs-timing = <0x00620081 0x00000001 0x1c022000
+ 0x0000c000 0x1404a38e 0x00000000>;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/memory-controllers/mc-peripheral-props.yaml b/Documentation/devicetree/bindings/memory-controllers/mc-peripheral-props.yaml
index 8d9dae15ade0..00deeb09f87d 100644
--- a/Documentation/devicetree/bindings/memory-controllers/mc-peripheral-props.yaml
+++ b/Documentation/devicetree/bindings/memory-controllers/mc-peripheral-props.yaml
@@ -37,5 +37,6 @@ allOf:
- $ref: ingenic,nemc-peripherals.yaml#
- $ref: intel,ixp4xx-expansion-peripheral-props.yaml#
- $ref: ti,gpmc-child.yaml#
+ - $ref: fsl/fsl,imx-weim-peripherals.yaml
additionalProperties: true
diff --git a/drivers/staging/fieldbus/Documentation/devicetree/bindings/fieldbus/arcx,anybus-controller.txt b/drivers/staging/fieldbus/Documentation/devicetree/bindings/fieldbus/arcx,anybus-controller.txt
index b1f9474f36d5..f34a95611645 100644
--- a/drivers/staging/fieldbus/Documentation/devicetree/bindings/fieldbus/arcx,anybus-controller.txt
+++ b/drivers/staging/fieldbus/Documentation/devicetree/bindings/fieldbus/arcx,anybus-controller.txt
@@ -48,7 +48,7 @@ Example of usage:
-----------------
This example places the bridge on top of the i.MX WEIM parallel bus, see:
-Documentation/devicetree/bindings/bus/imx-weim.txt
+Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim.yaml
&weim {
controller@0,0 {
--
2.43.0
fsl,anatop should only be added to the usbphy nodes.
Signed-off-by: Sebastian Reichel <[email protected]>
---
arch/arm/boot/dts/nxp/imx/imx6ul.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi
index a27a7554c2e7..9eb4eee0c272 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi
@@ -855,7 +855,6 @@ usbotg1: usb@2184000 {
clocks = <&clks IMX6UL_CLK_USBOH3>;
fsl,usbphy = <&usbphy1>;
fsl,usbmisc = <&usbmisc 0>;
- fsl,anatop = <&anatop>;
ahb-burst-config = <0x0>;
tx-burst-size-dword = <0x10>;
rx-burst-size-dword = <0x10>;
--
2.43.0
Add compatible value for i.MX6ULL based UNI-T UTi260B thermal camera.
Acked-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Sebastian Reichel <[email protected]>
---
Documentation/devicetree/bindings/arm/fsl.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
index 228dcc5c7d6f..7b65f9c9c1a5 100644
--- a/Documentation/devicetree/bindings/arm/fsl.yaml
+++ b/Documentation/devicetree/bindings/arm/fsl.yaml
@@ -708,6 +708,7 @@ properties:
- toradex,colibri-imx6ull # Colibri iMX6ULL Modules
- toradex,colibri-imx6ull-emmc # Colibri iMX6ULL 1GB (eMMC) Module
- toradex,colibri-imx6ull-wifi # Colibri iMX6ULL Wi-Fi / BT Modules
+ - uni-t,uti260b # UNI-T UTi260B Thermal Camera
- const: fsl,imx6ull
- description: i.MX6ULL Armadeus Systems OPOS6ULDev Board
--
2.43.0
Uni-Trend Technology is a manufacturer of measurement
and testing tools.
Acked-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Sebastian Reichel <[email protected]>
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index 1a0dc04f1db4..e945e76696c2 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -1484,6 +1484,8 @@ patternProperties:
description: Ufi Space Co., Ltd.
"^ugoos,.*":
description: Ugoos Industrial Co., Ltd.
+ "^uni-t,.*":
+ description: Uni-Trend Technology (China) Co., Ltd.
"^uniwest,.*":
description: United Western Technologies Corp (UniWest)
"^upisemi,.*":
--
2.43.0
On 16/02/2024 23:34, Sebastian Reichel wrote:
> Convert the i.MX Wireless External Interface Module binding to YAML.
>
> Signed-off-by: Sebastian Reichel <[email protected]>
> ---
> .../devicetree/bindings/bus/imx-weim.txt | 117 ----------
> .../fsl/fsl,imx-weim-peripherals.yaml | 31 +++
> .../memory-controllers/fsl/fsl,imx-weim.yaml | 203 ++++++++++++++++++
> .../mc-peripheral-props.yaml | 1 +
> .../fieldbus/arcx,anybus-controller.txt | 2 +-
> 5 files changed, 236 insertions(+), 118 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/bus/imx-weim.txt
> create mode 100644 Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim-peripherals.yaml
> create mode 100644 Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim.yaml
>
> diff --git a/Documentation/devicetree/bindings/bus/imx-weim.txt b/Documentation/devicetree/bindings/bus/imx-weim.txt
> deleted file mode 100644
> index e7f502070d77..000000000000
> --- a/Documentation/devicetree/bindings/bus/imx-weim.txt
> +++ /dev/null
> @@ -1,117 +0,0 @@
> -Device tree bindings for i.MX Wireless External Interface Module (WEIM)
> -
> -The term "wireless" does not imply that the WEIM is literally an interface
> -without wires. It simply means that this module was originally designed for
> -wireless and mobile applications that use low-power technology.
> -
> -The actual devices are instantiated from the child nodes of a WEIM node.
> -
> -Required properties:
> -
> - - compatible: Should contain one of the following:
> - "fsl,imx1-weim"
> - "fsl,imx27-weim"
> - "fsl,imx51-weim"
> - "fsl,imx50-weim"
> - "fsl,imx6q-weim"
> - - reg: A resource specifier for the register space
> - (see the example below)
> - - clocks: the clock, see the example below.
> - - #address-cells: Must be set to 2 to allow memory address translation
> - - #size-cells: Must be set to 1 to allow CS address passing
> - - ranges: Must be set up to reflect the memory layout with four
> - integer values for each chip-select line in use:
> -
> - <cs-number> 0 <physical address of mapping> <size>
> -
> -Optional properties:
> -
> - - fsl,weim-cs-gpr: For "fsl,imx50-weim" and "fsl,imx6q-weim" type of
> - devices, it should be the phandle to the system General
> - Purpose Register controller that contains WEIM CS GPR
> - register, e.g. IOMUXC_GPR1 on i.MX6Q. IOMUXC_GPR1[11:0]
> - should be set up as one of the following 4 possible
> - values depending on the CS space configuration.
> -
> - IOMUXC_GPR1[11:0] CS0 CS1 CS2 CS3
> - ---------------------------------------------
> - 05 128M 0M 0M 0M
> - 033 64M 64M 0M 0M
> - 0113 64M 32M 32M 0M
> - 01111 32M 32M 32M 32M
> -
> - In case that the property is absent, the reset value or
> - what bootloader sets up in IOMUXC_GPR1[11:0] will be
> - used.
> -
> - - fsl,burst-clk-enable For "fsl,imx50-weim" and "fsl,imx6q-weim" type of
> - devices, the presence of this property indicates that
> - the weim bus should operate in Burst Clock Mode.
> -
> - - fsl,continuous-burst-clk Make Burst Clock to output continuous clock.
> - Without this option Burst Clock will output clock
> - only when necessary. This takes effect only if
> - "fsl,burst-clk-enable" is set.
> -
> -Timing property for child nodes. It is mandatory, not optional.
> -
> - - fsl,weim-cs-timing: The timing array, contains timing values for the
> - child node. We get the CS indexes from the address
> - ranges in the child node's "reg" property.
> - The number of registers depends on the selected chip:
> - For i.MX1, i.MX21 ("fsl,imx1-weim") there are two
> - registers: CSxU, CSxL.
> - For i.MX25, i.MX27, i.MX31 and i.MX35 ("fsl,imx27-weim")
> - there are three registers: CSCRxU, CSCRxL, CSCRxA.
> - For i.MX50, i.MX53 ("fsl,imx50-weim"),
> - i.MX51 ("fsl,imx51-weim") and i.MX6Q ("fsl,imx6q-weim")
> - there are six registers: CSxGCR1, CSxGCR2, CSxRCR1,
> - CSxRCR2, CSxWCR1, CSxWCR2.
> -
> -Example for an imx6q-sabreauto board, the NOR flash connected to the WEIM:
> -
> - weim: weim@21b8000 {
> - compatible = "fsl,imx6q-weim";
> - reg = <0x021b8000 0x4000>;
> - clocks = <&clks 196>;
> - #address-cells = <2>;
> - #size-cells = <1>;
> - ranges = <0 0 0x08000000 0x08000000>;
> - fsl,weim-cs-gpr = <&gpr>;
> -
> - nor@0,0 {
> - compatible = "cfi-flash";
> - reg = <0 0 0x02000000>;
> - #address-cells = <1>;
> - #size-cells = <1>;
> - bank-width = <2>;
> - fsl,weim-cs-timing = <0x00620081 0x00000001 0x1c022000
> - 0x0000c000 0x1404a38e 0x00000000>;
> - };
> - };
> -
> -Example for an imx6q-based board, a multi-chipselect device connected to WEIM:
> -
> -In this case, both chip select 0 and 1 will be configured with the same timing
> -array values.
> -
> - weim: weim@21b8000 {
> - compatible = "fsl,imx6q-weim";
> - reg = <0x021b8000 0x4000>;
> - clocks = <&clks 196>;
> - #address-cells = <2>;
> - #size-cells = <1>;
> - ranges = <0 0 0x08000000 0x02000000
> - 1 0 0x0a000000 0x02000000
> - 2 0 0x0c000000 0x02000000
> - 3 0 0x0e000000 0x02000000>;
> - fsl,weim-cs-gpr = <&gpr>;
> -
> - acme@0 {
> - compatible = "acme,whatever";
> - reg = <0 0 0x100>, <0 0x400000 0x800>,
> - <1 0x400000 0x800>;
> - fsl,weim-cs-timing = <0x024400b1 0x00001010 0x20081100
> - 0x00000000 0xa0000240 0x00000000>;
> - };
> - };
> diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim-peripherals.yaml b/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim-peripherals.yaml
> new file mode 100644
> index 000000000000..82fc5f4a1ed6
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim-peripherals.yaml
> @@ -0,0 +1,31 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/memory-controllers/fsl/fsl,imx-weim-peripherals.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: i.MX WEIM Bus Peripheral Nodes
> +
> +maintainers:
> + - Shawn Guo <[email protected]>
> + - Sascha Hauer <[email protected]>
> +
> +description:
> + This binding is meant for the child nodes of the WEIM node. The node
> + represents any device connected to the WEIM bus. It may be a Flash chip,
> + RAM chip or Ethernet controller, etc. These properties are meant for
> + configuring the WEIM settings/timings and will accompany the bindings
> + supported by the respective device.
> +
> +properties:
> + reg: true
Your pattern in weim schema suggests you have here minItems: 2.
maxItems: can be 2 or 255.
> +
> + fsl,weim-cs-timing:
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> + description:
> + Timing values for the child node.
> + minItems: 2
> + maxItems: 6
> +
..
> +patternProperties:
> + "^.*@[0-7],[0-9a-f]+$":
> + type: object
> + description: Devices attached to chip selects are represented as subnodes.
> + $ref: fsl,imx-weim-peripherals.yaml
> + additionalProperties: true
> + required:
> + - fsl,weim-cs-timing
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - '#address-cells'
> + - '#size-cells'
Plaese keep consistent quotes, either ' or "
> + - ranges
> +
> +allOf:
> + - if:
> + properties:
> + compatible:
> + not:
> + contains:
> + enum:
> + - fsl,imx50-weim
> + - fsl,imx6q-weim
> + then:
> + properties:
> + fsl,weim-cs-gpr: false
> + fsl,burst-clk-enable: false
> + - if:
> + properties:
> + fsl,burst-clk-enable: false
This does not work, or at least should not IMO.
What you want is
not:
required:
https://elixir.bootlin.com/linux/v6.4-rc7/source/Documentation/devicetree/bindings/net/qcom,ipa.yaml#L174
> + then:
> + properties:
> + fsl,continuous-burst-clk: false
> +
Best regards,
Krzysztof
On 16/02/2024 23:34, Sebastian Reichel wrote:
> Add missing binding for i.MX anatop syscon.
>
> Signed-off-by: Sebastian Reichel <[email protected]>
> ---
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Best regards,
Krzysztof
Hi Krzysztof,
On Sat, Feb 17, 2024 at 09:39:52AM +0100, Krzysztof Kozlowski wrote:
> On 16/02/2024 23:34, Sebastian Reichel wrote:
> > +properties:
> > + reg: true
>
> Your pattern in weim schema suggests you have here minItems: 2.
> maxItems: can be 2 or 255.
Which part suggests minItems: 2?
It's minItems: 1 with each item consisting of two address cells and
one size cell. Most in-tree users actually have exactly one item.
The only exception seems to be arch/arm/boot/dts/nxp/imx/imx1-apf9328.dts,
which has "davicom,dm9000" using two reg items. Considering this is an
external bus, any number is possible in theory. Should I keep it as is,
or use minItems: 1, maxItems: 255 instead?
-- Sebastian
On 19/02/2024 02:59, Sebastian Reichel wrote:
> Hi Krzysztof,
>
> On Sat, Feb 17, 2024 at 09:39:52AM +0100, Krzysztof Kozlowski wrote:
>> On 16/02/2024 23:34, Sebastian Reichel wrote:
>>> +properties:
>>> + reg: true
>>
>> Your pattern in weim schema suggests you have here minItems: 2.
>> maxItems: can be 2 or 255.
>
> Which part suggests minItems: 2?
>
> It's minItems: 1 with each item consisting of two address cells and
> one size cell. Most in-tree users actually have exactly one item.
> The only exception seems to be arch/arm/boot/dts/nxp/imx/imx1-apf9328.dts,
> which has "davicom,dm9000" using two reg items. Considering this is an
> external bus, any number is possible in theory. Should I keep it as is,
> or use minItems: 1, maxItems: 255 instead?
Hm, indeed, existing 'true' is fine.
Best regards,
Krzysztof