This series patches add the display-related nodes for rk3399.
Tested with kernel base on drm-misc and below patches.
https://cgit.freedesktop.org/drm/drm-misc/
"drm: bridge: synopsys/dw-hdmi: Provide default configuration function for HDMI 2.0 PHY"
"iommu/rockchip: Enable Rockchip IOMMU on ARM64"
HDMI could work and have a display output.
eDP could link with panel but i didn't get a display(Maybe something wrong in power things).
For convenience, i think we should have those nodes in kernel now.
Jacob Chen (5):
arm64: dts: rockchip: Add rk3399 vop and display-subsystem
arm64: dts: rockchip: add pd_edp node for rk3399
arm64: dts: rockchip: add rk3399 edp nodes
arm64: dts: rockchip: add rk3399 mipi nodes
arm64: dts: rockchip: add rk3399 hdmi nodes
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 198 +++++++++++++++++++++++++++++++
1 file changed, 198 insertions(+)
--
2.7.4
Add devicetree nodes for rk3399 VOP (Video Output Processors), and the
top level display-subsystem root node.
Later patches add endpoints (eDP, HDMI, MIPI, etc) that attach to the
VOPs' output ports.
Signed-off-by: Mark Yao <[email protected]>
Signed-off-by: Yakir Yang <[email protected]>
Signed-off-by: Caesar Wang <[email protected]>
Signed-off-by: Jacob Chen <[email protected]>
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 65 ++++++++++++++++++++++++++++++++
1 file changed, 65 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index e795135..300e500 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1455,6 +1455,71 @@
status = "disabled";
};
+ vopl: vop@ff8f0000 {
+ compatible = "rockchip,rk3399-vop-lit";
+ reg = <0x0 0xff8f0000 0x0 0x1ffc>, <0x0 0xff8f2000 0x0 0x400>;
+ interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>, <&cru DCLK_VOP1_DIV>;
+ clock-names = "aclk_vop", "dclk_vop", "hclk_vop", "dclk_source";
+ resets = <&cru SRST_A_VOP1>, <&cru SRST_H_VOP1>, <&cru SRST_D_VOP1>;
+ reset-names = "axi", "ahb", "dclk";
+ power-domains = <&power RK3399_PD_VOPL>;
+ iommus = <&vopl_mmu>;
+ status = "disabled";
+
+ vopl_out: port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ vopl_mmu: iommu@ff8f3f00 {
+ compatible = "rockchip,iommu";
+ reg = <0x0 0xff8f3f00 0x0 0x100>;
+ interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
+ interrupt-names = "vopl_mmu";
+ clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>;
+ clock-names = "aclk", "hclk";
+ power-domains = <&power RK3399_PD_VOPL>;
+ #iommu-cells = <0>;
+ status = "disabled";
+ };
+
+ vopb: vop@ff900000 {
+ compatible = "rockchip,rk3399-vop-big";
+ reg = <0x0 0xff900000 0x0 0x1ffc>, <0x0 0xff902000 0x0 0x1000>;
+ interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>, <&cru DCLK_VOP0_DIV>;
+ clock-names = "aclk_vop", "dclk_vop", "hclk_vop", "dclk_source";
+ resets = <&cru SRST_A_VOP0>, <&cru SRST_H_VOP0>, <&cru SRST_D_VOP0>;
+ reset-names = "axi", "ahb", "dclk";
+ power-domains = <&power RK3399_PD_VOPB>;
+ iommus = <&vopb_mmu>;
+ status = "disabled";
+
+ vopb_out: port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ vopb_mmu: iommu@ff903f00 {
+ compatible = "rockchip,iommu";
+ reg = <0x0 0xff903f00 0x0 0x100>;
+ interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>;
+ interrupt-names = "vopb_mmu";
+ clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>;
+ clock-names = "aclk", "hclk";
+ power-domains = <&power RK3399_PD_VOPB>;
+ #iommu-cells = <0>;
+ status = "disabled";
+ };
+
+ display-subsystem {
+ compatible = "rockchip,display-subsystem";
+ ports = <&vopl_out>, <&vopb_out>;
+ };
+
pinctrl: pinctrl {
compatible = "rockchip,rk3399-pinctrl";
rockchip,grf = <&grf>;
--
2.7.4
1. add pd node for RK3399 Soc
2. create power domain tree
3. add qos node for domain
Signed-off-by: Elaine Zhang <[email protected]>
Signed-off-by: Caesar Wang <[email protected]>
Signed-off-by: Jacob Chen <[email protected]>
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 300e500..b88bd02 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -956,6 +956,10 @@
};
/* These power domains are grouped by VD_LOGIC */
+ pd_edp@RK3399_PD_EDP {
+ reg = <RK3399_PD_EDP>;
+ clocks = <&cru PCLK_EDP_CTRL>;
+ };
pd_emmc@RK3399_PD_EMMC {
reg = <RK3399_PD_EMMC>;
clocks = <&cru ACLK_EMMC>;
--
2.7.4
Add an mipi node, and also add mipi endpoints to vopb and vopl
output port nodes.
Signed-off-by: Jacob Chen <[email protected]>
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 44 ++++++++++++++++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index b4ff50a..4965163 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1475,6 +1475,11 @@
#address-cells = <1>;
#size-cells = <0>;
+ vopl_out_mipi: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&mipi_in_vopl>;
+ };
+
vopl_out_edp: endpoint@1 {
reg = <1>;
remote-endpoint = <&edp_in_vopl>;
@@ -1516,6 +1521,11 @@
remote-endpoint = <&edp_in_vopb>;
};
+ vopb_out_mipi: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&mipi_in_vopb>;
+ };
+
};
};
@@ -1531,6 +1541,40 @@
status = "disabled";
};
+ mipi_dsi: mipi@ff960000 {
+ compatible = "rockchip,rk3399-mipi-dsi", "snps,dw-mipi-dsi";
+ reg = <0x0 0xff960000 0x0 0x8000>;
+ interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&cru SCLK_MIPIDPHY_REF>, <&cru PCLK_MIPI_DSI0>,
+ <&cru SCLK_DPHY_TX0_CFG>;
+ clock-names = "ref", "pclk", "phy_cfg";
+ power-domains = <&power RK3399_PD_VIO>;
+ rockchip,grf = <&grf>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ mipi_in: port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mipi_in_vopb: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&vopb_out_mipi>;
+ };
+ mipi_in_vopl: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&vopl_out_mipi>;
+ };
+ };
+ };
+ };
+
edp: edp@ff970000 {
compatible = "rockchip,rk3399-edp";
reg = <0x0 0xff970000 0x0 0x8000>;
--
2.7.4
Add an edp node, and also add edp endpoints to vopb and vopl
output port nodes.
Signed-off-by: Yakir Yang <[email protected]>
Signed-off-by: Caesar Wang <[email protected]>
Signed-off-by: Jacob Chen <[email protected]>
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 48 ++++++++++++++++++++++++++++++++
1 file changed, 48 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index b88bd02..b4ff50a 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1474,6 +1474,12 @@
vopl_out: port {
#address-cells = <1>;
#size-cells = <0>;
+
+ vopl_out_edp: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&edp_in_vopl>;
+ };
+
};
};
@@ -1504,6 +1510,12 @@
vopb_out: port {
#address-cells = <1>;
#size-cells = <0>;
+
+ vopb_out_edp: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&edp_in_vopb>;
+ };
+
};
};
@@ -1519,6 +1531,42 @@
status = "disabled";
};
+ edp: edp@ff970000 {
+ compatible = "rockchip,rk3399-edp";
+ reg = <0x0 0xff970000 0x0 0x8000>;
+ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&cru PCLK_EDP>, <&cru PCLK_EDP_CTRL>;
+ clock-names = "dp", "pclk";
+ power-domains = <&power RK3399_PD_EDP>;
+ resets = <&cru SRST_P_EDP_CTRL>;
+ reset-names = "dp";
+ rockchip,grf = <&grf>;
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&edp_hpd>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ edp_in: port@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ edp_in_vopb: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&vopb_out_edp>;
+ };
+
+ edp_in_vopl: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&vopl_out_edp>;
+ };
+ };
+ };
+ };
+
display-subsystem {
compatible = "rockchip,display-subsystem";
ports = <&vopl_out>, <&vopb_out>;
--
2.7.4
Add an hdmi node, and also add hdmi endpoints to vopb and vopl
output port nodes.
Signed-off-by: Jacob Chen <[email protected]>
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 37 ++++++++++++++++++++++++++++++++
1 file changed, 37 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 4965163..c398eb0 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1485,6 +1485,11 @@
remote-endpoint = <&edp_in_vopl>;
};
+ vopl_out_hdmi: endpoint@2 {
+ reg = <2>;
+ remote-endpoint = <&hdmi_in_vopl>;
+ };
+
};
};
@@ -1526,6 +1531,11 @@
remote-endpoint = <&mipi_in_vopb>;
};
+ vopb_out_hdmi: endpoint@2 {
+ reg = <2>;
+ remote-endpoint = <&hdmi_in_vopb>;
+ };
+
};
};
@@ -1541,6 +1551,33 @@
status = "disabled";
};
+ hdmi: hdmi@ff940000 {
+ compatible = "rockchip,rk3399-dw-hdmi";
+ reg = <0x0 0xff940000 0x0 0x20000>;
+ reg-io-width = <4>;
+ rockchip,grf = <&grf>;
+ power-domains = <&power RK3399_PD_HDCP>;
+ interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_SFR>, <&cru PLL_VPLL>, <&cru PCLK_VIO_GRF>;
+ clock-names = "iahb", "isfr", "vpll", "grf";
+ status = "disabled";
+
+ ports {
+ hdmi_in: port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ hdmi_in_vopb: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&vopb_out_hdmi>;
+ };
+ hdmi_in_vopl: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&vopl_out_hdmi>;
+ };
+ };
+ };
+ };
+
mipi_dsi: mipi@ff960000 {
compatible = "rockchip,rk3399-mipi-dsi", "snps,dw-mipi-dsi";
reg = <0x0 0xff960000 0x0 0x8000>;
--
2.7.4
Hi Jacob,
Am Donnerstag, 13. Juli 2017, 00:03:51 CEST schrieb Jacob Chen:
> Add devicetree nodes for rk3399 VOP (Video Output Processors), and the
> top level display-subsystem root node.
>
> Later patches add endpoints (eDP, HDMI, MIPI, etc) that attach to the
> VOPs' output ports.
>
> Signed-off-by: Mark Yao <[email protected]>
> Signed-off-by: Yakir Yang <[email protected]>
> Signed-off-by: Caesar Wang <[email protected]>
> Signed-off-by: Jacob Chen <[email protected]>
> ---
> arch/arm64/boot/dts/rockchip/rk3399.dtsi | 65 ++++++++++++++++++++++++++++++++
> 1 file changed, 65 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> index e795135..300e500 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> @@ -1455,6 +1455,71 @@
> status = "disabled";
> };
>
> + vopl: vop@ff8f0000 {
> + compatible = "rockchip,rk3399-vop-lit";
> + reg = <0x0 0xff8f0000 0x0 0x1ffc>, <0x0 0xff8f2000 0x0 0x400>;
What is this second memory region doing? It looks like this is the meant
to cover VOP_GAMMA_LUT_ADDR, but can't you just map the whole area?
ChromeOS seems to be doing fine using the whole area as
<0x0 0xff8f0000 0x0 0x3efc>
and I've also not seen any code changes actually mapping/using this
second area.
> + interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
> + clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>, <&cru DCLK_VOP1_DIV>;
> + clock-names = "aclk_vop", "dclk_vop", "hclk_vop", "dclk_source";
While I know that this is based on my idea on handling the hdmi pll-rate
requirements, I haven't found the matching code- and dt-binding-changes
posted to a list yet.
Heiko
Hi heko,
2017-07-14 7:34 GMT+08:00 Heiko Stuebner <[email protected]>:
> Hi Jacob,
>
> Am Donnerstag, 13. Juli 2017, 00:03:51 CEST schrieb Jacob Chen:
>> Add devicetree nodes for rk3399 VOP (Video Output Processors), and the
>> top level display-subsystem root node.
>>
>> Later patches add endpoints (eDP, HDMI, MIPI, etc) that attach to the
>> VOPs' output ports.
>>
>> Signed-off-by: Mark Yao <[email protected]>
>> Signed-off-by: Yakir Yang <[email protected]>
>> Signed-off-by: Caesar Wang <[email protected]>
>> Signed-off-by: Jacob Chen <[email protected]>
>> ---
>> arch/arm64/boot/dts/rockchip/rk3399.dtsi | 65 ++++++++++++++++++++++++++++++++
>> 1 file changed, 65 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> index e795135..300e500 100644
>> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> @@ -1455,6 +1455,71 @@
>> status = "disabled";
>> };
>>
>> + vopl: vop@ff8f0000 {
>> + compatible = "rockchip,rk3399-vop-lit";
>> + reg = <0x0 0xff8f0000 0x0 0x1ffc>, <0x0 0xff8f2000 0x0 0x400>;
>
> What is this second memory region doing? It looks like this is the meant
> to cover VOP_GAMMA_LUT_ADDR, but can't you just map the whole area?
> ChromeOS seems to be doing fine using the whole area as
> <0x0 0xff8f0000 0x0 0x3efc>
> and I've also not seen any code changes actually mapping/using this
> second area.
>
0x1c00 - 0x200 for cabc_lut
0x2000 - 0x300 for gama_lut
My mistakes, It seems mark havn't send gamma and cabc support to upstream.
We shoud just using the whole area map.
>
>> + interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
>> + clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>, <&cru DCLK_VOP1_DIV>;
>> + clock-names = "aclk_vop", "dclk_vop", "hclk_vop", "dclk_source";
>
> While I know that this is based on my idea on handling the hdmi pll-rate
> requirements, I haven't found the matching code- and dt-binding-changes
> posted to a list yet.
>
Yeah, should i collect mark's patches or remove it at first?
>
> Heiko
>
Hi Jacob,
Am Freitag, 14. Juli 2017, 09:52:30 CEST schrieb Jacob Chen:
> 2017-07-14 7:34 GMT+08:00 Heiko Stuebner <[email protected]>:
> > Am Donnerstag, 13. Juli 2017, 00:03:51 CEST schrieb Jacob Chen:
> >> Add devicetree nodes for rk3399 VOP (Video Output Processors), and the
> >> top level display-subsystem root node.
> >>
> >> Later patches add endpoints (eDP, HDMI, MIPI, etc) that attach to the
> >> VOPs' output ports.
> >>
> >> Signed-off-by: Mark Yao <[email protected]>
> >> Signed-off-by: Yakir Yang <[email protected]>
> >> Signed-off-by: Caesar Wang <[email protected]>
> >> Signed-off-by: Jacob Chen <[email protected]>
> >> ---
> >> arch/arm64/boot/dts/rockchip/rk3399.dtsi | 65 ++++++++++++++++++++++++++++++++
> >> 1 file changed, 65 insertions(+)
> >>
> >> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> >> index e795135..300e500 100644
> >> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> >> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> >> @@ -1455,6 +1455,71 @@
> >> status = "disabled";
> >> };
> >>
> >> + vopl: vop@ff8f0000 {
> >> + compatible = "rockchip,rk3399-vop-lit";
> >> + reg = <0x0 0xff8f0000 0x0 0x1ffc>, <0x0 0xff8f2000 0x0 0x400>;
> >
> > What is this second memory region doing? It looks like this is the meant
> > to cover VOP_GAMMA_LUT_ADDR, but can't you just map the whole area?
> > ChromeOS seems to be doing fine using the whole area as
> > <0x0 0xff8f0000 0x0 0x3efc>
> > and I've also not seen any code changes actually mapping/using this
> > second area.
> >
>
> 0x1c00 - 0x200 for cabc_lut
> 0x2000 - 0x300 for gama_lut
>
> My mistakes, It seems mark havn't send gamma and cabc support to upstream.
> We shoud just using the whole area map.
>
>
> >
> >> + interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
> >> + clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>, <&cru DCLK_VOP1_DIV>;
> >> + clock-names = "aclk_vop", "dclk_vop", "hclk_vop", "dclk_source";
> >
> > While I know that this is based on my idea on handling the hdmi pll-rate
> > requirements, I haven't found the matching code- and dt-binding-changes
> > posted to a list yet.
> >
>
> Yeah, should i collect mark's patches or remove it at first?
As we don't know how much discussion is necessary for that, removing
dclk_source in the first iteration and re-add it once the feature.
Heiko
Hi Jacob,
Am Donnerstag, 13. Juli 2017, 00:03:51 CEST schrieb Jacob Chen:
> Add devicetree nodes for rk3399 VOP (Video Output Processors), and the
> top level display-subsystem root node.
>
> Later patches add endpoints (eDP, HDMI, MIPI, etc) that attach to the
> VOPs' output ports.
>
> Signed-off-by: Mark Yao <[email protected]>
> Signed-off-by: Yakir Yang <[email protected]>
> Signed-off-by: Caesar Wang <[email protected]>
> Signed-off-by: Jacob Chen <[email protected]>
you might want to reduce the number of Signed-offs a bit :-)
Also authorship needs to be fixed. I.e. first Signed-off for this patch
is from Mark, so in that case Mark probably also was the original author
and the patch should reflect that. General rule, topmost Signed-off is
of course from the original author.
Heiko
Hi heko,
2017-07-17 1:31 GMT+08:00 Heiko Stuebner <[email protected]>:
> Hi Jacob,
>
> Am Donnerstag, 13. Juli 2017, 00:03:51 CEST schrieb Jacob Chen:
>> Add devicetree nodes for rk3399 VOP (Video Output Processors), and the
>> top level display-subsystem root node.
>>
>> Later patches add endpoints (eDP, HDMI, MIPI, etc) that attach to the
>> VOPs' output ports.
>>
>> Signed-off-by: Mark Yao <[email protected]>
>> Signed-off-by: Yakir Yang <[email protected]>
>> Signed-off-by: Caesar Wang <[email protected]>
>> Signed-off-by: Jacob Chen <[email protected]>
>
> you might want to reduce the number of Signed-offs a bit :-)
>
> Also authorship needs to be fixed. I.e. first Signed-off for this patch
> is from Mark, so in that case Mark probably also was the original author
> and the patch should reflect that. General rule, topmost Signed-off is
> of course from the original author.
>
OK, get it.
>
> Heiko
>