The old code uses tcxo (19.2MHz) as watchdog clock but actually the
watchdog uses 32K clock, as result the watchdog timeout cannot be set
correctly and delay long time to reset SoC.
So this patch is to use 'ref32k' as clock source for watchdog.
Fixes: 72ea48610d43 ("clk: hi6220: Clock driver support for Hisilicon hi6220 SoC")
Signed-off-by: Leo Yan <[email protected]>
---
drivers/clk/hisilicon/clk-hi6220.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/hisilicon/clk-hi6220.c b/drivers/clk/hisilicon/clk-hi6220.c
index 4181b68..e786d71 100644
--- a/drivers/clk/hisilicon/clk-hi6220.c
+++ b/drivers/clk/hisilicon/clk-hi6220.c
@@ -55,9 +55,9 @@ static struct hisi_fixed_factor_clock hi6220_fixed_factor_clks[] __initdata = {
};
static struct hisi_gate_clock hi6220_separated_gate_clks_ao[] __initdata = {
- { HI6220_WDT0_PCLK, "wdt0_pclk", "clk_tcxo", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x630, 12, 0, },
- { HI6220_WDT1_PCLK, "wdt1_pclk", "clk_tcxo", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x630, 13, 0, },
- { HI6220_WDT2_PCLK, "wdt2_pclk", "clk_tcxo", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x630, 14, 0, },
+ { HI6220_WDT0_PCLK, "wdt0_pclk", "ref32k", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x630, 12, 0, },
+ { HI6220_WDT1_PCLK, "wdt1_pclk", "ref32k", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x630, 13, 0, },
+ { HI6220_WDT2_PCLK, "wdt2_pclk", "ref32k", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x630, 14, 0, },
{ HI6220_TIMER0_PCLK, "timer0_pclk", "clk_tcxo", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x630, 15, 0, },
{ HI6220_TIMER1_PCLK, "timer1_pclk", "clk_tcxo", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x630, 16, 0, },
{ HI6220_TIMER2_PCLK, "timer2_pclk", "clk_tcxo", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x630, 17, 0, },
--
2.7.4
From: Dmitry Shmidt <[email protected]>
This patch is to add watchdog binding for Hi6220 on Hikey board.
Signed-off-by: Dmitry Shmidt <[email protected]>
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index eacbe0d..77dc28f 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -809,6 +809,14 @@
pinctrl-1 = <&sdio_pmx_idle &sdio_clk_cfg_idle &sdio_cfg_idle>;
};
+ watchdog0: watchdog@f8005000 {
+ compatible = "arm,sp805-wdt", "arm,primecell";
+ reg = <0x0 0xf8005000 0x0 0x1000>;
+ interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ao_ctrl HI6220_WDT0_PCLK>;
+ clock-names = "apb_pclk";
+ };
+
tsensor: tsensor@0,f7030700 {
compatible = "hisilicon,tsensor";
reg = <0x0 0xf7030700 0x0 0x1000>;
--
2.7.4
On 08/29, Leo Yan wrote:
> From: Dmitry Shmidt <[email protected]>
>
> This patch is to add watchdog binding for Hi6220 on Hikey board.
>
> Signed-off-by: Dmitry Shmidt <[email protected]>
> ---
This will go through arm-soc?
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
On 08/29, Leo Yan wrote:
> The old code uses tcxo (19.2MHz) as watchdog clock but actually the
> watchdog uses 32K clock, as result the watchdog timeout cannot be set
> correctly and delay long time to reset SoC.
>
> So this patch is to use 'ref32k' as clock source for watchdog.
>
> Fixes: 72ea48610d43 ("clk: hi6220: Clock driver support for Hisilicon hi6220 SoC")
> Signed-off-by: Leo Yan <[email protected]>
> ---
Applied to clk-next
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
On Thu, Aug 31, 2017 at 06:32:40PM -0700, Stephen Boyd wrote:
> On 08/29, Leo Yan wrote:
> > The old code uses tcxo (19.2MHz) as watchdog clock but actually the
> > watchdog uses 32K clock, as result the watchdog timeout cannot be set
> > correctly and delay long time to reset SoC.
> >
> > So this patch is to use 'ref32k' as clock source for watchdog.
> >
> > Fixes: 72ea48610d43 ("clk: hi6220: Clock driver support for Hisilicon hi6220 SoC")
> > Signed-off-by: Leo Yan <[email protected]>
> > ---
>
> Applied to clk-next
Thanks, Stephen.
> --
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
> a Linux Foundation Collaborative Project
Hi Stephen,
On 2017/9/1 2:32, Stephen Boyd wrote:
> On 08/29, Leo Yan wrote:
>> From: Dmitry Shmidt <[email protected]>
>>
>> This patch is to add watchdog binding for Hi6220 on Hikey board.
>>
>> Signed-off-by: Dmitry Shmidt <[email protected]>
>> ---
>
> This will go through arm-soc?
>
Can you pick up it for v4.14?
Otherwise I am fine to pick up it and queue for v4.15.
Thanks!
Best Regards,
Wei
On 09/01, Wei Xu wrote:
> Hi Stephen,
>
> On 2017/9/1 2:32, Stephen Boyd wrote:
> > On 08/29, Leo Yan wrote:
> >> From: Dmitry Shmidt <[email protected]>
> >>
> >> This patch is to add watchdog binding for Hi6220 on Hikey board.
> >>
> >> Signed-off-by: Dmitry Shmidt <[email protected]>
> >> ---
> >
> > This will go through arm-soc?
> >
>
> Can you pick up it for v4.14?
> Otherwise I am fine to pick up it and queue for v4.15.
Sounds like it will go for v4.15. Otherwise, you can send it to
arm-soc with the raw number instead of #define number and then
fix it up to use the #define later.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
Hi Stephen,
On 2017/9/1 21:28, Stephen Boyd wrote:
> On 09/01, Wei Xu wrote:
>> Hi Stephen,
>>
>> On 2017/9/1 2:32, Stephen Boyd wrote:
>>> On 08/29, Leo Yan wrote:
>>>> From: Dmitry Shmidt <[email protected]>
>>>>
>>>> This patch is to add watchdog binding for Hi6220 on Hikey board.
>>>>
>>>> Signed-off-by: Dmitry Shmidt <[email protected]>
>>>> ---
>>>
>>> This will go through arm-soc?
>>>
>>
>> Can you pick up it for v4.14?
>> Otherwise I am fine to pick up it and queue for v4.15.
>
> Sounds like it will go for v4.15. Otherwise, you can send it to
> arm-soc with the raw number instead of #define number and then
> fix it up to use the #define later.
>
I did not get your meaning.
Do you mean the "HI6220_WDT0/1/2_PCLK" in the patch 1 that
we need to replace with raw number?
They are already in the mainline.
Best Regards,
Wei