Mirror pci-rt3883 fix from commit e5067c718b3a ("MIPS: pci-rt3883:
Remove odd locking in PCI config space access code"). pci-rt2880 shares
the driver layout with pci-rt3883 and the same reasons apply.
Caller (generic PCI code) already does proper locking, so no need to add
another one here. Local PCI read/write functions are never called
simultaneously, also they do not require synchronization with the PCI
controller ops, since they are used before the controller registration.
Suggested-by: Sergey Ryazanov <[email protected]>
Signed-off-by: Ilya Lipnitskiy <[email protected]>
---
arch/mips/pci/pci-rt2880.c | 13 -------------
1 file changed, 13 deletions(-)
diff --git a/arch/mips/pci/pci-rt2880.c b/arch/mips/pci/pci-rt2880.c
index 19f7860fb28b..b4ee07cbcf2a 100644
--- a/arch/mips/pci/pci-rt2880.c
+++ b/arch/mips/pci/pci-rt2880.c
@@ -41,7 +41,6 @@
#define RT2880_PCI_REG_ARBCTL 0x80
static void __iomem *rt2880_pci_base;
-static DEFINE_SPINLOCK(rt2880_pci_lock);
static u32 rt2880_pci_reg_read(u32 reg)
{
@@ -63,7 +62,6 @@ static inline u32 rt2880_pci_get_cfgaddr(unsigned int bus, unsigned int slot,
static int rt2880_pci_config_read(struct pci_bus *bus, unsigned int devfn,
int where, int size, u32 *val)
{
- unsigned long flags;
u32 address;
u32 data;
int busn = 0;
@@ -74,10 +72,8 @@ static int rt2880_pci_config_read(struct pci_bus *bus, unsigned int devfn,
address = rt2880_pci_get_cfgaddr(busn, PCI_SLOT(devfn), PCI_FUNC(devfn),
where);
- spin_lock_irqsave(&rt2880_pci_lock, flags);
rt2880_pci_reg_write(address, RT2880_PCI_REG_CONFIG_ADDR);
data = rt2880_pci_reg_read(RT2880_PCI_REG_CONFIG_DATA);
- spin_unlock_irqrestore(&rt2880_pci_lock, flags);
switch (size) {
case 1:
@@ -97,7 +93,6 @@ static int rt2880_pci_config_read(struct pci_bus *bus, unsigned int devfn,
static int rt2880_pci_config_write(struct pci_bus *bus, unsigned int devfn,
int where, int size, u32 val)
{
- unsigned long flags;
u32 address;
u32 data;
int busn = 0;
@@ -108,7 +103,6 @@ static int rt2880_pci_config_write(struct pci_bus *bus, unsigned int devfn,
address = rt2880_pci_get_cfgaddr(busn, PCI_SLOT(devfn), PCI_FUNC(devfn),
where);
- spin_lock_irqsave(&rt2880_pci_lock, flags);
rt2880_pci_reg_write(address, RT2880_PCI_REG_CONFIG_ADDR);
data = rt2880_pci_reg_read(RT2880_PCI_REG_CONFIG_DATA);
@@ -127,7 +121,6 @@ static int rt2880_pci_config_write(struct pci_bus *bus, unsigned int devfn,
}
rt2880_pci_reg_write(data, RT2880_PCI_REG_CONFIG_DATA);
- spin_unlock_irqrestore(&rt2880_pci_lock, flags);
return PCIBIOS_SUCCESSFUL;
}
@@ -159,31 +152,25 @@ static struct pci_controller rt2880_pci_controller = {
static inline u32 rt2880_pci_read_u32(unsigned long reg)
{
- unsigned long flags;
u32 address;
u32 ret;
address = rt2880_pci_get_cfgaddr(0, 0, 0, reg);
- spin_lock_irqsave(&rt2880_pci_lock, flags);
rt2880_pci_reg_write(address, RT2880_PCI_REG_CONFIG_ADDR);
ret = rt2880_pci_reg_read(RT2880_PCI_REG_CONFIG_DATA);
- spin_unlock_irqrestore(&rt2880_pci_lock, flags);
return ret;
}
static inline void rt2880_pci_write_u32(unsigned long reg, u32 val)
{
- unsigned long flags;
u32 address;
address = rt2880_pci_get_cfgaddr(0, 0, 0, reg);
- spin_lock_irqsave(&rt2880_pci_lock, flags);
rt2880_pci_reg_write(address, RT2880_PCI_REG_CONFIG_ADDR);
rt2880_pci_reg_write(val, RT2880_PCI_REG_CONFIG_DATA);
- spin_unlock_irqrestore(&rt2880_pci_lock, flags);
}
int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
--
2.31.1
Hello Ilya,
On Tue, Apr 13, 2021 at 9:22 AM Ilya Lipnitskiy
<[email protected]> wrote:
> Mirror pci-rt3883 fix from commit e5067c718b3a ("MIPS: pci-rt3883:
> Remove odd locking in PCI config space access code"). pci-rt2880 shares
> the driver layout with pci-rt3883 and the same reasons apply.
>
> Caller (generic PCI code) already does proper locking, so no need to add
> another one here. Local PCI read/write functions are never called
> simultaneously, also they do not require synchronization with the PCI
> controller ops, since they are used before the controller registration.
>
> Suggested-by: Sergey Ryazanov <[email protected]>
> Signed-off-by: Ilya Lipnitskiy <[email protected]>
> ---
> arch/mips/pci/pci-rt2880.c | 13 -------------
> 1 file changed, 13 deletions(-)
>
> diff --git a/arch/mips/pci/pci-rt2880.c b/arch/mips/pci/pci-rt2880.c
> index 19f7860fb28b..b4ee07cbcf2a 100644
> --- a/arch/mips/pci/pci-rt2880.c
> +++ b/arch/mips/pci/pci-rt2880.c
> @@ -41,7 +41,6 @@
> #define RT2880_PCI_REG_ARBCTL 0x80
>
> static void __iomem *rt2880_pci_base;
> -static DEFINE_SPINLOCK(rt2880_pci_lock);
>
> static u32 rt2880_pci_reg_read(u32 reg)
> {
> @@ -63,7 +62,6 @@ static inline u32 rt2880_pci_get_cfgaddr(unsigned int bus, unsigned int slot,
> static int rt2880_pci_config_read(struct pci_bus *bus, unsigned int devfn,
> int where, int size, u32 *val)
> {
> - unsigned long flags;
> u32 address;
> u32 data;
> int busn = 0;
> @@ -74,10 +72,8 @@ static int rt2880_pci_config_read(struct pci_bus *bus, unsigned int devfn,
> address = rt2880_pci_get_cfgaddr(busn, PCI_SLOT(devfn), PCI_FUNC(devfn),
> where);
>
> - spin_lock_irqsave(&rt2880_pci_lock, flags);
> rt2880_pci_reg_write(address, RT2880_PCI_REG_CONFIG_ADDR);
> data = rt2880_pci_reg_read(RT2880_PCI_REG_CONFIG_DATA);
> - spin_unlock_irqrestore(&rt2880_pci_lock, flags);
>
> switch (size) {
> case 1:
> @@ -97,7 +93,6 @@ static int rt2880_pci_config_read(struct pci_bus *bus, unsigned int devfn,
> static int rt2880_pci_config_write(struct pci_bus *bus, unsigned int devfn,
> int where, int size, u32 val)
> {
> - unsigned long flags;
> u32 address;
> u32 data;
> int busn = 0;
> @@ -108,7 +103,6 @@ static int rt2880_pci_config_write(struct pci_bus *bus, unsigned int devfn,
> address = rt2880_pci_get_cfgaddr(busn, PCI_SLOT(devfn), PCI_FUNC(devfn),
> where);
>
> - spin_lock_irqsave(&rt2880_pci_lock, flags);
> rt2880_pci_reg_write(address, RT2880_PCI_REG_CONFIG_ADDR);
> data = rt2880_pci_reg_read(RT2880_PCI_REG_CONFIG_DATA);
>
> @@ -127,7 +121,6 @@ static int rt2880_pci_config_write(struct pci_bus *bus, unsigned int devfn,
> }
>
> rt2880_pci_reg_write(data, RT2880_PCI_REG_CONFIG_DATA);
> - spin_unlock_irqrestore(&rt2880_pci_lock, flags);
>
> return PCIBIOS_SUCCESSFUL;
> }
> @@ -159,31 +152,25 @@ static struct pci_controller rt2880_pci_controller = {
>
> static inline u32 rt2880_pci_read_u32(unsigned long reg)
> {
> - unsigned long flags;
> u32 address;
> u32 ret;
>
> address = rt2880_pci_get_cfgaddr(0, 0, 0, reg);
>
> - spin_lock_irqsave(&rt2880_pci_lock, flags);
> rt2880_pci_reg_write(address, RT2880_PCI_REG_CONFIG_ADDR);
> ret = rt2880_pci_reg_read(RT2880_PCI_REG_CONFIG_DATA);
> - spin_unlock_irqrestore(&rt2880_pci_lock, flags);
>
> return ret;
> }
>
> static inline void rt2880_pci_write_u32(unsigned long reg, u32 val)
> {
> - unsigned long flags;
> u32 address;
>
> address = rt2880_pci_get_cfgaddr(0, 0, 0, reg);
>
> - spin_lock_irqsave(&rt2880_pci_lock, flags);
> rt2880_pci_reg_write(address, RT2880_PCI_REG_CONFIG_ADDR);
> rt2880_pci_reg_write(val, RT2880_PCI_REG_CONFIG_DATA);
> - spin_unlock_irqrestore(&rt2880_pci_lock, flags);
> }
>
> int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
RT2880 PCI driver calls rt2880_pci_write_u32()/rt2880_pci_read_u32()
from pcibios_map_irq(), which is called outside the scope of the
pci_lock spinlock that is defined in /drivers/pci/access.c. So it
looks like this could lead to a race between
rt2880_pci_write_u32()/rt2880_pci_read_u32() and
rt2880_pci_config_read()/rt2880_pci_config_write() functions.
The code that uses rt2880_pci_write_u32()/rt2880_pci_read_u32() in the
pcibios_map_irq() duplicates a BAR initialization procedure, which is
already performed by the rt288x_pci_probe().
Maybe we should remove duplicated code in the pcibios_map_irq() to
reduce duplication and to avoid possible race in configuration space
access?
If you fix this possible race, feel free to add in the next patch version my
Reviewed-by: Sergey Ryazanov <[email protected]>
--
Sergey
On Tue, Apr 13, 2021 at 4:28 PM Sergey Ryazanov <[email protected]> wrote:
> On Tue, Apr 13, 2021 at 9:22 AM Ilya Lipnitskiy
> <[email protected]> wrote:
> > Mirror pci-rt3883 fix from commit e5067c718b3a ("MIPS: pci-rt3883:
> > Remove odd locking in PCI config space access code"). pci-rt2880 shares
> > the driver layout with pci-rt3883 and the same reasons apply.
> >
> > Caller (generic PCI code) already does proper locking, so no need to add
> > another one here. Local PCI read/write functions are never called
> > simultaneously, also they do not require synchronization with the PCI
> > controller ops, since they are used before the controller registration.
> >
> > Suggested-by: Sergey Ryazanov <[email protected]>
> > Signed-off-by: Ilya Lipnitskiy <[email protected]>
> > ---
> > arch/mips/pci/pci-rt2880.c | 13 -------------
> > 1 file changed, 13 deletions(-)
> >
> > diff --git a/arch/mips/pci/pci-rt2880.c b/arch/mips/pci/pci-rt2880.c
> > index 19f7860fb28b..b4ee07cbcf2a 100644
> > --- a/arch/mips/pci/pci-rt2880.c
> > +++ b/arch/mips/pci/pci-rt2880.c
> > @@ -41,7 +41,6 @@
> > #define RT2880_PCI_REG_ARBCTL 0x80
> >
> > static void __iomem *rt2880_pci_base;
> > -static DEFINE_SPINLOCK(rt2880_pci_lock);
> >
> > static u32 rt2880_pci_reg_read(u32 reg)
> > {
> > @@ -63,7 +62,6 @@ static inline u32 rt2880_pci_get_cfgaddr(unsigned int bus, unsigned int slot,
> > static int rt2880_pci_config_read(struct pci_bus *bus, unsigned int devfn,
> > int where, int size, u32 *val)
> > {
> > - unsigned long flags;
> > u32 address;
> > u32 data;
> > int busn = 0;
> > @@ -74,10 +72,8 @@ static int rt2880_pci_config_read(struct pci_bus *bus, unsigned int devfn,
> > address = rt2880_pci_get_cfgaddr(busn, PCI_SLOT(devfn), PCI_FUNC(devfn),
> > where);
> >
> > - spin_lock_irqsave(&rt2880_pci_lock, flags);
> > rt2880_pci_reg_write(address, RT2880_PCI_REG_CONFIG_ADDR);
> > data = rt2880_pci_reg_read(RT2880_PCI_REG_CONFIG_DATA);
> > - spin_unlock_irqrestore(&rt2880_pci_lock, flags);
> >
> > switch (size) {
> > case 1:
> > @@ -97,7 +93,6 @@ static int rt2880_pci_config_read(struct pci_bus *bus, unsigned int devfn,
> > static int rt2880_pci_config_write(struct pci_bus *bus, unsigned int devfn,
> > int where, int size, u32 val)
> > {
> > - unsigned long flags;
> > u32 address;
> > u32 data;
> > int busn = 0;
> > @@ -108,7 +103,6 @@ static int rt2880_pci_config_write(struct pci_bus *bus, unsigned int devfn,
> > address = rt2880_pci_get_cfgaddr(busn, PCI_SLOT(devfn), PCI_FUNC(devfn),
> > where);
> >
> > - spin_lock_irqsave(&rt2880_pci_lock, flags);
> > rt2880_pci_reg_write(address, RT2880_PCI_REG_CONFIG_ADDR);
> > data = rt2880_pci_reg_read(RT2880_PCI_REG_CONFIG_DATA);
> >
> > @@ -127,7 +121,6 @@ static int rt2880_pci_config_write(struct pci_bus *bus, unsigned int devfn,
> > }
> >
> > rt2880_pci_reg_write(data, RT2880_PCI_REG_CONFIG_DATA);
> > - spin_unlock_irqrestore(&rt2880_pci_lock, flags);
> >
> > return PCIBIOS_SUCCESSFUL;
> > }
> > @@ -159,31 +152,25 @@ static struct pci_controller rt2880_pci_controller = {
> >
> > static inline u32 rt2880_pci_read_u32(unsigned long reg)
> > {
> > - unsigned long flags;
> > u32 address;
> > u32 ret;
> >
> > address = rt2880_pci_get_cfgaddr(0, 0, 0, reg);
> >
> > - spin_lock_irqsave(&rt2880_pci_lock, flags);
> > rt2880_pci_reg_write(address, RT2880_PCI_REG_CONFIG_ADDR);
> > ret = rt2880_pci_reg_read(RT2880_PCI_REG_CONFIG_DATA);
> > - spin_unlock_irqrestore(&rt2880_pci_lock, flags);
> >
> > return ret;
> > }
> >
> > static inline void rt2880_pci_write_u32(unsigned long reg, u32 val)
> > {
> > - unsigned long flags;
> > u32 address;
> >
> > address = rt2880_pci_get_cfgaddr(0, 0, 0, reg);
> >
> > - spin_lock_irqsave(&rt2880_pci_lock, flags);
> > rt2880_pci_reg_write(address, RT2880_PCI_REG_CONFIG_ADDR);
> > rt2880_pci_reg_write(val, RT2880_PCI_REG_CONFIG_DATA);
> > - spin_unlock_irqrestore(&rt2880_pci_lock, flags);
> > }
> >
> > int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
>
> RT2880 PCI driver calls rt2880_pci_write_u32()/rt2880_pci_read_u32()
> from pcibios_map_irq(), which is called outside the scope of the
> pci_lock spinlock that is defined in /drivers/pci/access.c. So it
> looks like this could lead to a race between
> rt2880_pci_write_u32()/rt2880_pci_read_u32() and
> rt2880_pci_config_read()/rt2880_pci_config_write() functions.
>
> The code that uses rt2880_pci_write_u32()/rt2880_pci_read_u32() in the
> pcibios_map_irq() duplicates a BAR initialization procedure, which is
> already performed by the rt288x_pci_probe().
>
> Maybe we should remove duplicated code in the pcibios_map_irq() to
> reduce duplication and to avoid possible race in configuration space
> access?
>
> If you fix this possible race, feel free to add in the next patch version my
> Reviewed-by: Sergey Ryazanov <[email protected]>
Whoops, I just checked the whole series on the patchwork and realized
that you already removed this duplicated code in the first patch of
the series. In such a case this patch is Ok. Sorry for bothering.
Reviewed-by: Sergey Ryazanov <[email protected]>
--
Sergey
Hi Sergey,
On Tue, Apr 13, 2021 at 6:40 AM Sergey Ryazanov <[email protected]> wrote:
>
> On Tue, Apr 13, 2021 at 4:28 PM Sergey Ryazanov <[email protected]> wrote:
> > On Tue, Apr 13, 2021 at 9:22 AM Ilya Lipnitskiy
> > <[email protected]> wrote:
> > > Mirror pci-rt3883 fix from commit e5067c718b3a ("MIPS: pci-rt3883:
> > > Remove odd locking in PCI config space access code"). pci-rt2880 shares
> > > the driver layout with pci-rt3883 and the same reasons apply.
> > >
> > > Caller (generic PCI code) already does proper locking, so no need to add
> > > another one here. Local PCI read/write functions are never called
> > > simultaneously, also they do not require synchronization with the PCI
> > > controller ops, since they are used before the controller registration.
> > >
> > > Suggested-by: Sergey Ryazanov <[email protected]>
> > > Signed-off-by: Ilya Lipnitskiy <[email protected]>
> > > ---
> > > arch/mips/pci/pci-rt2880.c | 13 -------------
> > > 1 file changed, 13 deletions(-)
> > >
> > > diff --git a/arch/mips/pci/pci-rt2880.c b/arch/mips/pci/pci-rt2880.c
> > > index 19f7860fb28b..b4ee07cbcf2a 100644
> > > --- a/arch/mips/pci/pci-rt2880.c
> > > +++ b/arch/mips/pci/pci-rt2880.c
> > > @@ -41,7 +41,6 @@
> > > #define RT2880_PCI_REG_ARBCTL 0x80
> > >
> > > static void __iomem *rt2880_pci_base;
> > > -static DEFINE_SPINLOCK(rt2880_pci_lock);
> > >
> > > static u32 rt2880_pci_reg_read(u32 reg)
> > > {
> > > @@ -63,7 +62,6 @@ static inline u32 rt2880_pci_get_cfgaddr(unsigned int bus, unsigned int slot,
> > > static int rt2880_pci_config_read(struct pci_bus *bus, unsigned int devfn,
> > > int where, int size, u32 *val)
> > > {
> > > - unsigned long flags;
> > > u32 address;
> > > u32 data;
> > > int busn = 0;
> > > @@ -74,10 +72,8 @@ static int rt2880_pci_config_read(struct pci_bus *bus, unsigned int devfn,
> > > address = rt2880_pci_get_cfgaddr(busn, PCI_SLOT(devfn), PCI_FUNC(devfn),
> > > where);
> > >
> > > - spin_lock_irqsave(&rt2880_pci_lock, flags);
> > > rt2880_pci_reg_write(address, RT2880_PCI_REG_CONFIG_ADDR);
> > > data = rt2880_pci_reg_read(RT2880_PCI_REG_CONFIG_DATA);
> > > - spin_unlock_irqrestore(&rt2880_pci_lock, flags);
> > >
> > > switch (size) {
> > > case 1:
> > > @@ -97,7 +93,6 @@ static int rt2880_pci_config_read(struct pci_bus *bus, unsigned int devfn,
> > > static int rt2880_pci_config_write(struct pci_bus *bus, unsigned int devfn,
> > > int where, int size, u32 val)
> > > {
> > > - unsigned long flags;
> > > u32 address;
> > > u32 data;
> > > int busn = 0;
> > > @@ -108,7 +103,6 @@ static int rt2880_pci_config_write(struct pci_bus *bus, unsigned int devfn,
> > > address = rt2880_pci_get_cfgaddr(busn, PCI_SLOT(devfn), PCI_FUNC(devfn),
> > > where);
> > >
> > > - spin_lock_irqsave(&rt2880_pci_lock, flags);
> > > rt2880_pci_reg_write(address, RT2880_PCI_REG_CONFIG_ADDR);
> > > data = rt2880_pci_reg_read(RT2880_PCI_REG_CONFIG_DATA);
> > >
> > > @@ -127,7 +121,6 @@ static int rt2880_pci_config_write(struct pci_bus *bus, unsigned int devfn,
> > > }
> > >
> > > rt2880_pci_reg_write(data, RT2880_PCI_REG_CONFIG_DATA);
> > > - spin_unlock_irqrestore(&rt2880_pci_lock, flags);
> > >
> > > return PCIBIOS_SUCCESSFUL;
> > > }
> > > @@ -159,31 +152,25 @@ static struct pci_controller rt2880_pci_controller = {
> > >
> > > static inline u32 rt2880_pci_read_u32(unsigned long reg)
> > > {
> > > - unsigned long flags;
> > > u32 address;
> > > u32 ret;
> > >
> > > address = rt2880_pci_get_cfgaddr(0, 0, 0, reg);
> > >
> > > - spin_lock_irqsave(&rt2880_pci_lock, flags);
> > > rt2880_pci_reg_write(address, RT2880_PCI_REG_CONFIG_ADDR);
> > > ret = rt2880_pci_reg_read(RT2880_PCI_REG_CONFIG_DATA);
> > > - spin_unlock_irqrestore(&rt2880_pci_lock, flags);
> > >
> > > return ret;
> > > }
> > >
> > > static inline void rt2880_pci_write_u32(unsigned long reg, u32 val)
> > > {
> > > - unsigned long flags;
> > > u32 address;
> > >
> > > address = rt2880_pci_get_cfgaddr(0, 0, 0, reg);
> > >
> > > - spin_lock_irqsave(&rt2880_pci_lock, flags);
> > > rt2880_pci_reg_write(address, RT2880_PCI_REG_CONFIG_ADDR);
> > > rt2880_pci_reg_write(val, RT2880_PCI_REG_CONFIG_DATA);
> > > - spin_unlock_irqrestore(&rt2880_pci_lock, flags);
> > > }
> > >
> > > int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
> >
> > RT2880 PCI driver calls rt2880_pci_write_u32()/rt2880_pci_read_u32()
> > from pcibios_map_irq(), which is called outside the scope of the
> > pci_lock spinlock that is defined in /drivers/pci/access.c. So it
> > looks like this could lead to a race between
> > rt2880_pci_write_u32()/rt2880_pci_read_u32() and
> > rt2880_pci_config_read()/rt2880_pci_config_write() functions.
> >
> > The code that uses rt2880_pci_write_u32()/rt2880_pci_read_u32() in the
> > pcibios_map_irq() duplicates a BAR initialization procedure, which is
> > already performed by the rt288x_pci_probe().
> >
> > Maybe we should remove duplicated code in the pcibios_map_irq() to
> > reduce duplication and to avoid possible race in configuration space
> > access?
> >
> > If you fix this possible race, feel free to add in the next patch version my
> > Reviewed-by: Sergey Ryazanov <[email protected]>
>
> Whoops, I just checked the whole series on the patchwork and realized
> that you already removed this duplicated code in the first patch of
> the series. In such a case this patch is Ok. Sorry for bothering.
Thanks for your prompt review. I think you may still have a point,
since I do call rt2880_pci_{read,write}_u32 and
rt2880_pci_config_{read,write} from pcibios_plat_dev_init, which
happens after PCI bus enumeration. I think I can rework it to make it
cleaner and use pci_{read,write}_config_byte.
I will respin the series soon.
Ilya