P2020 also contains Power Management Controller and their registers at
offset 0xe0070 compatible with mpc8548. So add PMC node into DTS include
file fsl/p2020si-post.dtsi
Signed-off-by: Pali Rohár <[email protected]>
---
arch/powerpc/boot/dts/fsl/p2020si-post.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi b/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi
index 6345629524fe..81b9ab2119be 100644
--- a/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi
@@ -201,4 +201,9 @@
reg = <0xe0000 0x1000>;
fsl,has-rstcr;
};
+
+ pmc: power@e0070 {
+ compatible = "fsl,mpc8548-pmc";
+ reg = <0xe0070 0x20>;
+ };
};
--
2.20.1
On Friday 06 May 2022 22:36:21 Pali Rohár wrote:
> P2020 also contains Power Management Controller and their registers at
> offset 0xe0070 compatible with mpc8548. So add PMC node into DTS include
> file fsl/p2020si-post.dtsi
PING?
> Signed-off-by: Pali Rohár <[email protected]>
> ---
> arch/powerpc/boot/dts/fsl/p2020si-post.dtsi | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi b/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi
> index 6345629524fe..81b9ab2119be 100644
> --- a/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi
> @@ -201,4 +201,9 @@
> reg = <0xe0000 0x1000>;
> fsl,has-rstcr;
> };
> +
> + pmc: power@e0070 {
> + compatible = "fsl,mpc8548-pmc";
> + reg = <0xe0070 0x20>;
> + };
> };
> --
> 2.20.1
>