2023-06-24 11:46:47

by Jonas Gorski

[permalink] [raw]
Subject: [PATCH] bus: ixp4xx: fix IXP4XX_EXP_T1_MASK

The IXP4XX_EXP_T1_MASK was shifted one bit to the right, overlapping
IXP4XX_EXP_T2_MASK and leaving bit 29 unused. The offset being wrong is
also confirmed at least by the datasheet of IXP45X/46X [1].

Fix this by aligning it to IXP4XX_EXP_T1_SHIFT.

[1] https://www.intel.com/content/dam/www/public/us/en/documents/manuals/ixp45x-ixp46x-developers-manual.pdf

Fixes: 1c953bda90ca ("bus: ixp4xx: Add a driver for IXP4xx expansion bus")
Signed-off-by: Jonas Gorski <[email protected]>
---
Based on 4.6-rc7-ish, since I didn't know which tree I should use,
though for this driver it probably doesn't matter anyway.

Build tested, but not run tested.

@Linus

I found this purely by accident when I was looking for examples of
GENMASK(). Your recent push to resurrect ixp4xx in OpenWrt convinced me
to submit it in a timely manner ;D

Also the "ARM/INTEL IXP4XX ARM ARCHITECTURE" entry in MAINTAINERS still
lists your kernel.org email address, you might want to update that.

@Imre

Likewise, it still has your openwrt.org address.

drivers/bus/intel-ixp4xx-eb.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/bus/intel-ixp4xx-eb.c b/drivers/bus/intel-ixp4xx-eb.c
index f5ba6bee6fd8..320cf307db05 100644
--- a/drivers/bus/intel-ixp4xx-eb.c
+++ b/drivers/bus/intel-ixp4xx-eb.c
@@ -33,7 +33,7 @@
#define IXP4XX_EXP_TIMING_STRIDE 0x04
#define IXP4XX_EXP_CS_EN BIT(31)
#define IXP456_EXP_PAR_EN BIT(30) /* Only on IXP45x and IXP46x */
-#define IXP4XX_EXP_T1_MASK GENMASK(28, 27)
+#define IXP4XX_EXP_T1_MASK GENMASK(29, 28)
#define IXP4XX_EXP_T1_SHIFT 28
#define IXP4XX_EXP_T2_MASK GENMASK(27, 26)
#define IXP4XX_EXP_T2_SHIFT 26
--
2.34.1



2023-06-24 12:24:06

by Linus Walleij

[permalink] [raw]
Subject: Re: [PATCH] bus: ixp4xx: fix IXP4XX_EXP_T1_MASK

On Sat, Jun 24, 2023 at 1:30 PM Jonas Gorski <[email protected]> wrote:

> The IXP4XX_EXP_T1_MASK was shifted one bit to the right, overlapping
> IXP4XX_EXP_T2_MASK and leaving bit 29 unused. The offset being wrong is
> also confirmed at least by the datasheet of IXP45X/46X [1].
>
> Fix this by aligning it to IXP4XX_EXP_T1_SHIFT.
>
> [1] https://www.intel.com/content/dam/www/public/us/en/documents/manuals/ixp45x-ixp46x-developers-manual.pdf
>
> Fixes: 1c953bda90ca ("bus: ixp4xx: Add a driver for IXP4xx expansion bus")
> Signed-off-by: Jonas Gorski <[email protected]>

Yups that's a bug! (My typo...)

I'll funnel it upstream through the SoC tree.

Yours,
Linus Walleij