There are (at least) two platforms which have SEC < 5 but the new
RNG4 block. These platforms are BSC 9131 and BSC 9132 (that I know of
so far). Thus the condition in the caam driver which checks for the
version of the SEC block to decide if further initialization of the
RNG block is needed or not is not always correct. This set of patches
should fix this by adding support for retrieving the version of the
RNG block and executing the intialization of it depending if
it is greater or equal than 4.
Alex Porosanu (2):
crypto: caam - support for RNG version retrieval
crypto: caam - fix RNG init for SEC with RNG version greater than 4
drivers/crypto/caam/ctrl.c | 15 +++++++++++++--
drivers/crypto/caam/regs.h | 37 +++++++++++++++++++++++++++++++++++++
2 files changed, 50 insertions(+), 2 deletions(-)
--
1.7.7.6
For SEC including a RNG block with a version greater than 4,
special initialization must occur before any descriptor can be
submitted. Not only SEC with a version greater than 5.0 need
this, but also any SEC that has RNG block version ID greater
or equal to 4.
Example platforms: BSC 9131/9132 have SEC v4.4 but RNG 4
Signed-off-by: Alex Porosanu <[email protected]>
---
drivers/crypto/caam/ctrl.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c
index d5e6837..132b98a 100644
--- a/drivers/crypto/caam/ctrl.c
+++ b/drivers/crypto/caam/ctrl.c
@@ -305,10 +305,10 @@ static int caam_probe(struct platform_device *pdev)
}
/*
- * RNG4 based SECs (v5+) need special initialization prior
+ * RNG4 based SECs need special initialization prior
* to executing any descriptors
*/
- if (of_device_is_compatible(nprop, "fsl,sec-v5.0")) {
+ if (get_rng_vid(topregs) >= 4) {
kick_trng(pdev);
ret = instantiate_rng(ctrlpriv->jrdev[0]);
if (ret) {
--
1.7.7.6
This patch adds support for retrieving the version of the RNG
block inside the SEC. This is done by retrieving the corresponding
value from the the CHAVID register.
Signed-off-by: Alex Porosanu <[email protected]>
---
drivers/crypto/caam/ctrl.c | 11 +++++++++++
drivers/crypto/caam/regs.h | 37 +++++++++++++++++++++++++++++++++++++
2 files changed, 48 insertions(+), 0 deletions(-)
diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c
index bf20dd8..d5e6837 100644
--- a/drivers/crypto/caam/ctrl.c
+++ b/drivers/crypto/caam/ctrl.c
@@ -189,6 +189,17 @@ int caam_get_era(u64 caam_id)
}
EXPORT_SYMBOL(caam_get_era);
+/**
+ * get_rng_vid() - Return the version of the (T)RNG block of the SEC.
+ * @topregs - pointer to SEC register space
+ **/
+static inline u8 get_rng_vid(struct caam_full __iomem *topregs)
+{
+ u64 cha_vid = rd_reg64(&topregs->ctrl.perfmon.cha_id);
+
+ return (cha_vid & CHA_ID_RNG_MASK) >> CHA_ID_RNG_SHIFT;
+}
+
/* Probe routine for CAAM top (controller) level */
static int caam_probe(struct platform_device *pdev)
{
diff --git a/drivers/crypto/caam/regs.h b/drivers/crypto/caam/regs.h
index 3223fc6..f0af0bb 100644
--- a/drivers/crypto/caam/regs.h
+++ b/drivers/crypto/caam/regs.h
@@ -117,6 +117,43 @@ struct jr_outentry {
#define CHA_NUM_DECONUM_SHIFT 56
#define CHA_NUM_DECONUM_MASK (0xfull << CHA_NUM_DECONUM_SHIFT)
+/* CHA Version IDs */
+#define CHA_ID_AES_SHIFT 0
+#define CHA_ID_AES_MASK (0xfull << CHA_ID_AES_SHIFT)
+
+#define CHA_ID_DES_SHIFT 4
+#define CHA_ID_DES_MASK (0xfull << CHA_ID_DES_SHIFT)
+
+#define CHA_ID_ARC4_SHIFT 8
+#define CHA_ID_ARC4_MASK (0xfull << CHA_ID_ARC4_SHIFT)
+
+#define CHA_ID_MD_SHIFT 12
+#define CHA_ID_MD_MASK (0xfull << CHA_ID_MD_SHIFT)
+
+#define CHA_ID_RNG_SHIFT 16
+#define CHA_ID_RNG_MASK (0xfull << CHA_ID_RNG_SHIFT)
+
+#define CHA_ID_SNW8_SHIFT 20
+#define CHA_ID_SNW8_MASK (0xfull << CHA_ID_SNW8_SHIFT)
+
+#define CHA_ID_KAS_SHIFT 24
+#define CHA_ID_KAS_MASK (0xfull << CHA_ID_KAS_SHIFT)
+
+#define CHA_ID_PK_SHIFT 28
+#define CHA_ID_PK_MASK (0xfull << CHA_ID_PK_SHIFT)
+
+#define CHA_ID_CRC_SHIFT 32
+#define CHA_ID_CRC_MASK (0xfull << CHA_ID_CRC_SHIFT)
+
+#define CHA_ID_SNW9_SHIFT 36
+#define CHA_ID_SNW9_MASK (0xfull << CHA_ID_SNW9_SHIFT)
+
+#define CHA_ID_DECO_SHIFT 56
+#define CHA_ID_DECO_MASK (0xfull << CHA_ID_DECO_SHIFT)
+
+#define CHA_ID_JR_SHIFT 60
+#define CHA_ID_JR_MASK (0xfull << CHA_ID_JR_SHIFT)
+
struct sec_vid {
u16 ip_id;
u8 maj_rev;
--
1.7.7.6