This adds support for the Imagination Technologies hash
accelerator that provides hardware acceleration for
SHA1 SHA224 SHA256 and MD5 Hashes.
This hardware is present in the upcoming Pistachio SoC.
James Hartley (2):
crypto: Add Imagination Technologies hw hash accelerator
Documentation: crypto: Add DT binding info for the img hw hash
accelerator
.../devicetree/bindings/crypto/img-hash.txt | 28 +
MAINTAINERS | 5 +
drivers/crypto/Kconfig | 13 +
drivers/crypto/Makefile | 1 +
drivers/crypto/img-hash.c | 1048 ++++++++++++++++++++
5 files changed, 1095 insertions(+)
create mode 100644 Documentation/devicetree/bindings/crypto/img-hash.txt
create mode 100644 drivers/crypto/img-hash.c
--
1.7.9.5
Signed-off-by: James Hartley <[email protected]>
---
.../devicetree/bindings/crypto/img-hash.txt | 28 ++++++++++++++++++++
1 file changed, 28 insertions(+)
create mode 100644 Documentation/devicetree/bindings/crypto/img-hash.txt
diff --git a/Documentation/devicetree/bindings/crypto/img-hash.txt b/Documentation/devicetree/bindings/crypto/img-hash.txt
new file mode 100644
index 0000000..94d789c
--- /dev/null
+++ b/Documentation/devicetree/bindings/crypto/img-hash.txt
@@ -0,0 +1,28 @@
+* Imagination Technologies Ltd. Hash Accelerator
+
+The hash accelerator provides hardware hashing acceleration for
+SHA1, SHA224, SHA256 and MD5 hashes
+
+Required properties:
+
+- compatible : "img,img-hash-accelerator-rev1"
+- reg : Offset and length of the register set for the module, and the DMA port
+- interrupts : The designated IRQ line for the hashing module.
+- dmas : DMA specifier as per Documentation/devicetree/bindings/dma/dma.txt
+- dma-names : Should be "tx"
+- bus-addr : The bus address for the input data for hashing block
+- clocks : Clock specifier
+- clock-names : "hash_clk" Used to clock data through the accelerator
+
+Example:
+
+ hash: hash@18149600 {
+ compatible = "img,img-hash-accelerator-rev1";
+ reg = <0x18149600 0x100, 0x18101100 0x4>;
+ interrupts = <59 4 2>;
+ dmas = <&dma 8 0xffffffff>;
+ dma-names = "tx";
+ bus-addr = <0x18101100>;
+ clocks = <&hash_clk>;
+ clock-names = "hash_clk";
+ };
--
1.7.9.5
Hi James,
On Mon, Nov 10, 2014 at 4:10 AM, James Hartley <[email protected]> wrote:
> Signed-off-by: James Hartley <[email protected]>
A brief commit message describing the hardware and where it's found
would be nice.
> diff --git a/Documentation/devicetree/bindings/crypto/img-hash.txt b/Documentation/devicetree/bindings/crypto/img-hash.txt
> @@ -0,0 +1,28 @@
> +* Imagination Technologies Ltd. Hash Accelerator
> +
> +The hash accelerator provides hardware hashing acceleration for
> +SHA1, SHA224, SHA256 and MD5 hashes
> +
> +Required properties:
> +
> +- compatible : "img,img-hash-accelerator-rev1"
I know I mentioned in the internal review that it would be good to
have some sort of version indicator, but it looks like from the TRM
that the version is probable (CR_HASH_CORE_REV). If we expect probing
for the revision number to be sufficient, then perhaps "rev1" can be
dropped? Also, the second "img" is redundant.
> +- reg : Offset and length of the register set for the module, and the DMA port
> +- interrupts : The designated IRQ line for the hashing module.
> +- dmas : DMA specifier as per Documentation/devicetree/bindings/dma/dma.txt
> +- dma-names : Should be "tx"
> +- bus-addr : The bus address for the input data for hashing block
I think this can be dropped. This is the same as the second "reg"
entry above, is it not?
Hi Andrew
> -----Original Message-----
> From: [email protected] [mailto:[email protected]] On Behalf Of
> Andrew Bresticker
> Sent: 10 November 2014 17:30
> To: James Hartley
> Cc: [email protected]; [email protected]; Grant Likely; Rob
> Herring; [email protected]; Greg Kroah-Hartman;
> [email protected]; [email protected]; [email protected];
> [email protected]; [email protected];
> [email protected]; Pawel Moll; Mark Rutland; Ian Campbell; Kumar
> Gala; Ezequiel Garcia
> Subject: Re: [PATCH 2/2] Documentation: crypto: Add DT binding info for the
> img hw hash accelerator
>
> Hi James,
>
> On Mon, Nov 10, 2014 at 4:10 AM, James Hartley
> <[email protected]> wrote:
> > Signed-off-by: James Hartley <[email protected]>
>
> A brief commit message describing the hardware and where it's found would
> be nice.
>
> > diff --git a/Documentation/devicetree/bindings/crypto/img-hash.txt
> > b/Documentation/devicetree/bindings/crypto/img-hash.txt
>
> > @@ -0,0 +1,28 @@
> > +* Imagination Technologies Ltd. Hash Accelerator
> > +
> > +The hash accelerator provides hardware hashing acceleration for SHA1,
> > +SHA224, SHA256 and MD5 hashes
> > +
> > +Required properties:
> > +
> > +- compatible : "img,img-hash-accelerator-rev1"
>
> I know I mentioned in the internal review that it would be good to have
> some sort of version indicator, but it looks like from the TRM that the version
> is probable (CR_HASH_CORE_REV). If we expect probing for the revision
> number to be sufficient, then perhaps "rev1" can be dropped? Also, the
> second "img" is redundant.
Yes the core ID and versions are available, so I'll drop rev-1, and remove the second img.
>
> > +- reg : Offset and length of the register set for the module, and the
> > +DMA port
> > +- interrupts : The designated IRQ line for the hashing module.
> > +- dmas : DMA specifier as per
> > +Documentation/devicetree/bindings/dma/dma.txt
> > +- dma-names : Should be "tx"
> > +- bus-addr : The bus address for the input data for hashing block
>
> I think this can be dropped. This is the same as the second "reg"
> entry above, is it not?
Yes, that should not have made it through to the patch - it will be removed.
Thanks,
James.