Add slimSSS node to DT and crypto AES support for Exynos5433. Tested on
Exynos5433 board with crypto run-time self tests and with tcrypt with
command insmod tcrypt.ko mode=500 sec=1
Changes since v2:
- address Corentine Labbe note: add "const" to char* in declaration of
struct samsung_aes_variant
Changes since v1:
- address Krzysztof Kozlowski review: add missing comma in struct
definition, add goto for error code path, correct indentation,
in documentation add that Exynos5433 has both slimSSS and SSS IPs.
Kamil Konieczny (3):
arm64: dts: exynos: add SlimSSS for Exynos5433
dt-bindings: crypto: document Exynos5433 SlimSSS
crypto: s5p: add AES support for Exynos5433
.../bindings/crypto/samsung-sss.txt | 14 ++++--
arch/arm64/boot/dts/exynos/exynos5433.dtsi | 9 ++++
drivers/crypto/s5p-sss.c | 50 +++++++++++++++++--
3 files changed, 66 insertions(+), 7 deletions(-)
--
2.20.0
Add AES crypto HW acceleration for Exynos5433, with the help of SlimSSS IP.
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Kamil Konieczny <[email protected]>
---
drivers/crypto/s5p-sss.c | 50 ++++++++++++++++++++++++++++++++++++----
1 file changed, 46 insertions(+), 4 deletions(-)
diff --git a/drivers/crypto/s5p-sss.c b/drivers/crypto/s5p-sss.c
index 0064be0e3941..3f45cc5cb94a 100644
--- a/drivers/crypto/s5p-sss.c
+++ b/drivers/crypto/s5p-sss.c
@@ -232,6 +232,7 @@
* struct samsung_aes_variant - platform specific SSS driver data
* @aes_offset: AES register offset from SSS module's base.
* @hash_offset: HASH register offset from SSS module's base.
+ * @clk_names: names of clocks needed to run SSS IP
*
* Specifies platform specific configuration of SSS module.
* Note: A structure for driver specific platform data is used for future
@@ -240,6 +241,7 @@
struct samsung_aes_variant {
unsigned int aes_offset;
unsigned int hash_offset;
+ const char *clk_names[];
};
struct s5p_aes_reqctx {
@@ -296,6 +298,7 @@ struct s5p_aes_ctx {
struct s5p_aes_dev {
struct device *dev;
struct clk *clk;
+ struct clk *pclk;
void __iomem *ioaddr;
void __iomem *aes_ioaddr;
int irq_fc;
@@ -384,11 +387,19 @@ struct s5p_hash_ctx {
static const struct samsung_aes_variant s5p_aes_data = {
.aes_offset = 0x4000,
.hash_offset = 0x6000,
+ .clk_names = { "secss", },
};
static const struct samsung_aes_variant exynos_aes_data = {
.aes_offset = 0x200,
.hash_offset = 0x400,
+ .clk_names = { "secss", },
+};
+
+static const struct samsung_aes_variant exynos5433_slim_aes_data = {
+ .aes_offset = 0x400,
+ .hash_offset = 0x800,
+ .clk_names = { "pclk", "aclk", },
};
static const struct of_device_id s5p_sss_dt_match[] = {
@@ -400,6 +411,10 @@ static const struct of_device_id s5p_sss_dt_match[] = {
.compatible = "samsung,exynos4210-secss",
.data = &exynos_aes_data,
},
+ {
+ .compatible = "samsung,exynos5433-slim-sss",
+ .data = &exynos5433_slim_aes_data,
+ },
{ },
};
MODULE_DEVICE_TABLE(of, s5p_sss_dt_match);
@@ -2208,18 +2223,39 @@ static int s5p_aes_probe(struct platform_device *pdev)
return PTR_ERR(pdata->ioaddr);
}
- pdata->clk = devm_clk_get(dev, "secss");
+ pdata->clk = devm_clk_get(dev, variant->clk_names[0]);
if (IS_ERR(pdata->clk)) {
- dev_err(dev, "failed to find secss clock source\n");
+ dev_err(dev, "failed to find secss clock %s\n",
+ variant->clk_names[0]);
return -ENOENT;
}
err = clk_prepare_enable(pdata->clk);
if (err < 0) {
- dev_err(dev, "Enabling SSS clk failed, err %d\n", err);
+ dev_err(dev, "Enabling clock %s failed, err %d\n",
+ variant->clk_names[0], err);
return err;
}
+ if (variant->clk_names[1]) {
+ pdata->pclk = devm_clk_get(dev, variant->clk_names[1]);
+ if (IS_ERR(pdata->pclk)) {
+ dev_err(dev, "failed to find clock %s\n",
+ variant->clk_names[1]);
+ err = -ENOENT;
+ goto err_clk;
+ }
+
+ err = clk_prepare_enable(pdata->pclk);
+ if (err < 0) {
+ dev_err(dev, "Enabling clock %s failed, err %d\n",
+ variant->clk_names[0], err);
+ goto err_clk;
+ }
+ } else {
+ pdata->pclk = NULL;
+ }
+
spin_lock_init(&pdata->lock);
spin_lock_init(&pdata->hash_lock);
@@ -2295,8 +2331,11 @@ static int s5p_aes_probe(struct platform_device *pdev)
tasklet_kill(&pdata->tasklet);
err_irq:
- clk_disable_unprepare(pdata->clk);
+ if (pdata->pclk)
+ clk_disable_unprepare(pdata->pclk);
+err_clk:
+ clk_disable_unprepare(pdata->clk);
s5p_dev = NULL;
return err;
@@ -2323,6 +2362,9 @@ static int s5p_aes_remove(struct platform_device *pdev)
pdata->use_hash = false;
}
+ if (pdata->pclk)
+ clk_disable_unprepare(pdata->pclk);
+
clk_disable_unprepare(pdata->clk);
s5p_dev = NULL;
--
2.20.0
Document DT bindings for crypto Samsung Exynos5433 SlimSSS (Slim Security
SubSystem) IP.
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Kamil Konieczny <[email protected]>
---
.../devicetree/bindings/crypto/samsung-sss.txt | 14 +++++++++++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/crypto/samsung-sss.txt b/Documentation/devicetree/bindings/crypto/samsung-sss.txt
index 7a5ca56683cc..d9af679d38ab 100644
--- a/Documentation/devicetree/bindings/crypto/samsung-sss.txt
+++ b/Documentation/devicetree/bindings/crypto/samsung-sss.txt
@@ -1,4 +1,4 @@
-Samsung SoC SSS (Security SubSystem) module
+Samsung SoC SSS (Security SubSystem) and SlimSSS module
The SSS module in S5PV210 SoC supports the following:
-- Feeder (FeedCtrl)
@@ -15,6 +15,12 @@ supports the following also:
-- True Random Number Generator (TRNG)
-- Secure Key Manager
+Exynos5433 has both SSS and SlimSSS module.
+SlimSSS in Exynos5433 supports:
+-- Feeder (FeedCtrl)
+-- Advanced Encryption Standard (AES)
+-- SHA-1/SHA-256/HMAC (SHA-1/SHA-256)
+
Required properties:
- compatible : Should contain entries for this and backward compatible
@@ -22,11 +28,13 @@ Required properties:
- "samsung,s5pv210-secss" for S5PV210 SoC.
- "samsung,exynos4210-secss" for Exynos4210, Exynos4212, Exynos4412, Exynos5250,
Exynos5260 and Exynos5420 SoCs.
+ - "samsung,exynos5433-slim-sss" for Exynos5433 SoCs.
- reg : Offset and length of the register set for the module
- interrupts : interrupt specifiers of SSS module interrupts (one feed
control interrupt).
- clocks : list of clock phandle and specifier pairs for all clocks listed in
clock-names property.
-- clock-names : list of device clock input names; should contain one entry
- "secss".
+- clock-names : list of device clock input names; should contain "pclk" and
+ "aclk" for slim-sss in Exynos5433, and one entry "secss" for
+ other compatibles.
--
2.20.0
On Thu, Jan 24, 2019 at 04:45:20PM +0100, Kamil Konieczny wrote:
> Document DT bindings for crypto Samsung Exynos5433 SlimSSS (Slim Security
> SubSystem) IP.
>
> Reviewed-by: Krzysztof Kozlowski <[email protected]>
> Signed-off-by: Kamil Konieczny <[email protected]>
> ---
> .../devicetree/bindings/crypto/samsung-sss.txt | 14 +++++++++++---
> 1 file changed, 11 insertions(+), 3 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/crypto/samsung-sss.txt b/Documentation/devicetree/bindings/crypto/samsung-sss.txt
> index 7a5ca56683cc..d9af679d38ab 100644
> --- a/Documentation/devicetree/bindings/crypto/samsung-sss.txt
> +++ b/Documentation/devicetree/bindings/crypto/samsung-sss.txt
> @@ -1,4 +1,4 @@
> -Samsung SoC SSS (Security SubSystem) module
> +Samsung SoC SSS (Security SubSystem) and SlimSSS module
>
> The SSS module in S5PV210 SoC supports the following:
> -- Feeder (FeedCtrl)
> @@ -15,6 +15,12 @@ supports the following also:
> -- True Random Number Generator (TRNG)
> -- Secure Key Manager
>
> +Exynos5433 has both SSS and SlimSSS module.
That's not really relevant to the binding.
What do the SSS and SlimSSS share? Only that both have a single reg and
interrupt based on the binding? This should probably be just 2
documents. If not now, it will have to be when converted to a DT schema.
> +SlimSSS in Exynos5433 supports:
> +-- Feeder (FeedCtrl)
> +-- Advanced Encryption Standard (AES)
> +-- SHA-1/SHA-256/HMAC (SHA-1/SHA-256)
> +
> Required properties:
>
> - compatible : Should contain entries for this and backward compatible
> @@ -22,11 +28,13 @@ Required properties:
> - "samsung,s5pv210-secss" for S5PV210 SoC.
> - "samsung,exynos4210-secss" for Exynos4210, Exynos4212, Exynos4412, Exynos5250,
> Exynos5260 and Exynos5420 SoCs.
> + - "samsung,exynos5433-slim-sss" for Exynos5433 SoCs.
> - reg : Offset and length of the register set for the module
> - interrupts : interrupt specifiers of SSS module interrupts (one feed
> control interrupt).
>
> - clocks : list of clock phandle and specifier pairs for all clocks listed in
> clock-names property.
> -- clock-names : list of device clock input names; should contain one entry
> - "secss".
> +- clock-names : list of device clock input names; should contain "pclk" and
> + "aclk" for slim-sss in Exynos5433, and one entry "secss" for
> + other compatibles.
> --
> 2.20.0
>
Hi,
On 30.01.2019 17:51, Rob Herring wrote:
> On Thu, Jan 24, 2019 at 04:45:20PM +0100, Kamil Konieczny wrote:
>> Document DT bindings for crypto Samsung Exynos5433 SlimSSS (Slim Security
>> SubSystem) IP.
>>
>> Reviewed-by: Krzysztof Kozlowski <[email protected]>
>> Signed-off-by: Kamil Konieczny <[email protected]>
>> ---
>> .../devicetree/bindings/crypto/samsung-sss.txt | 14 +++++++++++---
>> 1 file changed, 11 insertions(+), 3 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/crypto/samsung-sss.txt b/Documentation/devicetree/bindings/crypto/samsung-sss.txt
>> index 7a5ca56683cc..d9af679d38ab 100644
>> --- a/Documentation/devicetree/bindings/crypto/samsung-sss.txt
>> +++ b/Documentation/devicetree/bindings/crypto/samsung-sss.txt
>> @@ -1,4 +1,4 @@
>> -Samsung SoC SSS (Security SubSystem) module
>> +Samsung SoC SSS (Security SubSystem) and SlimSSS module
>>
>> The SSS module in S5PV210 SoC supports the following:
>> -- Feeder (FeedCtrl)
>> @@ -15,6 +15,12 @@ supports the following also:
>> -- True Random Number Generator (TRNG)
>> -- Secure Key Manager
>>
>> +Exynos5433 has both SSS and SlimSSS module.
>
> That's not really relevant to the binding.
>
> What do the SSS and SlimSSS share? Only that both have a single reg and
> interrupt based on the binding? This should probably be just 2
> documents. If not now, it will have to be when converted to a DT schema.
They share hardware design, slimSSS is stripped-down SSS version,
and can be handled by the same crypto s5p-sss driver. The register
layout is the same for FeedControl (DMA) and AES crypt function.
Do you prefer to put this description in new file samsung-slimsss.txt ?
If yes, I can send v4, so it can be done right from beginning.
>> +SlimSSS in Exynos5433 supports:
>> +-- Feeder (FeedCtrl)
>> +-- Advanced Encryption Standard (AES)
>> +-- SHA-1/SHA-256/HMAC (SHA-1/SHA-256)
>> +
>> Required properties:
>>
>> - compatible : Should contain entries for this and backward compatible
>> @@ -22,11 +28,13 @@ Required properties:
>> - "samsung,s5pv210-secss" for S5PV210 SoC.
>> - "samsung,exynos4210-secss" for Exynos4210, Exynos4212, Exynos4412, Exynos5250,
>> Exynos5260 and Exynos5420 SoCs.
>> + - "samsung,exynos5433-slim-sss" for Exynos5433 SoCs.
>> - reg : Offset and length of the register set for the module
>> - interrupts : interrupt specifiers of SSS module interrupts (one feed
>> control interrupt).
>>
>> - clocks : list of clock phandle and specifier pairs for all clocks listed in
>> clock-names property.
>> -- clock-names : list of device clock input names; should contain one entry
>> - "secss".
>> +- clock-names : list of device clock input names; should contain "pclk" and
>> + "aclk" for slim-sss in Exynos5433, and one entry "secss" for
>> + other compatibles.
>> --
>> 2.20.0
--
Best regards,
Kamil Konieczny
Samsung R&D Institute Poland