Qualcomm crypto engine supports hardware accelerated algorithms for
encryption and authentication. Enable support for aes,des,3des encryption
algorithms and sha1,sha256, hmac(sha1),hmac(sha256) authentication
algorithms on sdm845.The patch series has been tested using the kernel
crypto testing module tcrypto.ko.
Thara Gopinath (6):
dt-binding:clock: Add entry for crypto engine RPMH clock resource
clk:qcom:rpmh: Add CE clock on sdm845.
drivers:crypto:qce: Enable support for crypto engine on sdm845.
drivers:crypto:qce: Fix SHA result buffer corruption issues.
dts:qcom:sdm845: Add dt entries to support crypto engine.
devicetree:bindings:crypto: Extend qcom-qce binding to add support for
crypto engine version 5.4
.../devicetree/bindings/crypto/qcom-qce.txt | 4 ++-
arch/arm64/boot/dts/qcom/sdm845.dtsi | 30 +++++++++++++++++++
drivers/clk/qcom/clk-rpmh.c | 2 ++
drivers/crypto/qce/core.c | 17 ++++++++++-
drivers/crypto/qce/sha.c | 2 +-
include/dt-bindings/clock/qcom,rpmh.h | 1 +
6 files changed, 53 insertions(+), 3 deletions(-)
--
2.25.1
Partial hash was being copied into the final result buffer without the
entire message block processed. Depending on how the end user processes
this result buffer, errors vary from result buffer corruption to result
buffer poisoing. Fix this issue by ensuring that only the final hash value
is copied into the result buffer.
Signed-off-by: Thara Gopinath <[email protected]>
---
drivers/crypto/qce/sha.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/crypto/qce/sha.c b/drivers/crypto/qce/sha.c
index 87be96a0b0bb..61c418c12345 100644
--- a/drivers/crypto/qce/sha.c
+++ b/drivers/crypto/qce/sha.c
@@ -48,7 +48,7 @@ static void qce_ahash_done(void *data)
dma_unmap_sg(qce->dev, &rctx->result_sg, 1, DMA_FROM_DEVICE);
memcpy(rctx->digest, result->auth_iv, digestsize);
- if (req->result)
+ if (req->result && rctx->last_blk)
memcpy(req->result, result->auth_iv, digestsize);
rctx->byte_count[0] = cpu_to_be32(result->auth_byte_count[0]);
--
2.25.1
On Tue, Nov 17, 2020 at 08:47:08AM -0500, Thara Gopinath wrote:
> Qualcomm crypto engine supports hardware accelerated algorithms for
> encryption and authentication. Enable support for aes,des,3des encryption
> algorithms and sha1,sha256, hmac(sha1),hmac(sha256) authentication
> algorithms on sdm845.The patch series has been tested using the kernel
> crypto testing module tcrypto.ko.
Did you do this testing with CONFIG_CRYPTO_MANAGER_EXTRA_TESTS enabled?
Do all tests pass with it enabled?
- Eric
On 11/17/20 11:57 AM, Eric Biggers wrote:
> On Tue, Nov 17, 2020 at 08:47:08AM -0500, Thara Gopinath wrote:
>> Qualcomm crypto engine supports hardware accelerated algorithms for
>> encryption and authentication. Enable support for aes,des,3des encryption
>> algorithms and sha1,sha256, hmac(sha1),hmac(sha256) authentication
>> algorithms on sdm845.The patch series has been tested using the kernel
>> crypto testing module tcrypto.ko.
>
> Did you do this testing with CONFIG_CRYPTO_MANAGER_EXTRA_TESTS enabled?
> Do all tests pass with it enabled?
No I have not. This is in my todo list though. I am trying to enable
AEAD algorithms on the crypto engine right now. I will try to test it
out with that set.
>
> - Eric
>
--
Warm Regards
Thara
On Tue 17 Nov 07:47 CST 2020, Thara Gopinath wrote:
> Partial hash was being copied into the final result buffer without the
> entire message block processed. Depending on how the end user processes
> this result buffer, errors vary from result buffer corruption to result
> buffer poisoing. Fix this issue by ensuring that only the final hash value
> is copied into the result buffer.
>
Looks reasonable to me
Reviewed-by: Bjorn Andersson <[email protected]>
Regards,
Bjorn
> Signed-off-by: Thara Gopinath <[email protected]>
> ---
> drivers/crypto/qce/sha.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/crypto/qce/sha.c b/drivers/crypto/qce/sha.c
> index 87be96a0b0bb..61c418c12345 100644
> --- a/drivers/crypto/qce/sha.c
> +++ b/drivers/crypto/qce/sha.c
> @@ -48,7 +48,7 @@ static void qce_ahash_done(void *data)
> dma_unmap_sg(qce->dev, &rctx->result_sg, 1, DMA_FROM_DEVICE);
>
> memcpy(rctx->digest, result->auth_iv, digestsize);
> - if (req->result)
> + if (req->result && rctx->last_blk)
> memcpy(req->result, result->auth_iv, digestsize);
>
> rctx->byte_count[0] = cpu_to_be32(result->auth_byte_count[0]);
> --
> 2.25.1
>