This set contains a collection of fixes for DH895XCC (the first two
patches) and PFVF (the rest of the set).
Patches one and two correct the lack of necessary flags to indicate the
presence of specific HW capabilities, which could result in VFs unable
to work correctly.
The third patch removes redundant PFVF code, while the fourth one
addresses a problem which caused lost PFVF messages due to unhandled
interrupts during bursts of PFVF messages from multiple VFs. This was
usually noticeable when restarting many VMs/VFs at the same time.
The remainder of the set is a refactoring resulting from the previous
fix, but to ease the review.
Giovanni Cabiddu (3):
crypto: qat - set CIPHER capability for DH895XCC
crypto: qat - set COMPRESSION capability for DH895XCC
crypto: qat - remove unused PFVF stubs
Marco Chiappero (5):
crypto: qat - rework the VF2PF interrupt handling logic
crypto: qat - leverage the GEN2 VF mask definiton
crypto: qat - replace disable_vf2pf_interrupts()
crypto: qat - use u32 variables in all GEN4 pfvf_ops
crypto: qat - remove line wrapping for pfvf_ops functions
.../crypto/qat/qat_common/adf_accel_devices.h | 4 +-
.../crypto/qat/qat_common/adf_common_drv.h | 18 +--
drivers/crypto/qat/qat_common/adf_gen2_pfvf.c | 78 ++++++++-----
drivers/crypto/qat/qat_common/adf_gen4_pfvf.c | 55 ++++++---
drivers/crypto/qat/qat_common/adf_isr.c | 21 ++--
drivers/crypto/qat/qat_common/adf_sriov.c | 2 +-
.../qat/qat_dh895xcc/adf_dh895xcc_hw_data.c | 110 +++++++++++-------
7 files changed, 168 insertions(+), 120 deletions(-)
base-commit: d6de7d2f20455c0239fbcc3e79e929ba068b6740
--
2.34.1
From: Giovanni Cabiddu <[email protected]>
The capability detection logic clears bits for the features that are
disabled in a certain SKU. For example, if the bit associate to
compression is not present in the LEGFUSE register, the correspondent
bit is cleared in the capability mask.
This change adds the compression capability to the mask as this was
missing in the commit that enhanced the capability detection logic.
Fixes: cfe4894eccdc ("crypto: qat - set COMPRESSION capability for QAT GEN2")
Signed-off-by: Giovanni Cabiddu <[email protected]>
Signed-off-by: Marco Chiappero <[email protected]>
Reviewed-by: Marco Chiappero <[email protected]>
---
drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c b/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c
index ff13047772e3..61d5467e0d92 100644
--- a/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c
+++ b/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c
@@ -59,7 +59,8 @@ static u32 get_accel_cap(struct adf_accel_dev *accel_dev)
capabilities = ICP_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC |
ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC |
ICP_ACCEL_CAPABILITIES_AUTHENTICATION |
- ICP_ACCEL_CAPABILITIES_CIPHER;
+ ICP_ACCEL_CAPABILITIES_CIPHER |
+ ICP_ACCEL_CAPABILITIES_COMPRESSION;
/* Read accelerator capabilities mask */
pci_read_config_dword(pdev, ADF_DEVICE_LEGFUSE_OFFSET, &legfuses);
--
2.34.1