2022-07-05 02:12:32

by Neal Liu

Subject: [PATCH v7 3/5] ARM: dts: aspeed: Add HACE device controller node

Add hace node to device tree for AST2500/AST2600.

Signed-off-by: Neal Liu <[email protected]>
Signed-off-by: Johnny Huang <[email protected]>
---
arch/arm/boot/dts/aspeed-g5.dtsi | 8 ++++++++
arch/arm/boot/dts/aspeed-g6.dtsi | 8 ++++++++
2 files changed, 16 insertions(+)

diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index c89092c3905b..04f98d1dbb97 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -262,6 +262,14 @@ rng: hwrng@1e6e2078 {
quality = <100>;
};

+ hace: crypto@1e6e3000 {
+ compatible = "aspeed,ast2500-hace";
+ reg = <0x1e6e3000 0x100>;
+ interrupts = <4>;
+ clocks = <&syscon ASPEED_CLK_GATE_YCLK>;
+ resets = <&syscon ASPEED_RESET_HACE>;
+ };
+
gfx: display@1e6e6000 {
compatible = "aspeed,ast2500-gfx", "syscon";
reg = <0x1e6e6000 0x1000>;
diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
index 6660564855ff..095cf8d03616 100644
--- a/arch/arm/boot/dts/aspeed-g6.dtsi
+++ b/arch/arm/boot/dts/aspeed-g6.dtsi
@@ -323,6 +323,14 @@ apb {
#size-cells = <1>;
ranges;

+ hace: crypto@1e6d0000 {
+ compatible = "aspeed,ast2600-hace";
+ reg = <0x1e6d0000 0x200>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&syscon ASPEED_CLK_GATE_YCLK>;
+ resets = <&syscon ASPEED_RESET_HACE>;
+ };
+
syscon: syscon@1e6e2000 {
compatible = "aspeed,ast2600-scu", "syscon", "simple-mfd";
reg = <0x1e6e2000 0x1000>;
--
2.25.1

2022-07-13 07:53:14

by Dhananjay Phadke

Subject: Re: [PATCH v7 3/5] ARM: dts: aspeed: Add HACE device controller node

On 7/4/2022 7:09 PM, Neal Liu wrote:
> Add hace node to device tree for AST2500/AST2600.
>
> Signed-off-by: Neal Liu <[email protected]>
> Signed-off-by: Johnny Huang <[email protected]>
> ---
> arch/arm/boot/dts/aspeed-g5.dtsi | 8 ++++++++
> arch/arm/boot/dts/aspeed-g6.dtsi | 8 ++++++++
> 2 files changed, 16 insertions(+)
>
> diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
> index c89092c3905b..04f98d1dbb97 100644
> --- a/arch/arm/boot/dts/aspeed-g5.dtsi
> +++ b/arch/arm/boot/dts/aspeed-g5.dtsi
> @@ -262,6 +262,14 @@ rng: hwrng@1e6e2078 {
> quality = <100>;
> };
>
> + hace: crypto@1e6e3000 {
> + compatible = "aspeed,ast2500-hace";
> + reg = <0x1e6e3000 0x100>;
> + interrupts = <4>;
> + clocks = <&syscon ASPEED_CLK_GATE_YCLK>;
> + resets = <&syscon ASPEED_RESET_HACE>;
> + };
> +
> gfx: display@1e6e6000 {
> compatible = "aspeed,ast2500-gfx", "syscon";
> reg = <0x1e6e6000 0x1000>;
> diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
> index 6660564855ff..095cf8d03616 100644
> --- a/arch/arm/boot/dts/aspeed-g6.dtsi
> +++ b/arch/arm/boot/dts/aspeed-g6.dtsi
> @@ -323,6 +323,14 @@ apb {
> #size-cells = <1>;
> ranges;
>
> + hace: crypto@1e6d0000 {
> + compatible = "aspeed,ast2600-hace";
> + reg = <0x1e6d0000 0x200>;
> + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&syscon ASPEED_CLK_GATE_YCLK>;
> + resets = <&syscon ASPEED_RESET_HACE>;
> + };
> +


Thank you for addressing ast2500, for this patch -

Reviewed-by: Dhananjay Phadke <[email protected]>