2022-11-24 11:05:54

by Neal Liu

[permalink] [raw]
Subject: [PATCH v3 0/4] Add Aspeed ACRY driver for hardware acceleration

Aspeed ACRY engine is designed to accelerate the throughput of
ECDSA/RSA signature and verification.

These patches aim to add Aspeed ACRY RSA driver support.
This driver also pass the run-time self tests that take place at
algorithm registration on both big-endian/little-endian system
in AST2600 evaluation board .

Tested-by below configs:
- CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set
- CONFIG_CRYPTO_MANAGER_EXTRA_TESTS=y
- CONFIG_DMA_API_DEBUG=y
- CONFIG_DMA_API_DEBUG_SG=y
- CONFIG_CPU_BIG_ENDIAN=y

Change since v2:
- Fix format and uninitialized warning.
- Revise binding description.

Change since v1:
- Fix dt-bindings description.
- Refine the Makefile which has been addressed.

Neal Liu (4):
crypto: aspeed: Add ACRY RSA driver
ARM: dts: aspeed: Add ACRY/AHBC device controller node
dt-bindings: crypto: add documentation for Aspeed ACRY
dt-bindings: bus: add documentation for Aspeed AHBC

.../bindings/bus/aspeed,ast2600-ahbc.yaml | 37 +
.../bindings/crypto/aspeed,ast2600-acry.yaml | 49 ++
MAINTAINERS | 2 +-
arch/arm/boot/dts/aspeed-g6.dtsi | 13 +
drivers/crypto/aspeed/Kconfig | 11 +
drivers/crypto/aspeed/Makefile | 2 +
drivers/crypto/aspeed/aspeed-acry.c | 828 ++++++++++++++++++
7 files changed, 941 insertions(+), 1 deletion(-)
create mode 100644 Documentation/devicetree/bindings/bus/aspeed,ast2600-ahbc.yaml
create mode 100644 Documentation/devicetree/bindings/crypto/aspeed,ast2600-acry.yaml
create mode 100644 drivers/crypto/aspeed/aspeed-acry.c

--
2.25.1


2022-11-24 11:09:30

by Neal Liu

[permalink] [raw]
Subject: [PATCH v3 3/4] dt-bindings: crypto: add documentation for Aspeed ACRY

Add device tree binding documentation for the Aspeed
ECDSA/RSA ACRY Engines Controller.

Signed-off-by: Neal Liu <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
---
.../bindings/crypto/aspeed,ast2600-acry.yaml | 49 +++++++++++++++++++
MAINTAINERS | 2 +-
2 files changed, 50 insertions(+), 1 deletion(-)
create mode 100644 Documentation/devicetree/bindings/crypto/aspeed,ast2600-acry.yaml

diff --git a/Documentation/devicetree/bindings/crypto/aspeed,ast2600-acry.yaml b/Documentation/devicetree/bindings/crypto/aspeed,ast2600-acry.yaml
new file mode 100644
index 000000000000..b18f178aac06
--- /dev/null
+++ b/Documentation/devicetree/bindings/crypto/aspeed,ast2600-acry.yaml
@@ -0,0 +1,49 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/crypto/aspeed,ast2600-acry.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ASPEED ACRY ECDSA/RSA Hardware Accelerator Engines
+
+maintainers:
+ - Neal Liu <[email protected]>
+
+description:
+ The ACRY ECDSA/RSA engines is designed to accelerate the throughput
+ of ECDSA/RSA signature and verification. Basically, ACRY can be
+ divided into two independent engines - ECC Engine and RSA Engine.
+
+properties:
+ compatible:
+ enum:
+ - aspeed,ast2600-acry
+
+ reg:
+ items:
+ - description: acry base address & size
+ - description: acry sram base address & size
+
+ clocks:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - interrupts
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/ast2600-clock.h>
+ acry: crypto@1e6fa000 {
+ compatible = "aspeed,ast2600-acry";
+ reg = <0x1e6fa000 0x400>, <0x1e710000 0x1800>;
+ interrupts = <160>;
+ clocks = <&syscon ASPEED_CLK_GATE_RSACLK>;
+ };
diff --git a/MAINTAINERS b/MAINTAINERS
index 164f67e59e5f..e6157d18d804 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3214,7 +3214,7 @@ ASPEED CRYPTO DRIVER
M: Neal Liu <[email protected]>
L: [email protected] (moderated for non-subscribers)
S: Maintained
-F: Documentation/devicetree/bindings/crypto/aspeed,ast2500-hace.yaml
+F: Documentation/devicetree/bindings/crypto/aspeed,*
F: drivers/crypto/aspeed/

ASUS NOTEBOOKS AND EEEPC ACPI/WMI EXTRAS DRIVERS
--
2.25.1