2022-12-14 07:05:32

by Neal Liu

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Subject: [PATCH v4 0/4] Add Aspeed ACRY driver for hardware acceleration

Aspeed ACRY engine is designed to accelerate the throughput of
ECDSA/RSA signature and verification.

These patches aim to add Aspeed ACRY RSA driver support.
This driver also pass the run-time self tests that take place at
algorithm registration on both big-endian/little-endian system
in AST2600 evaluation board .

Tested-by below configs:
- CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set
- CONFIG_CRYPTO_MANAGER_EXTRA_TESTS=y
- CONFIG_DMA_API_DEBUG=y
- CONFIG_DMA_API_DEBUG_SG=y
- CONFIG_CPU_BIG_ENDIAN=y

Change since v3:
- Revise aspeed,ast2600-ahbc.yaml dt-bindings description.

Change since v2:
- Fix format and uninitialized warning.
- Revise binding description.

Change since v1:
- Fix dt-bindings description.
- Refine the Makefile which has been addressed.

Neal Liu (4):
crypto: aspeed: Add ACRY RSA driver
ARM: dts: aspeed: Add ACRY/AHBC device controller node
dt-bindings: crypto: add documentation for Aspeed ACRY
dt-bindings: bus: add documentation for Aspeed AHBC

.../bindings/bus/aspeed,ast2600-ahbc.yaml | 37 +
.../bindings/crypto/aspeed,ast2600-acry.yaml | 49 ++
MAINTAINERS | 2 +-
arch/arm/boot/dts/aspeed-g6.dtsi | 13 +
drivers/crypto/aspeed/Kconfig | 11 +
drivers/crypto/aspeed/Makefile | 2 +
drivers/crypto/aspeed/aspeed-acry.c | 828 ++++++++++++++++++
7 files changed, 941 insertions(+), 1 deletion(-)
create mode 100644 Documentation/devicetree/bindings/bus/aspeed,ast2600-ahbc.yaml
create mode 100644 Documentation/devicetree/bindings/crypto/aspeed,ast2600-acry.yaml
create mode 100644 drivers/crypto/aspeed/aspeed-acry.c

--
2.25.1


2022-12-14 07:05:34

by Neal Liu

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Subject: [PATCH v4 4/4] dt-bindings: bus: add documentation for Aspeed AHBC

Add device tree binding documentation for the Aspeed
Advanced High-Performance Bus (AHB) Controller.

Signed-off-by: Neal Liu <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
---
.../bindings/bus/aspeed,ast2600-ahbc.yaml | 37 +++++++++++++++++++
1 file changed, 37 insertions(+)
create mode 100644 Documentation/devicetree/bindings/bus/aspeed,ast2600-ahbc.yaml

diff --git a/Documentation/devicetree/bindings/bus/aspeed,ast2600-ahbc.yaml b/Documentation/devicetree/bindings/bus/aspeed,ast2600-ahbc.yaml
new file mode 100644
index 000000000000..2894256c976d
--- /dev/null
+++ b/Documentation/devicetree/bindings/bus/aspeed,ast2600-ahbc.yaml
@@ -0,0 +1,37 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bus/aspeed,ast2600-ahbc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ASPEED Advanced High-Performance Bus Controller (AHBC)
+
+maintainers:
+ - Neal Liu <[email protected]>
+ - Chia-Wei Wang <[email protected]>
+
+description: |
+ Advanced High-performance Bus Controller (AHBC) supports plenty of mechanisms
+ including a priority arbiter, an address decoder and a data multiplexer
+ to control the overall operations of Advanced High-performance Bus (AHB).
+
+properties:
+ compatible:
+ enum:
+ - aspeed,ast2600-ahbc
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ ahbc@1e600000 {
+ compatible = "aspeed,ast2600-ahbc";
+ reg = <0x1e600000 0x100>;
+ };
--
2.25.1

2022-12-14 07:06:20

by Neal Liu

[permalink] [raw]
Subject: [PATCH v4 2/4] ARM: dts: aspeed: Add ACRY/AHBC device controller node

Add acry & ahbc node to device tree for AST2600.

Signed-off-by: Neal Liu <[email protected]>
---
arch/arm/boot/dts/aspeed-g6.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)

diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
index 095cf8d03616..ad177799db0b 100644
--- a/arch/arm/boot/dts/aspeed-g6.dtsi
+++ b/arch/arm/boot/dts/aspeed-g6.dtsi
@@ -94,6 +94,11 @@ gic: interrupt-controller@40461000 {
<0x40466000 0x2000>;
};

+ ahbc: bus@1e600000 {
+ compatible = "aspeed,ast2600-ahbc", "syscon";
+ reg = <0x1e600000 0x100>;
+ };
+
fmc: spi@1e620000 {
reg = <0x1e620000 0xc4>, <0x20000000 0x10000000>;
#address-cells = <1>;
@@ -427,6 +432,14 @@ sbc: secure-boot-controller@1e6f2000 {
reg = <0x1e6f2000 0x1000>;
};

+ acry: crypto@1e6fa000 {
+ compatible = "aspeed,ast2600-acry";
+ reg = <0x1e6fa000 0x400>, <0x1e710000 0x1800>;
+ interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&syscon ASPEED_CLK_GATE_RSACLK>;
+ aspeed,ahbc = <&ahbc>;
+ };
+
video: video@1e700000 {
compatible = "aspeed,ast2600-video-engine";
reg = <0x1e700000 0x1000>;
--
2.25.1