This patch series adds kernel driver support for StarFive JH7110 crypto
engine. The first patch adds Documentations for the device and Patch 2
adds device probe and DMA init for the module. Patch 3 adds crypto and
DMA dts node for VisionFive 2 board. Patch 4 adds hash/hmac support to
the module.
Patch 3 needs to be applied on top of:
https://lore.kernel.org/lkml/[email protected]/
Patch 4 needs to be applied on top of:
https://lore.kernel.org/linux-crypto/[email protected]/T/#u
Changes v5->v6
- Remove set_crypt in export as request will have been created by
init/updated calls (Herbert)
- Use new helper to set statesize of crypto_ahash (Herbert)
- Use crypto_ahash_blocksize instead of crypto_ahash_tfm (Herbert)
- Switch to init_tfm/exit_tfm instead of cra_init/cra_exit (Herbert)
Changes v4->v5
- Schedule tasklet from IRQ handler instead of using completion to sync
events (Herbert)
Changes v3->v4:
- Use fallback for non-aligned cases as hardware doesn't support
hashing piece-meal (Herbert)
- Use ahash_request_set_* helpers to update members of ahash_request
(Herbert)
- Set callbacks for async fallback (Herbert)
- Remove completion variable and use dma_callback to do the rest of
processing instead. (Herbert)
Changes v2->v3:
- Only implement digest and use fallback for other ops (Herbert)
- Use interrupt instead of polling for hash complete (Herbert)
- Remove manual data copy from out-of-bound memory location as it will
be handled by DMA API. (Christoph & Herbert)
Changes v1->v2:
- Fixed yaml filename and format (Krzysztof)
- Removed unnecessary property names in yaml (Krzysztof)
- Moved of_device_id table close to usage (Krzysztof)
- Use dev_err_probe for error returns (Krzysztof)
- Dropped redundant readl and writel wrappers (Krzysztof)
- Updated commit signed offs (Conor)
- Dropped redundant node in dts, module set to on in dtsi (Conor)
Jia Jie Ho (4):
dt-bindings: crypto: Add StarFive crypto module
crypto: starfive - Add crypto engine support
riscv: dts: starfive: Add crypto and DMA node for VisionFive 2
crypto: starfive - Add hash and HMAC support
.../crypto/starfive,jh7110-crypto.yaml | 70 ++
MAINTAINERS | 7 +
arch/riscv/boot/dts/starfive/jh7110.dtsi | 28 +
drivers/crypto/Kconfig | 1 +
drivers/crypto/Makefile | 1 +
drivers/crypto/starfive/Kconfig | 21 +
drivers/crypto/starfive/Makefile | 4 +
drivers/crypto/starfive/jh7110-cryp.c | 237 +++++
drivers/crypto/starfive/jh7110-cryp.h | 127 +++
drivers/crypto/starfive/jh7110-hash.c | 896 ++++++++++++++++++
10 files changed, 1392 insertions(+)
create mode 100644 Documentation/devicetree/bindings/crypto/starfive,jh7110-crypto.yaml
create mode 100644 drivers/crypto/starfive/Kconfig
create mode 100644 drivers/crypto/starfive/Makefile
create mode 100644 drivers/crypto/starfive/jh7110-cryp.c
create mode 100644 drivers/crypto/starfive/jh7110-cryp.h
create mode 100644 drivers/crypto/starfive/jh7110-hash.c
--
2.25.1
Add documentation to describe StarFive cryptographic engine.
Co-developed-by: Huan Feng <[email protected]>
Signed-off-by: Huan Feng <[email protected]>
Signed-off-by: Jia Jie Ho <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
---
.../crypto/starfive,jh7110-crypto.yaml | 70 +++++++++++++++++++
1 file changed, 70 insertions(+)
create mode 100644 Documentation/devicetree/bindings/crypto/starfive,jh7110-crypto.yaml
diff --git a/Documentation/devicetree/bindings/crypto/starfive,jh7110-crypto.yaml b/Documentation/devicetree/bindings/crypto/starfive,jh7110-crypto.yaml
new file mode 100644
index 000000000000..71a2876bd6e4
--- /dev/null
+++ b/Documentation/devicetree/bindings/crypto/starfive,jh7110-crypto.yaml
@@ -0,0 +1,70 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/crypto/starfive,jh7110-crypto.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: StarFive Cryptographic Module
+
+maintainers:
+ - Jia Jie Ho <[email protected]>
+ - William Qiu <[email protected]>
+
+properties:
+ compatible:
+ const: starfive,jh7110-crypto
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: Hardware reference clock
+ - description: AHB reference clock
+
+ clock-names:
+ items:
+ - const: hclk
+ - const: ahb
+
+ interrupts:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+ dmas:
+ items:
+ - description: TX DMA channel
+ - description: RX DMA channel
+
+ dma-names:
+ items:
+ - const: tx
+ - const: rx
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - resets
+ - dmas
+ - dma-names
+
+additionalProperties: false
+
+examples:
+ - |
+ crypto: crypto@16000000 {
+ compatible = "starfive,jh7110-crypto";
+ reg = <0x16000000 0x4000>;
+ clocks = <&clk 15>, <&clk 16>;
+ clock-names = "hclk", "ahb";
+ interrupts = <28>;
+ resets = <&reset 3>;
+ dmas = <&dma 1 2>,
+ <&dma 0 2>;
+ dma-names = "tx", "rx";
+ };
+...
--
2.25.1
Adding device probe and DMA init for StarFive cryptographic module.
Co-developed-by: Huan Feng <[email protected]>
Signed-off-by: Huan Feng <[email protected]>
Signed-off-by: Jia Jie Ho <[email protected]>
---
MAINTAINERS | 7 +
drivers/crypto/Kconfig | 1 +
drivers/crypto/Makefile | 1 +
drivers/crypto/starfive/Kconfig | 17 +++
drivers/crypto/starfive/Makefile | 4 +
drivers/crypto/starfive/jh7110-cryp.c | 199 ++++++++++++++++++++++++++
drivers/crypto/starfive/jh7110-cryp.h | 63 ++++++++
7 files changed, 292 insertions(+)
create mode 100644 drivers/crypto/starfive/Kconfig
create mode 100644 drivers/crypto/starfive/Makefile
create mode 100644 drivers/crypto/starfive/jh7110-cryp.c
create mode 100644 drivers/crypto/starfive/jh7110-cryp.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 65140500d9f8..a6f7677db4db 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -19609,6 +19609,13 @@ F: Documentation/devicetree/bindings/clock/starfive*
F: drivers/clk/starfive/
F: include/dt-bindings/clock/starfive*
+STARFIVE CRYPTO DRIVER
+M: Jia Jie Ho <[email protected]>
+M: William Qiu <[email protected]>
+S: Supported
+F: Documentation/devicetree/bindings/crypto/starfive*
+F: drivers/crypto/starfive/
+
STARFIVE PINCTRL DRIVER
M: Emil Renner Berthing <[email protected]>
M: Jianlong Huang <[email protected]>
diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
index 55e75fbb658e..64b94376601c 100644
--- a/drivers/crypto/Kconfig
+++ b/drivers/crypto/Kconfig
@@ -817,5 +817,6 @@ config CRYPTO_DEV_SA2UL
source "drivers/crypto/keembay/Kconfig"
source "drivers/crypto/aspeed/Kconfig"
+source "drivers/crypto/starfive/Kconfig"
endif # CRYPTO_HW
diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile
index 116de173a66c..212931c84412 100644
--- a/drivers/crypto/Makefile
+++ b/drivers/crypto/Makefile
@@ -53,3 +53,4 @@ obj-y += xilinx/
obj-y += hisilicon/
obj-$(CONFIG_CRYPTO_DEV_AMLOGIC_GXL) += amlogic/
obj-y += keembay/
+obj-y += starfive/
diff --git a/drivers/crypto/starfive/Kconfig b/drivers/crypto/starfive/Kconfig
new file mode 100644
index 000000000000..73f39b6bc09f
--- /dev/null
+++ b/drivers/crypto/starfive/Kconfig
@@ -0,0 +1,17 @@
+#
+# StarFive crypto drivers configuration
+#
+
+config CRYPTO_DEV_JH7110
+ tristate "StarFive JH7110 cryptographic engine driver"
+ depends on SOC_STARFIVE
+ select CRYPTO_ENGINE
+ select ARM_AMBA
+ select DMADEVICES
+ select AMBA_PL08X
+ help
+ Support for StarFive JH7110 crypto hardware acceleration engine.
+ This module provides acceleration for public key algo,
+ skciphers, AEAD and hash functions.
+
+ If you choose 'M' here, this module will be called starfive-crypto.
diff --git a/drivers/crypto/starfive/Makefile b/drivers/crypto/starfive/Makefile
new file mode 100644
index 000000000000..41221acaee39
--- /dev/null
+++ b/drivers/crypto/starfive/Makefile
@@ -0,0 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0
+
+obj-$(CONFIG_CRYPTO_DEV_JH7110) += jh7110-crypto.o
+jh7110-crypto-objs := jh7110-cryp.o
diff --git a/drivers/crypto/starfive/jh7110-cryp.c b/drivers/crypto/starfive/jh7110-cryp.c
new file mode 100644
index 000000000000..a944897609a2
--- /dev/null
+++ b/drivers/crypto/starfive/jh7110-cryp.c
@@ -0,0 +1,199 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Cryptographic API.
+ *
+ * Support for StarFive hardware cryptographic engine.
+ * Copyright (c) 2022 StarFive Technology
+ *
+ */
+
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/iopoll.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
+#include <linux/reset.h>
+
+#include "jh7110-cryp.h"
+
+#define DRIVER_NAME "starfive-crypto"
+
+struct starfive_dev_list {
+ struct list_head dev_list;
+ spinlock_t lock; /* protect dev_list */
+};
+
+static struct starfive_dev_list dev_list = {
+ .dev_list = LIST_HEAD_INIT(dev_list.dev_list),
+ .lock = __SPIN_LOCK_UNLOCKED(dev_list.lock),
+};
+
+struct starfive_cryp_dev *starfive_cryp_find_dev(struct starfive_cryp_ctx *ctx)
+{
+ struct starfive_cryp_dev *cryp = NULL, *tmp;
+
+ spin_lock_bh(&dev_list.lock);
+ if (!ctx->cryp) {
+ list_for_each_entry(tmp, &dev_list.dev_list, list) {
+ cryp = tmp;
+ break;
+ }
+ ctx->cryp = cryp;
+ } else {
+ cryp = ctx->cryp;
+ }
+
+ spin_unlock_bh(&dev_list.lock);
+
+ return cryp;
+}
+
+static int starfive_dma_init(struct starfive_cryp_dev *cryp)
+{
+ dma_cap_mask_t mask;
+
+ cryp->tx = NULL;
+ cryp->rx = NULL;
+
+ dma_cap_zero(mask);
+ dma_cap_set(DMA_SLAVE, mask);
+
+ cryp->tx = dma_request_chan(cryp->dev, "tx");
+ if (IS_ERR(cryp->tx))
+ return dev_err_probe(cryp->dev, PTR_ERR(cryp->tx),
+ "Error requesting tx dma channel.\n");
+
+ cryp->rx = dma_request_chan(cryp->dev, "rx");
+ if (IS_ERR(cryp->rx)) {
+ dma_release_channel(cryp->tx);
+ return dev_err_probe(cryp->dev, PTR_ERR(cryp->rx),
+ "Error requesting rx dma channel.\n");
+ }
+
+ return 0;
+}
+
+static void starfive_dma_cleanup(struct starfive_cryp_dev *cryp)
+{
+ dma_release_channel(cryp->tx);
+ dma_release_channel(cryp->rx);
+}
+
+static int starfive_cryp_probe(struct platform_device *pdev)
+{
+ struct starfive_cryp_dev *cryp;
+ struct resource *res;
+ int ret;
+
+ cryp = devm_kzalloc(&pdev->dev, sizeof(*cryp), GFP_KERNEL);
+ if (!cryp)
+ return -ENOMEM;
+
+ platform_set_drvdata(pdev, cryp);
+ cryp->dev = &pdev->dev;
+
+ cryp->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
+ if (IS_ERR(cryp->base))
+ return dev_err_probe(&pdev->dev, PTR_ERR(cryp->base),
+ "Error remapping memory for platform device\n");
+
+ cryp->phys_base = res->start;
+ cryp->dma_maxburst = 32;
+
+ cryp->hclk = devm_clk_get(&pdev->dev, "hclk");
+ if (IS_ERR(cryp->hclk))
+ return dev_err_probe(&pdev->dev, PTR_ERR(cryp->hclk),
+ "Error getting hardware reference clock\n");
+
+ cryp->ahb = devm_clk_get(&pdev->dev, "ahb");
+ if (IS_ERR(cryp->ahb))
+ return dev_err_probe(&pdev->dev, PTR_ERR(cryp->ahb),
+ "Error getting ahb reference clock\n");
+
+ cryp->rst = devm_reset_control_get_shared(cryp->dev, NULL);
+ if (IS_ERR(cryp->rst))
+ return dev_err_probe(&pdev->dev, PTR_ERR(cryp->rst),
+ "Error getting hardware reset line\n");
+
+ clk_prepare_enable(cryp->hclk);
+ clk_prepare_enable(cryp->ahb);
+ reset_control_deassert(cryp->rst);
+
+ spin_lock(&dev_list.lock);
+ list_add(&cryp->list, &dev_list.dev_list);
+ spin_unlock(&dev_list.lock);
+
+ ret = starfive_dma_init(cryp);
+ if (ret)
+ goto err_dma_init;
+
+ /* Initialize crypto engine */
+ cryp->engine = crypto_engine_alloc_init(&pdev->dev, 1);
+ if (!cryp->engine) {
+ ret = -ENOMEM;
+ goto err_engine;
+ }
+
+ ret = crypto_engine_start(cryp->engine);
+ if (ret)
+ goto err_engine_start;
+
+ return 0;
+
+err_engine_start:
+ crypto_engine_exit(cryp->engine);
+err_engine:
+ starfive_dma_cleanup(cryp);
+err_dma_init:
+ spin_lock(&dev_list.lock);
+ list_del(&cryp->list);
+ spin_unlock(&dev_list.lock);
+
+ return ret;
+}
+
+static int starfive_cryp_remove(struct platform_device *pdev)
+{
+ struct starfive_cryp_dev *cryp = platform_get_drvdata(pdev);
+
+ if (!cryp)
+ return -ENODEV;
+
+ crypto_engine_stop(cryp->engine);
+ crypto_engine_exit(cryp->engine);
+
+ starfive_dma_cleanup(cryp);
+
+ spin_lock(&dev_list.lock);
+ list_del(&cryp->list);
+ spin_unlock(&dev_list.lock);
+
+ clk_disable_unprepare(cryp->hclk);
+ clk_disable_unprepare(cryp->ahb);
+ reset_control_assert(cryp->rst);
+
+ return 0;
+}
+
+static const struct of_device_id starfive_dt_ids[] __maybe_unused = {
+ { .compatible = "starfive,jh7110-crypto", .data = NULL},
+ {},
+};
+MODULE_DEVICE_TABLE(of, starfive_dt_ids);
+
+static struct platform_driver starfive_cryp_driver = {
+ .probe = starfive_cryp_probe,
+ .remove = starfive_cryp_remove,
+ .driver = {
+ .name = DRIVER_NAME,
+ .of_match_table = starfive_dt_ids,
+ },
+};
+
+module_platform_driver(starfive_cryp_driver);
+
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("StarFive Cryptographic Module");
diff --git a/drivers/crypto/starfive/jh7110-cryp.h b/drivers/crypto/starfive/jh7110-cryp.h
new file mode 100644
index 000000000000..393efd38b098
--- /dev/null
+++ b/drivers/crypto/starfive/jh7110-cryp.h
@@ -0,0 +1,63 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __STARFIVE_STR_H__
+#define __STARFIVE_STR_H__
+
+#include <linux/delay.h>
+#include <linux/dma-mapping.h>
+#include <linux/dmaengine.h>
+
+#include <crypto/engine.h>
+
+#define STARFIVE_ALG_CR_OFFSET 0x0
+#define STARFIVE_ALG_FIFO_OFFSET 0x4
+#define STARFIVE_IE_MASK_OFFSET 0x8
+#define STARFIVE_IE_FLAG_OFFSET 0xc
+#define STARFIVE_DMA_IN_LEN_OFFSET 0x10
+#define STARFIVE_DMA_OUT_LEN_OFFSET 0x14
+
+#define STARFIVE_MSG_BUFFER_SIZE SZ_16K
+
+union starfive_alg_cr {
+ u32 v;
+ struct {
+ u32 start :1;
+ u32 aes_dma_en :1;
+ u32 rsvd_0 :1;
+ u32 hash_dma_en :1;
+ u32 alg_done :1;
+ u32 rsvd_1 :3;
+ u32 clear :1;
+ u32 rsvd_2 :23;
+ };
+};
+
+struct starfive_cryp_ctx {
+ struct crypto_engine_ctx enginectx;
+ struct starfive_cryp_dev *cryp;
+};
+
+struct starfive_cryp_dev {
+ struct list_head list;
+ struct device *dev;
+
+ struct clk *hclk;
+ struct clk *ahb;
+ struct reset_control *rst;
+
+ void __iomem *base;
+ phys_addr_t phys_base;
+
+ u32 dma_maxburst;
+ struct dma_chan *tx;
+ struct dma_chan *rx;
+ struct dma_slave_config cfg_in;
+ struct dma_slave_config cfg_out;
+
+ struct crypto_engine *engine;
+
+ union starfive_alg_cr alg_cr;
+};
+
+struct starfive_cryp_dev *starfive_cryp_find_dev(struct starfive_cryp_ctx *ctx);
+
+#endif
--
2.25.1
Add StarFive cryptographic module and dedicated DMA controller node to
VisionFive 2 SoCs.
Co-developed-by: Huan Feng <[email protected]>
Signed-off-by: Huan Feng <[email protected]>
Signed-off-by: Jia Jie Ho <[email protected]>
Acked-by: Palmer Dabbelt <[email protected]>
---
arch/riscv/boot/dts/starfive/jh7110.dtsi | 28 ++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index 4ac159d79d66..591abe57ec31 100644
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -455,5 +455,33 @@ uart5: serial@12020000 {
reg-shift = <2>;
status = "disabled";
};
+
+ sdma: dma@16008000 {
+ compatible = "arm,pl080", "arm,primecell";
+ arm,primecell-periphid = <0x00041080>;
+ reg = <0x0 0x16008000 0x0 0x4000>;
+ interrupts = <29>;
+ clocks = <&stgcrg JH7110_STGCLK_SEC_HCLK>,
+ <&stgcrg JH7110_STGCLK_SEC_MISCAHB>;
+ clock-names = "hclk", "apb_pclk";
+ resets = <&stgcrg JH7110_STGRST_SEC_TOP_HRESETN>;
+ lli-bus-interface-ahb1;
+ mem-bus-interface-ahb1;
+ memcpy-burst-size = <256>;
+ memcpy-bus-width = <32>;
+ #dma-cells = <2>;
+ };
+
+ crypto: crypto@16000000 {
+ compatible = "starfive,jh7110-crypto";
+ reg = <0x0 0x16000000 0x0 0x4000>;
+ clocks = <&stgcrg JH7110_STGCLK_SEC_HCLK>,
+ <&stgcrg JH7110_STGCLK_SEC_MISCAHB>;
+ clock-names = "hclk", "ahb";
+ interrupts = <28>;
+ resets = <&stgcrg JH7110_STGRST_SEC_TOP_HRESETN>;
+ dmas = <&sdma 1 2>, <&sdma 0 2>;
+ dma-names = "tx", "rx";
+ };
};
};
--
2.25.1
Le 26/04/2023 à 08:58, Jia Jie Ho a écrit :
> Adding device probe and DMA init for StarFive cryptographic module.
>
> Co-developed-by: Huan Feng <[email protected]>
> Signed-off-by: Huan Feng <[email protected]>
> Signed-off-by: Jia Jie Ho <[email protected]>
> ---
> MAINTAINERS | 7 +
> drivers/crypto/Kconfig | 1 +
> drivers/crypto/Makefile | 1 +
> drivers/crypto/starfive/Kconfig | 17 +++
> drivers/crypto/starfive/Makefile | 4 +
> drivers/crypto/starfive/jh7110-cryp.c | 199 ++++++++++++++++++++++++++
> drivers/crypto/starfive/jh7110-cryp.h | 63 ++++++++
> 7 files changed, 292 insertions(+)
> create mode 100644 drivers/crypto/starfive/Kconfig
> create mode 100644 drivers/crypto/starfive/Makefile
> create mode 100644 drivers/crypto/starfive/jh7110-cryp.c
> create mode 100644 drivers/crypto/starfive/jh7110-cryp.h
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 65140500d9f8..a6f7677db4db 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -19609,6 +19609,13 @@ F: Documentation/devicetree/bindings/clock/starfive*
> F: drivers/clk/starfive/
> F: include/dt-bindings/clock/starfive*
>
> +STARFIVE CRYPTO DRIVER
> +M: Jia Jie Ho <[email protected]>
> +M: William Qiu <[email protected]>
> +S: Supported
> +F: Documentation/devicetree/bindings/crypto/starfive*
> +F: drivers/crypto/starfive/
> +
> STARFIVE PINCTRL DRIVER
> M: Emil Renner Berthing <[email protected]>
> M: Jianlong Huang <[email protected]>
> diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
> index 55e75fbb658e..64b94376601c 100644
> --- a/drivers/crypto/Kconfig
> +++ b/drivers/crypto/Kconfig
> @@ -817,5 +817,6 @@ config CRYPTO_DEV_SA2UL
>
> source "drivers/crypto/keembay/Kconfig"
> source "drivers/crypto/aspeed/Kconfig"
> +source "drivers/crypto/starfive/Kconfig"
>
> endif # CRYPTO_HW
> diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile
> index 116de173a66c..212931c84412 100644
> --- a/drivers/crypto/Makefile
> +++ b/drivers/crypto/Makefile
> @@ -53,3 +53,4 @@ obj-y += xilinx/
> obj-y += hisilicon/
> obj-$(CONFIG_CRYPTO_DEV_AMLOGIC_GXL) += amlogic/
> obj-y += keembay/
> +obj-y += starfive/
> diff --git a/drivers/crypto/starfive/Kconfig b/drivers/crypto/starfive/Kconfig
> new file mode 100644
> index 000000000000..73f39b6bc09f
> --- /dev/null
> +++ b/drivers/crypto/starfive/Kconfig
> @@ -0,0 +1,17 @@
> +#
> +# StarFive crypto drivers configuration
> +#
> +
> +config CRYPTO_DEV_JH7110
> + tristate "StarFive JH7110 cryptographic engine driver"
> + depends on SOC_STARFIVE
> + select CRYPTO_ENGINE
> + select ARM_AMBA
> + select DMADEVICES
> + select AMBA_PL08X
> + help
> + Support for StarFive JH7110 crypto hardware acceleration engine.
> + This module provides acceleration for public key algo,
> + skciphers, AEAD and hash functions.
> +
> + If you choose 'M' here, this module will be called starfive-crypto.
> diff --git a/drivers/crypto/starfive/Makefile b/drivers/crypto/starfive/Makefile
> new file mode 100644
> index 000000000000..41221acaee39
> --- /dev/null
> +++ b/drivers/crypto/starfive/Makefile
> @@ -0,0 +1,4 @@
> +# SPDX-License-Identifier: GPL-2.0
> +
> +obj-$(CONFIG_CRYPTO_DEV_JH7110) += jh7110-crypto.o
> +jh7110-crypto-objs := jh7110-cryp.o
> diff --git a/drivers/crypto/starfive/jh7110-cryp.c b/drivers/crypto/starfive/jh7110-cryp.c
> new file mode 100644
> index 000000000000..a944897609a2
> --- /dev/null
> +++ b/drivers/crypto/starfive/jh7110-cryp.c
> @@ -0,0 +1,199 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Cryptographic API.
> + *
> + * Support for StarFive hardware cryptographic engine.
> + * Copyright (c) 2022 StarFive Technology
> + *
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/delay.h>
> +#include <linux/interrupt.h>
> +#include <linux/iopoll.h>
> +#include <linux/module.h>
> +#include <linux/of_device.h>
> +#include <linux/platform_device.h>
> +#include <linux/pm_runtime.h>
> +#include <linux/reset.h>
> +
> +#include "jh7110-cryp.h"
> +
> +#define DRIVER_NAME "starfive-crypto"
> +
> +struct starfive_dev_list {
> + struct list_head dev_list;
> + spinlock_t lock; /* protect dev_list */
> +};
> +
> +static struct starfive_dev_list dev_list = {
> + .dev_list = LIST_HEAD_INIT(dev_list.dev_list),
> + .lock = __SPIN_LOCK_UNLOCKED(dev_list.lock),
> +};
> +
> +struct starfive_cryp_dev *starfive_cryp_find_dev(struct starfive_cryp_ctx *ctx)
> +{
> + struct starfive_cryp_dev *cryp = NULL, *tmp;
> +
> + spin_lock_bh(&dev_list.lock);
> + if (!ctx->cryp) {
> + list_for_each_entry(tmp, &dev_list.dev_list, list) {
> + cryp = tmp;
> + break;
> + }
> + ctx->cryp = cryp;
> + } else {
> + cryp = ctx->cryp;
> + }
> +
> + spin_unlock_bh(&dev_list.lock);
> +
> + return cryp;
> +}
> +
> +static int starfive_dma_init(struct starfive_cryp_dev *cryp)
> +{
> + dma_cap_mask_t mask;
> +
> + cryp->tx = NULL;
> + cryp->rx = NULL;
Harmless, but 'crypt' is kzalloc()'ed, so these fields are already NULL.
> +
> + dma_cap_zero(mask);
> + dma_cap_set(DMA_SLAVE, mask);
> +
> + cryp->tx = dma_request_chan(cryp->dev, "tx");
> + if (IS_ERR(cryp->tx))
> + return dev_err_probe(cryp->dev, PTR_ERR(cryp->tx),
> + "Error requesting tx dma channel.\n");
> +
> + cryp->rx = dma_request_chan(cryp->dev, "rx");
> + if (IS_ERR(cryp->rx)) {
> + dma_release_channel(cryp->tx);
> + return dev_err_probe(cryp->dev, PTR_ERR(cryp->rx),
> + "Error requesting rx dma channel.\n");
> + }
> +
> + return 0;
> +}
> +
> +static void starfive_dma_cleanup(struct starfive_cryp_dev *cryp)
> +{
> + dma_release_channel(cryp->tx);
> + dma_release_channel(cryp->rx);
> +}
> +
> +static int starfive_cryp_probe(struct platform_device *pdev)
> +{
> + struct starfive_cryp_dev *cryp;
> + struct resource *res;
> + int ret;
> +
> + cryp = devm_kzalloc(&pdev->dev, sizeof(*cryp), GFP_KERNEL);
> + if (!cryp)
> + return -ENOMEM;
> +
> + platform_set_drvdata(pdev, cryp);
> + cryp->dev = &pdev->dev;
> +
> + cryp->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
> + if (IS_ERR(cryp->base))
> + return dev_err_probe(&pdev->dev, PTR_ERR(cryp->base),
> + "Error remapping memory for platform device\n");
> +
> + cryp->phys_base = res->start;
> + cryp->dma_maxburst = 32;
> +
> + cryp->hclk = devm_clk_get(&pdev->dev, "hclk");
> + if (IS_ERR(cryp->hclk))
> + return dev_err_probe(&pdev->dev, PTR_ERR(cryp->hclk),
> + "Error getting hardware reference clock\n");
> +
> + cryp->ahb = devm_clk_get(&pdev->dev, "ahb");
> + if (IS_ERR(cryp->ahb))
> + return dev_err_probe(&pdev->dev, PTR_ERR(cryp->ahb),
> + "Error getting ahb reference clock\n");
> +
> + cryp->rst = devm_reset_control_get_shared(cryp->dev, NULL);
> + if (IS_ERR(cryp->rst))
> + return dev_err_probe(&pdev->dev, PTR_ERR(cryp->rst),
> + "Error getting hardware reset line\n");
> +
> + clk_prepare_enable(cryp->hclk);
> + clk_prepare_enable(cryp->ahb);
> + reset_control_deassert(cryp->rst);
> +
> + spin_lock(&dev_list.lock);
> + list_add(&cryp->list, &dev_list.dev_list);
> + spin_unlock(&dev_list.lock);
> +
> + ret = starfive_dma_init(cryp);
> + if (ret)
> + goto err_dma_init;
> +
> + /* Initialize crypto engine */
> + cryp->engine = crypto_engine_alloc_init(&pdev->dev, 1);
> + if (!cryp->engine) {
> + ret = -ENOMEM;
> + goto err_engine;
> + }
> +
> + ret = crypto_engine_start(cryp->engine);
> + if (ret)
> + goto err_engine_start;
> +
> + return 0;
> +
> +err_engine_start:
> + crypto_engine_exit(cryp->engine);
> +err_engine:
> + starfive_dma_cleanup(cryp);
> +err_dma_init:
> + spin_lock(&dev_list.lock);
> + list_del(&cryp->list);
> + spin_unlock(&dev_list.lock);
I think that there should be:
clk_disable_unprepare(cryp->hclk);
clk_disable_unprepare(cryp->ahb);
reset_control_assert(cryp->rst);
as in the remove function.
> +
> + return ret;
> +}
> +
> +static int starfive_cryp_remove(struct platform_device *pdev)
> +{
> + struct starfive_cryp_dev *cryp = platform_get_drvdata(pdev);
> +
> + if (!cryp)
> + return -ENODEV;
I don't think that this can happen.
CJ
> +
> + crypto_engine_stop(cryp->engine);
> + crypto_engine_exit(cryp->engine);
> +
> + starfive_dma_cleanup(cryp);
> +
> + spin_lock(&dev_list.lock);
> + list_del(&cryp->list);
> + spin_unlock(&dev_list.lock);
> +
> + clk_disable_unprepare(cryp->hclk);
> + clk_disable_unprepare(cryp->ahb);
> + reset_control_assert(cryp->rst);
> +
> + return 0;
> +}
> +
> +static const struct of_device_id starfive_dt_ids[] __maybe_unused = {
> + { .compatible = "starfive,jh7110-crypto", .data = NULL},
> + {},
> +};
> +MODULE_DEVICE_TABLE(of, starfive_dt_ids);
> +
> +static struct platform_driver starfive_cryp_driver = {
> + .probe = starfive_cryp_probe,
> + .remove = starfive_cryp_remove,
> + .driver = {
> + .name = DRIVER_NAME,
> + .of_match_table = starfive_dt_ids,
> + },
> +};
> +
> +module_platform_driver(starfive_cryp_driver);
> +
> +MODULE_LICENSE("GPL");
> +MODULE_DESCRIPTION("StarFive Cryptographic Module");
> diff --git a/drivers/crypto/starfive/jh7110-cryp.h b/drivers/crypto/starfive/jh7110-cryp.h
> new file mode 100644
> index 000000000000..393efd38b098
> --- /dev/null
> +++ b/drivers/crypto/starfive/jh7110-cryp.h
> @@ -0,0 +1,63 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +#ifndef __STARFIVE_STR_H__
> +#define __STARFIVE_STR_H__
> +
> +#include <linux/delay.h>
> +#include <linux/dma-mapping.h>
> +#include <linux/dmaengine.h>
> +
> +#include <crypto/engine.h>
> +
> +#define STARFIVE_ALG_CR_OFFSET 0x0
> +#define STARFIVE_ALG_FIFO_OFFSET 0x4
> +#define STARFIVE_IE_MASK_OFFSET 0x8
> +#define STARFIVE_IE_FLAG_OFFSET 0xc
> +#define STARFIVE_DMA_IN_LEN_OFFSET 0x10
> +#define STARFIVE_DMA_OUT_LEN_OFFSET 0x14
> +
> +#define STARFIVE_MSG_BUFFER_SIZE SZ_16K
> +
> +union starfive_alg_cr {
> + u32 v;
> + struct {
> + u32 start :1;
> + u32 aes_dma_en :1;
> + u32 rsvd_0 :1;
> + u32 hash_dma_en :1;
> + u32 alg_done :1;
> + u32 rsvd_1 :3;
> + u32 clear :1;
> + u32 rsvd_2 :23;
> + };
> +};
> +
> +struct starfive_cryp_ctx {
> + struct crypto_engine_ctx enginectx;
> + struct starfive_cryp_dev *cryp;
> +};
> +
> +struct starfive_cryp_dev {
> + struct list_head list;
> + struct device *dev;
> +
> + struct clk *hclk;
> + struct clk *ahb;
> + struct reset_control *rst;
> +
> + void __iomem *base;
> + phys_addr_t phys_base;
> +
> + u32 dma_maxburst;
> + struct dma_chan *tx;
> + struct dma_chan *rx;
> + struct dma_slave_config cfg_in;
> + struct dma_slave_config cfg_out;
> +
> + struct crypto_engine *engine;
> +
> + union starfive_alg_cr alg_cr;
> +};
> +
> +struct starfive_cryp_dev *starfive_cryp_find_dev(struct starfive_cryp_ctx *ctx);
> +
> +#endif
Le 26/04/2023 à 08:58, Jia Jie Ho a écrit :
> Adding device probe and DMA init for StarFive cryptographic module.
>
> Co-developed-by: Huan Feng <[email protected]>
> Signed-off-by: Huan Feng <[email protected]>
> Signed-off-by: Jia Jie Ho <[email protected]>
> ---
> MAINTAINERS | 7 +
> drivers/crypto/Kconfig | 1 +
> drivers/crypto/Makefile | 1 +
> drivers/crypto/starfive/Kconfig | 17 +++
> drivers/crypto/starfive/Makefile | 4 +
> drivers/crypto/starfive/jh7110-cryp.c | 199 ++++++++++++++++++++++++++
> drivers/crypto/starfive/jh7110-cryp.h | 63 ++++++++
> 7 files changed, 292 insertions(+)
> create mode 100644 drivers/crypto/starfive/Kconfig
> create mode 100644 drivers/crypto/starfive/Makefile
> create mode 100644 drivers/crypto/starfive/jh7110-cryp.c
> create mode 100644 drivers/crypto/starfive/jh7110-cryp.h
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 65140500d9f8..a6f7677db4db 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -19609,6 +19609,13 @@ F: Documentation/devicetree/bindings/clock/starfive*
> F: drivers/clk/starfive/
> F: include/dt-bindings/clock/starfive*
>
> +STARFIVE CRYPTO DRIVER
> +M: Jia Jie Ho <[email protected]>
> +M: William Qiu <[email protected]>
> +S: Supported
> +F: Documentation/devicetree/bindings/crypto/starfive*
> +F: drivers/crypto/starfive/
> +
> STARFIVE PINCTRL DRIVER
> M: Emil Renner Berthing <[email protected]>
> M: Jianlong Huang <[email protected]>
> diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
> index 55e75fbb658e..64b94376601c 100644
> --- a/drivers/crypto/Kconfig
> +++ b/drivers/crypto/Kconfig
> @@ -817,5 +817,6 @@ config CRYPTO_DEV_SA2UL
>
> source "drivers/crypto/keembay/Kconfig"
> source "drivers/crypto/aspeed/Kconfig"
> +source "drivers/crypto/starfive/Kconfig"
>
> endif # CRYPTO_HW
> diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile
> index 116de173a66c..212931c84412 100644
> --- a/drivers/crypto/Makefile
> +++ b/drivers/crypto/Makefile
> @@ -53,3 +53,4 @@ obj-y += xilinx/
> obj-y += hisilicon/
> obj-$(CONFIG_CRYPTO_DEV_AMLOGIC_GXL) += amlogic/
> obj-y += keembay/
> +obj-y += starfive/
> diff --git a/drivers/crypto/starfive/Kconfig b/drivers/crypto/starfive/Kconfig
> new file mode 100644
> index 000000000000..73f39b6bc09f
> --- /dev/null
> +++ b/drivers/crypto/starfive/Kconfig
> @@ -0,0 +1,17 @@
> +#
> +# StarFive crypto drivers configuration
> +#
> +
> +config CRYPTO_DEV_JH7110
> + tristate "StarFive JH7110 cryptographic engine driver"
> + depends on SOC_STARFIVE
> + select CRYPTO_ENGINE
> + select ARM_AMBA
> + select DMADEVICES
> + select AMBA_PL08X
> + help
> + Support for StarFive JH7110 crypto hardware acceleration engine.
> + This module provides acceleration for public key algo,
> + skciphers, AEAD and hash functions.
> +
> + If you choose 'M' here, this module will be called starfive-crypto.
jh7110-cryp?
> diff --git a/drivers/crypto/starfive/Makefile b/drivers/crypto/starfive/Makefile
> new file mode 100644
> index 000000000000..41221acaee39
> --- /dev/null
> +++ b/drivers/crypto/starfive/Makefile
> @@ -0,0 +1,4 @@
> +# SPDX-License-Identifier: GPL-2.0
> +
> +obj-$(CONFIG_CRYPTO_DEV_JH7110) += jh7110-crypto.o
> +jh7110-crypto-objs := jh7110-cryp.o
On 26/4/2023 3:56 pm, Christophe JAILLET wrote:
> Le 26/04/2023 à 08:58, Jia Jie Ho a écrit :
>> Adding device probe and DMA init for StarFive cryptographic module.
>>
>> Co-developed-by: Huan Feng <[email protected]>
>> Signed-off-by: Huan Feng <[email protected]>
>> Signed-off-by: Jia Jie Ho <[email protected]>
>> ---
>> MAINTAINERS | 7 +
>> drivers/crypto/Kconfig | 1 +
>> drivers/crypto/Makefile | 1 +
>> drivers/crypto/starfive/Kconfig | 17 +++
>> drivers/crypto/starfive/Makefile | 4 +
>> drivers/crypto/starfive/jh7110-cryp.c | 199 ++++++++++++++++++++++++++
>> drivers/crypto/starfive/jh7110-cryp.h | 63 ++++++++
>> 7 files changed, 292 insertions(+)
>> create mode 100644 drivers/crypto/starfive/Kconfig
>> create mode 100644 drivers/crypto/starfive/Makefile
>> create mode 100644 drivers/crypto/starfive/jh7110-cryp.c
>> create mode 100644 drivers/crypto/starfive/jh7110-cryp.h
>>
[...]
>> +
>> +static int starfive_dma_init(struct starfive_cryp_dev *cryp)
>> +{
>> + dma_cap_mask_t mask;
>> +
>> + cryp->tx = NULL;
>> + cryp->rx = NULL;
>
> Harmless, but 'crypt' is kzalloc()'ed, so these fields are already NULL.
>
Hi Christophe,
I'll remove these in the next version.
>> +
>> + dma_cap_zero(mask);
>> + dma_cap_set(DMA_SLAVE, mask);
>> +
>> + cryp->tx = dma_request_chan(cryp->dev, "tx");
>> + if (IS_ERR(cryp->tx))
>> + return dev_err_probe(cryp->dev, PTR_ERR(cryp->tx),
>> + "Error requesting tx dma channel.\n");
>> +
>> + cryp->rx = dma_request_chan(cryp->dev, "rx");
>> + if (IS_ERR(cryp->rx)) {
>> + dma_release_channel(cryp->tx);
>> + return dev_err_probe(cryp->dev, PTR_ERR(cryp->rx),
>> + "Error requesting rx dma channel.\n");
>> + }
>> +
>> + return 0;
>> +}
>> +
>> +static void starfive_dma_cleanup(struct starfive_cryp_dev *cryp)
>> +{
>> + dma_release_channel(cryp->tx);
>> + dma_release_channel(cryp->rx);
>> +}
>> +
>> +static int starfive_cryp_probe(struct platform_device *pdev)
>> +{
[...]
>> +
>> + ret = crypto_engine_start(cryp->engine);
>> + if (ret)
>> + goto err_engine_start;
>> +
>> + return 0;
>> +
>> +err_engine_start:
>> + crypto_engine_exit(cryp->engine);
>> +err_engine:
>> + starfive_dma_cleanup(cryp);
>> +err_dma_init:
>> + spin_lock(&dev_list.lock);
>> + list_del(&cryp->list);
>> + spin_unlock(&dev_list.lock);
>
> I think that there should be:
> clk_disable_unprepare(cryp->hclk);
> clk_disable_unprepare(cryp->ahb);
> reset_control_assert(cryp->rst);
>
> as in the remove function.
>
Will add these in next version.
>> +
>> + return ret;
>> +}
>> +
>> +static int starfive_cryp_remove(struct platform_device *pdev)
>> +{
>> + struct starfive_cryp_dev *cryp = platform_get_drvdata(pdev);
>> +
>> + if (!cryp)
>> + return -ENODEV;
>
> I don't think that this can happen.
>
I'll update this too along with your other comments.
Thanks for taking time reviewing this patch series.
Best regards,
Jia Jie