Add the required bits to support Inline Crypto Engine on SC7280 SoC with
UFS.
Signed-off-by: Luca Weiss <[email protected]>
---
Luca Weiss (2):
dt-bindings: crypto: ice: Document sc7280 inline crypto engine
arm64: dts: qcom: sc7280: Add inline crypto engine
.../devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml | 1 +
arch/arm64/boot/dts/qcom/sc7280.dtsi | 9 +++++++++
2 files changed, 10 insertions(+)
---
base-commit: 5f19977109ce685937fee9feea9b807599dfc925
change-id: 20231208-sc7280-ice-a550626bfc09
Best regards,
--
Luca Weiss <[email protected]>
Document the compatible used for the inline crypto engine found on
SC7280.
Signed-off-by: Luca Weiss <[email protected]>
---
Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml b/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml
index 09e43157cc71..a43527fb2ceb 100644
--- a/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml
+++ b/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml
@@ -14,6 +14,7 @@ properties:
items:
- enum:
- qcom,sa8775p-inline-crypto-engine
+ - qcom,sc7280-inline-crypto-engine
- qcom,sm8450-inline-crypto-engine
- qcom,sm8550-inline-crypto-engine
- qcom,sm8650-inline-crypto-engine
--
2.44.0
Add the ICE found on sc7280 and link it to the UFS node.
For reference:
[ 0.261424] qcom-ice 1d88000.crypto: Found QC Inline Crypto Engine (ICE) v3.2.0
Signed-off-by: Luca Weiss <[email protected]>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 83b5b76ba179..3ea5f9cf040e 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -2314,6 +2314,8 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
<0 0>,
<0 0>,
<0 0>;
+ qcom,ice = <&ice>;
+
status = "disabled";
};
@@ -2336,6 +2338,13 @@ ufs_mem_phy: phy@1d87000 {
status = "disabled";
};
+ ice: crypto@1d88000 {
+ compatible = "qcom,sc7280-inline-crypto-engine",
+ "qcom,inline-crypto-engine";
+ reg = <0 0x01d88000 0 0x8000>;
+ clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>;
+ };
+
cryptobam: dma-controller@1dc4000 {
compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
reg = <0x0 0x01dc4000 0x0 0x28000>;
--
2.44.0
On 3/13/24 13:53, Luca Weiss wrote:
> Add the ICE found on sc7280 and link it to the UFS node.
>
> For reference:
>
> [ 0.261424] qcom-ice 1d88000.crypto: Found QC Inline Crypto Engine (ICE) v3.2.0
>
> Signed-off-by: Luca Weiss <[email protected]>
> ---
Reviewed-by: Konrad Dybcio <[email protected]>
Konrad
On 13/03/2024 13:53, Luca Weiss wrote:
> Document the compatible used for the inline crypto engine found on
> SC7280.
>
> Signed-off-by: Luca Weiss <[email protected]>
> ---
Acked-by: Krzysztof Kozlowski <[email protected]>
Best regards,
Krzysztof
On Wed, Mar 13, 2024 at 01:53:14PM +0100, Luca Weiss wrote:
> Document the compatible used for the inline crypto engine found on
> SC7280.
>
> Signed-off-by: Luca Weiss <[email protected]>
> ---
> Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml | 1 +
> 1 file changed, 1 insertion(+)
Patch applied. Thanks.
--
Email: Herbert Xu <[email protected]>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
On Wed, 13 Mar 2024 13:53:13 +0100, Luca Weiss wrote:
> Add the required bits to support Inline Crypto Engine on SC7280 SoC with
> UFS.
>
>
Applied, thanks!
[2/2] arm64: dts: qcom: sc7280: Add inline crypto engine
commit: dfd5ee7b34bb7611d4d2f4f3cb37152baeaae96d
Best regards,
--
Bjorn Andersson <[email protected]>