On Wed, Jan 15, 2020 at 10:12:46PM +0800, Zhangfei Gao wrote:
> From: Kenneth Lee <[email protected]>
>
> Uacce (Unified/User-space-access-intended Accelerator Framework) targets to
> provide Shared Virtual Addressing (SVA) between accelerators and processes.
> So accelerator can access any data structure of the main cpu.
> This differs from the data sharing between cpu and io device, which share
> only data content rather than address.
> Since unified address, hardware and user space of process can share the
> same virtual address in the communication.
>
> Uacce create a chrdev for every registration, the queue is allocated to
> the process when the chrdev is opened. Then the process can access the
> hardware resource by interact with the queue file. By mmap the queue
> file space to user space, the process can directly put requests to the
> hardware without syscall to the kernel space.
>
> The IOMMU core only tracks mm<->device bonds at the moment, because it
> only needs to handle IOTLB invalidation and PASID table entries. However
> uacce needs a finer granularity since multiple queues from the same
> device can be bound to an mm. When the mm exits, all bound queues must
> be stopped so that the IOMMU can safely clear the PASID table entry and
> reallocate the PASID.
>
> An intermediate struct uacce_mm links uacce devices and queues.
> Note that an mm may be bound to multiple devices but an uacce_mm
> structure only ever belongs to a single device, because we don't need
> anything more complex (if multiple devices are bound to one mm, then
> we'll create one uacce_mm for each bond).
>
> uacce_device --+-- uacce_mm --+-- uacce_queue
> | '-- uacce_queue
> |
> '-- uacce_mm --+-- uacce_queue
> +-- uacce_queue
> '-- uacce_queue
>
> Reviewed-by: Jonathan Cameron <[email protected]>
> Signed-off-by: Kenneth Lee <[email protected]>
> Signed-off-by: Zaibo Xu <[email protected]>
> Signed-off-by: Zhou Wang <[email protected]>
> Signed-off-by: Jean-Philippe Brucker <[email protected]>
> Signed-off-by: Zhangfei Gao <[email protected]>
Looks much saner now, thanks for all of the work on this:
Reviewed-by: Greg Kroah-Hartman <[email protected]>
Or am I supposed to take this in my tree? If so, I can, but I need an
ack for the crypto parts.
thanks,
greg k-h
On 2020/2/11 上午7:37, Greg Kroah-Hartman wrote:
> On Wed, Jan 15, 2020 at 10:12:46PM +0800, Zhangfei Gao wrote:
>> From: Kenneth Lee <[email protected]>
>>
>> Uacce (Unified/User-space-access-intended Accelerator Framework) targets to
>> provide Shared Virtual Addressing (SVA) between accelerators and processes.
>> So accelerator can access any data structure of the main cpu.
>> This differs from the data sharing between cpu and io device, which share
>> only data content rather than address.
>> Since unified address, hardware and user space of process can share the
>> same virtual address in the communication.
>>
>> Uacce create a chrdev for every registration, the queue is allocated to
>> the process when the chrdev is opened. Then the process can access the
>> hardware resource by interact with the queue file. By mmap the queue
>> file space to user space, the process can directly put requests to the
>> hardware without syscall to the kernel space.
>>
>> The IOMMU core only tracks mm<->device bonds at the moment, because it
>> only needs to handle IOTLB invalidation and PASID table entries. However
>> uacce needs a finer granularity since multiple queues from the same
>> device can be bound to an mm. When the mm exits, all bound queues must
>> be stopped so that the IOMMU can safely clear the PASID table entry and
>> reallocate the PASID.
>>
>> An intermediate struct uacce_mm links uacce devices and queues.
>> Note that an mm may be bound to multiple devices but an uacce_mm
>> structure only ever belongs to a single device, because we don't need
>> anything more complex (if multiple devices are bound to one mm, then
>> we'll create one uacce_mm for each bond).
>>
>> uacce_device --+-- uacce_mm --+-- uacce_queue
>> | '-- uacce_queue
>> |
>> '-- uacce_mm --+-- uacce_queue
>> +-- uacce_queue
>> '-- uacce_queue
>>
>> Reviewed-by: Jonathan Cameron <[email protected]>
>> Signed-off-by: Kenneth Lee <[email protected]>
>> Signed-off-by: Zaibo Xu <[email protected]>
>> Signed-off-by: Zhou Wang <[email protected]>
>> Signed-off-by: Jean-Philippe Brucker <[email protected]>
>> Signed-off-by: Zhangfei Gao <[email protected]>
> Looks much saner now, thanks for all of the work on this:
>
> Reviewed-by: Greg Kroah-Hartman <[email protected]>
>
> Or am I supposed to take this in my tree? If so, I can, but I need an
> ack for the crypto parts.
>
>
That's Great, thanks Greg.
For the convenience, I rebase the patchset on 5.6-rc1.
Not sure is there any conflict to crypto tree.
How about just pick the uacce part, patch 1 , 2.
We can resend the crypto part to crypto tree.
Thanks
On Mon, Feb 10, 2020 at 03:37:11PM -0800, Greg Kroah-Hartman wrote:
>
> Looks much saner now, thanks for all of the work on this:
>
> Reviewed-by: Greg Kroah-Hartman <[email protected]>
>
> Or am I supposed to take this in my tree? If so, I can, but I need an
> ack for the crypto parts.
I can take this series through the crypto tree if that's fine with
you.
Thank,
--
Email: Herbert Xu <[email protected]>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
On Thu, Feb 13, 2020 at 05:15:10PM +0800, Herbert Xu wrote:
> On Mon, Feb 10, 2020 at 03:37:11PM -0800, Greg Kroah-Hartman wrote:
> >
> > Looks much saner now, thanks for all of the work on this:
> >
> > Reviewed-by: Greg Kroah-Hartman <[email protected]>
> >
> > Or am I supposed to take this in my tree? If so, I can, but I need an
> > ack for the crypto parts.
>
> I can take this series through the crypto tree if that's fine with
> you.
Please do, thanks!
greg k-h