2023-07-26 11:40:40

by LeoLiu-oc

[permalink] [raw]
Subject: [PATCH] hwrng: add Zhaoxin HW RNG driver

From: leoliu-oc <[email protected]>

Add support for Zhaoxin HW RNG.

Signed-off-by: leoliu-oc <[email protected]>
---
drivers/char/hw_random/Kconfig | 13 +++
drivers/char/hw_random/Makefile | 1 +
drivers/char/hw_random/via-rng.c | 17 ++--
drivers/char/hw_random/zhaoxin-rng.c | 116 +++++++++++++++++++++++++++
4 files changed, 139 insertions(+), 8 deletions(-)
create mode 100644 drivers/char/hw_random/zhaoxin-rng.c

diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig
index e0b3786ca51b..3b3c00e87b7b 100644
--- a/drivers/char/hw_random/Kconfig
+++ b/drivers/char/hw_random/Kconfig
@@ -150,6 +150,19 @@ config HW_RANDOM_VIA

If unsure, say Y.

+config HW_RANDOM_ZHAOXIN
+ tristate "Zhaoxin HW Random Number Generator support"
+ depends on X86
+ default HW_RANDOM
+ help
+ This driver provides kernel-side support for the Random Number
+ Generator hardware found on Zhaoxin based motherboards.
+
+ To compile this driver as a module, choose M here: the
+ module will be called zhaoxin-rng.
+
+ If unsure, say Y.
+
config HW_RANDOM_IXP4XX
tristate "Intel IXP4xx NPU HW Pseudo-Random Number Generator support"
depends on ARCH_IXP4XX || COMPILE_TEST
diff --git a/drivers/char/hw_random/Makefile b/drivers/char/hw_random/Makefile
index 32549a1186dc..ef5b3ae0794d 100644
--- a/drivers/char/hw_random/Makefile
+++ b/drivers/char/hw_random/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_HW_RANDOM_GEODE) += geode-rng.o
obj-$(CONFIG_HW_RANDOM_N2RNG) += n2-rng.o
n2-rng-y := n2-drv.o n2-asm.o
obj-$(CONFIG_HW_RANDOM_VIA) += via-rng.o
+obj-$(CONFIG_HW_RANDOM_ZHAOXIN) += zhaoxin-rng.o
obj-$(CONFIG_HW_RANDOM_EXYNOS) += exynos-trng.o
obj-$(CONFIG_HW_RANDOM_IXP4XX) += ixp4xx-rng.o
obj-$(CONFIG_HW_RANDOM_OMAP) += omap-rng.o
diff --git a/drivers/char/hw_random/via-rng.c b/drivers/char/hw_random/via-rng.c
index a9a0a3b09c8b..33a6e2fdacd1 100644
--- a/drivers/char/hw_random/via-rng.c
+++ b/drivers/char/hw_random/via-rng.c
@@ -135,7 +135,7 @@ static int via_rng_init(struct hwrng *rng)
* is always enabled if CPUID rng_en is set. There is no
* RNG configuration like it used to be the case in this
* register */
- if (((c->x86 == 6) && (c->x86_model >= 0x0f)) || (c->x86 > 6)){
+ if ((c->x86 == 6) && (c->x86_model >= 0x0f)) {
if (!boot_cpu_has(X86_FEATURE_XSTORE_EN)) {
pr_err(PFX "can't enable hardware RNG "
"if XSTORE is not enabled\n");
@@ -191,13 +191,20 @@ static struct hwrng via_rng = {
.data_read = via_rng_data_read,
};

+static const struct x86_cpu_id via_rng_cpu_ids[] = {
+ X86_MATCH_VENDOR_FAM_FEATURE(CENTAUR, 6, X86_FEATURE_XSTORE, NULL),
+ {}
+};
+MODULE_DEVICE_TABLE(x86cpu, via_rng_cpu_ids);

static int __init via_rng_mod_init(void)
{
int err;

- if (!boot_cpu_has(X86_FEATURE_XSTORE))
+ if (!x86_match_cpu(via_rng_cpu_ids)) {
+ pr_err(PFX "The CPU isn't support XSTORE.\n");
return -ENODEV;
+ }

pr_info("VIA RNG detected\n");
err = hwrng_register(&via_rng);
@@ -217,11 +224,5 @@ static void __exit via_rng_mod_exit(void)
}
module_exit(via_rng_mod_exit);

-static struct x86_cpu_id __maybe_unused via_rng_cpu_id[] = {
- X86_MATCH_FEATURE(X86_FEATURE_XSTORE, NULL),
- {}
-};
-MODULE_DEVICE_TABLE(x86cpu, via_rng_cpu_id);
-
MODULE_DESCRIPTION("H/W RNG driver for VIA CPU with PadLock");
MODULE_LICENSE("GPL");
diff --git a/drivers/char/hw_random/zhaoxin-rng.c b/drivers/char/hw_random/zhaoxin-rng.c
new file mode 100644
index 000000000000..2e657b227c5b
--- /dev/null
+++ b/drivers/char/hw_random/zhaoxin-rng.c
@@ -0,0 +1,116 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * RNG driver for Zhaoxin RNGs
+ *
+ * Copyright 2005 (c) MontaVista Software, Inc.
+ *
+ * with the majority of the code coming from:
+ *
+ * Hardware driver for the Intel/AMD/VIA Random Number Generators (RNG)
+ * (c) Copyright 2003 Red Hat Inc <[email protected]>
+ *
+ * derived from
+ *
+ * Hardware driver for the AMD 768 Random Number Generator (RNG)
+ * (c) Copyright 2001 Red Hat Inc
+ *
+ * derived from
+ *
+ * Hardware driver for Intel i810 Random Number Generator (RNG)
+ * Copyright 2000,2001 Jeff Garzik <[email protected]>
+ * Copyright 2000,2001 Philipp Rumpf <[email protected]>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <crypto/padlock.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/hw_random.h>
+#include <linux/delay.h>
+#include <linux/io.h>
+#include <linux/cpufeature.h>
+#include <asm/cpu_device_id.h>
+#include <asm/fpu/api.h>
+
+enum {
+ ZHAOXIN_RNG_CHUNK_8 = 0x00, /* 64 rand bits, 64 stored bits*/
+ ZHAOXIN_RNG_CHUNK_4 = 0x01, /* 32 rand bits, 32 stored bits */
+ ZHAOXIN_RNG_CHUNK_2 = 0x02, /* 16 rand bits, 32 stored bits */
+ ZHAOXIN_RNG_CHUNK_1 = 0x03, /* 8 rand bits, 32 stored bits */
+ ZHAOXIN_RNG_MAX_SIZE = (128*1024),
+};
+
+static int zhaoxin_rng_init(struct hwrng *rng)
+{
+ if (!boot_cpu_has(X86_FEATURE_XSTORE_EN)) {
+ pr_err(PFX "can't enable hardware RNG if XSTORE is not enabled\n");
+ return -ENODEV;
+ }
+ return 0;
+}
+
+static inline int rep_xstore(size_t size, size_t factor, void *result)
+{
+ __asm__ __volatile__ (
+ "movq %0, %%rcx\n"
+ "movq %1, %%rdx\n"
+ "movq %2, %%rdi\n"
+ ".byte 0xf3, 0x0f, 0xa7, 0xc0"
+ :
+ : "r"(size), "r"(factor), "r"(result)
+ : "%rcx", "%rdx", "%rdi", "memory");
+
+ return 0;
+}
+
+static int zhaoxin_rng_read(struct hwrng *rng, void *data, size_t max, bool wait)
+{
+ if (max > ZHAOXIN_RNG_MAX_SIZE)
+ max = ZHAOXIN_RNG_MAX_SIZE;
+ rep_xstore(max, ZHAOXIN_RNG_CHUNK_1, data);
+ return max;
+}
+
+static struct hwrng zhaoxin_rng = {
+ .name = "zhaoxin",
+ .init = zhaoxin_rng_init,
+ .read = zhaoxin_rng_read,
+};
+
+static const struct x86_cpu_id zhaoxin_rng_cpu_ids[] = {
+ X86_MATCH_VENDOR_FAM_FEATURE(ZHAOXIN, 6, X86_FEATURE_XSTORE, NULL),
+ X86_MATCH_VENDOR_FAM_FEATURE(ZHAOXIN, 7, X86_FEATURE_XSTORE, NULL),
+ X86_MATCH_VENDOR_FAM_FEATURE(CENTAUR, 7, X86_FEATURE_XSTORE, NULL),
+ {}
+};
+MODULE_DEVICE_TABLE(x86cpu, zhaoxin_rng_cpu_ids);
+
+static int __init zhaoxin_rng_mod_init(void)
+{
+ int err;
+
+ if (!x86_match_cpu(zhaoxin_rng_cpu_ids)) {
+ pr_err(PFX "The CPU isn't support XSTORE.\n");
+ return -ENODEV;
+ }
+
+ pr_info("Zhaoxin RNG detected\n");
+ err = hwrng_register(&zhaoxin_rng);
+ if (err)
+ pr_err(PFX "RNG registering failed (%d)\n", err);
+
+ return err;
+}
+module_init(zhaoxin_rng_mod_init);
+
+static void __exit zhaoxin_rng_mod_exit(void)
+{
+ hwrng_unregister(&zhaoxin_rng);
+}
+module_exit(zhaoxin_rng_mod_exit);
+MODULE_DESCRIPTION("H/W RNG driver for Zhaoxin CPU");
+MODULE_AUTHOR("[email protected]");
+MODULE_LICENSE("GPL");
--
2.34.1



2023-07-26 12:37:17

by Martin Kaiser

[permalink] [raw]
Subject: Re: [PATCH] hwrng: add Zhaoxin HW RNG driver

Hi,

some quick remarks. Feel free to correct me if I misunderstood
something.

LeoLiu-oc ([email protected]) wrote:

> From: leoliu-oc <[email protected]>

> Add support for Zhaoxin HW RNG.

> Signed-off-by: leoliu-oc <[email protected]>
> ---
> drivers/char/hw_random/Kconfig | 13 +++
> drivers/char/hw_random/Makefile | 1 +
> drivers/char/hw_random/via-rng.c | 17 ++--
> drivers/char/hw_random/zhaoxin-rng.c | 116 +++++++++++++++++++++++++++
> 4 files changed, 139 insertions(+), 8 deletions(-)
> create mode 100644 drivers/char/hw_random/zhaoxin-rng.c

> diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig
> index e0b3786ca51b..3b3c00e87b7b 100644
> --- a/drivers/char/hw_random/Kconfig
> +++ b/drivers/char/hw_random/Kconfig
> @@ -150,6 +150,19 @@ config HW_RANDOM_VIA

> If unsure, say Y.

> +config HW_RANDOM_ZHAOXIN
> + tristate "Zhaoxin HW Random Number Generator support"
> + depends on X86

depends on X86 || COMPILE_TEST

> + default HW_RANDOM
> + help
> + This driver provides kernel-side support for the Random Number
> + Generator hardware found on Zhaoxin based motherboards.
> +
> + To compile this driver as a module, choose M here: the
> + module will be called zhaoxin-rng.
> +
> + If unsure, say Y.
> +
> config HW_RANDOM_IXP4XX
> tristate "Intel IXP4xx NPU HW Pseudo-Random Number Generator support"
> depends on ARCH_IXP4XX || COMPILE_TEST
> diff --git a/drivers/char/hw_random/Makefile b/drivers/char/hw_random/Makefile
> index 32549a1186dc..ef5b3ae0794d 100644
> --- a/drivers/char/hw_random/Makefile
> +++ b/drivers/char/hw_random/Makefile
> @@ -14,6 +14,7 @@ obj-$(CONFIG_HW_RANDOM_GEODE) += geode-rng.o
> obj-$(CONFIG_HW_RANDOM_N2RNG) += n2-rng.o
> n2-rng-y := n2-drv.o n2-asm.o
> obj-$(CONFIG_HW_RANDOM_VIA) += via-rng.o
> +obj-$(CONFIG_HW_RANDOM_ZHAOXIN) += zhaoxin-rng.o
> obj-$(CONFIG_HW_RANDOM_EXYNOS) += exynos-trng.o
> obj-$(CONFIG_HW_RANDOM_IXP4XX) += ixp4xx-rng.o
> obj-$(CONFIG_HW_RANDOM_OMAP) += omap-rng.o
> diff --git a/drivers/char/hw_random/via-rng.c b/drivers/char/hw_random/via-rng.c
> index a9a0a3b09c8b..33a6e2fdacd1 100644
> --- a/drivers/char/hw_random/via-rng.c
> +++ b/drivers/char/hw_random/via-rng.c
> @@ -135,7 +135,7 @@ static int via_rng_init(struct hwrng *rng)
> * is always enabled if CPUID rng_en is set. There is no
> * RNG configuration like it used to be the case in this
> * register */
> - if (((c->x86 == 6) && (c->x86_model >= 0x0f)) || (c->x86 > 6)){
> + if ((c->x86 == 6) && (c->x86_model >= 0x0f)) {
> if (!boot_cpu_has(X86_FEATURE_XSTORE_EN)) {
> pr_err(PFX "can't enable hardware RNG "
> "if XSTORE is not enabled\n");
> @@ -191,13 +191,20 @@ static struct hwrng via_rng = {
> .data_read = via_rng_data_read,
> };

> +static const struct x86_cpu_id via_rng_cpu_ids[] = {
> + X86_MATCH_VENDOR_FAM_FEATURE(CENTAUR, 6, X86_FEATURE_XSTORE, NULL),
> + {}
> +};
> +MODULE_DEVICE_TABLE(x86cpu, via_rng_cpu_ids);

> static int __init via_rng_mod_init(void)
> {
> int err;

> - if (!boot_cpu_has(X86_FEATURE_XSTORE))
> + if (!x86_match_cpu(via_rng_cpu_ids)) {
> + pr_err(PFX "The CPU isn't support XSTORE.\n");

doesn't support

Generally: Should we print an error message if our driver doesn't
support this cpu? It seems that most other callers of x86_match_cpu
simply return without an error message.

> return -ENODEV;
> + }

> pr_info("VIA RNG detected\n");
> err = hwrng_register(&via_rng);
> @@ -217,11 +224,5 @@ static void __exit via_rng_mod_exit(void)
> }
> module_exit(via_rng_mod_exit);

> -static struct x86_cpu_id __maybe_unused via_rng_cpu_id[] = {
> - X86_MATCH_FEATURE(X86_FEATURE_XSTORE, NULL),
> - {}
> -};
> -MODULE_DEVICE_TABLE(x86cpu, via_rng_cpu_id);
> -
> MODULE_DESCRIPTION("H/W RNG driver for VIA CPU with PadLock");
> MODULE_LICENSE("GPL");
> diff --git a/drivers/char/hw_random/zhaoxin-rng.c b/drivers/char/hw_random/zhaoxin-rng.c
> new file mode 100644
> index 000000000000..2e657b227c5b
> --- /dev/null
> +++ b/drivers/char/hw_random/zhaoxin-rng.c
> @@ -0,0 +1,116 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/*
> + * RNG driver for Zhaoxin RNGs
> + *
> + * Copyright 2005 (c) MontaVista Software, Inc.

Should this be Copyright 2023 by you?

> + *
> + * with the majority of the code coming from:
> + *
> + * Hardware driver for the Intel/AMD/VIA Random Number Generators (RNG)
> + * (c) Copyright 2003 Red Hat Inc <[email protected]>
> + *
> + * derived from
> + *
> + * Hardware driver for the AMD 768 Random Number Generator (RNG)
> + * (c) Copyright 2001 Red Hat Inc
> + *
> + * derived from
> + *
> + * Hardware driver for Intel i810 Random Number Generator (RNG)
> + * Copyright 2000,2001 Jeff Garzik <[email protected]>
> + * Copyright 2000,2001 Philipp Rumpf <[email protected]>
> + *
> + * This file is licensed under the terms of the GNU General Public
> + * License version 2. This program is licensed "as is" without any
> + * warranty of any kind, whether express or implied.
> + */
> +
> +#include <crypto/padlock.h>
> +#include <linux/module.h>
> +#include <linux/kernel.h>
> +#include <linux/hw_random.h>
> +#include <linux/delay.h>
> +#include <linux/io.h>
> +#include <linux/cpufeature.h>
> +#include <asm/cpu_device_id.h>
> +#include <asm/fpu/api.h>
> +
> +enum {
> + ZHAOXIN_RNG_CHUNK_8 = 0x00, /* 64 rand bits, 64 stored bits*/
> + ZHAOXIN_RNG_CHUNK_4 = 0x01, /* 32 rand bits, 32 stored bits */
> + ZHAOXIN_RNG_CHUNK_2 = 0x02, /* 16 rand bits, 32 stored bits */
> + ZHAOXIN_RNG_CHUNK_1 = 0x03, /* 8 rand bits, 32 stored bits */
> + ZHAOXIN_RNG_MAX_SIZE = (128*1024),
> +};
> +
> +static int zhaoxin_rng_init(struct hwrng *rng)
> +{
> + if (!boot_cpu_has(X86_FEATURE_XSTORE_EN)) {
> + pr_err(PFX "can't enable hardware RNG if XSTORE is not enabled\n");
> + return -ENODEV;
> + }

Can't we check this when the driver is loaded? (This init function here
is called when the rng becomes active.)

> + return 0;
> +}
> +
> +static inline int rep_xstore(size_t size, size_t factor, void *result)
> +{
> + __asm__ __volatile__ (
> + "movq %0, %%rcx\n"
> + "movq %1, %%rdx\n"
> + "movq %2, %%rdi\n"
> + ".byte 0xf3, 0x0f, 0xa7, 0xc0"
> + :
> + : "r"(size), "r"(factor), "r"(result)
> + : "%rcx", "%rdx", "%rdi", "memory");
> +
> + return 0;
> +}
> +
> +static int zhaoxin_rng_read(struct hwrng *rng, void *data, size_t max, bool wait)
> +{
> + if (max > ZHAOXIN_RNG_MAX_SIZE)
> + max = ZHAOXIN_RNG_MAX_SIZE;
> + rep_xstore(max, ZHAOXIN_RNG_CHUNK_1, data);
> + return max;
> +}
> +
> +static struct hwrng zhaoxin_rng = {
> + .name = "zhaoxin",
> + .init = zhaoxin_rng_init,
> + .read = zhaoxin_rng_read,
> +};
> +
> +static const struct x86_cpu_id zhaoxin_rng_cpu_ids[] = {
> + X86_MATCH_VENDOR_FAM_FEATURE(ZHAOXIN, 6, X86_FEATURE_XSTORE, NULL),
> + X86_MATCH_VENDOR_FAM_FEATURE(ZHAOXIN, 7, X86_FEATURE_XSTORE, NULL),
> + X86_MATCH_VENDOR_FAM_FEATURE(CENTAUR, 7, X86_FEATURE_XSTORE, NULL),
> + {}
> +};
> +MODULE_DEVICE_TABLE(x86cpu, zhaoxin_rng_cpu_ids);
> +
> +static int __init zhaoxin_rng_mod_init(void)
> +{
> + int err;
> +
> + if (!x86_match_cpu(zhaoxin_rng_cpu_ids)) {
> + pr_err(PFX "The CPU isn't support XSTORE.\n");

Yet again, is this really an error?

> + return -ENODEV;
> + }
> +
> + pr_info("Zhaoxin RNG detected\n");
> + err = hwrng_register(&zhaoxin_rng);
> + if (err)
> + pr_err(PFX "RNG registering failed (%d)\n", err);
> +
> + return err;
> +}
> +module_init(zhaoxin_rng_mod_init);
> +
> +static void __exit zhaoxin_rng_mod_exit(void)
> +{
> + hwrng_unregister(&zhaoxin_rng);
> +}
> +module_exit(zhaoxin_rng_mod_exit);
> +MODULE_DESCRIPTION("H/W RNG driver for Zhaoxin CPU");
> +MODULE_AUTHOR("[email protected]");
> +MODULE_LICENSE("GPL");
> --
> 2.34.1

Best regards,
Martin

2023-07-26 23:49:43

by kernel test robot

[permalink] [raw]
Subject: Re: [PATCH] hwrng: add Zhaoxin HW RNG driver

Hi LeoLiu-oc,

kernel test robot noticed the following build errors:

[auto build test ERROR on char-misc/char-misc-testing]
[also build test ERROR on char-misc/char-misc-next char-misc/char-misc-linus herbert-cryptodev-2.6/master linus/master v6.5-rc3 next-20230726]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url: https://github.com/intel-lab-lkp/linux/commits/LeoLiu-oc/hwrng-add-Zhaoxin-HW-RNG-driver/20230726-193710
base: char-misc/char-misc-testing
patch link: https://lore.kernel.org/r/20230726113553.1965627-1-LeoLiu-oc%40zhaoxin.com
patch subject: [PATCH] hwrng: add Zhaoxin HW RNG driver
config: i386-randconfig-r006-20230726 (https://download.01.org/0day-ci/archive/20230727/[email protected]/config)
compiler: gcc-12 (Debian 12.2.0-14) 12.2.0
reproduce: (https://download.01.org/0day-ci/archive/20230727/[email protected]/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <[email protected]>
| Closes: https://lore.kernel.org/oe-kbuild-all/[email protected]/

All errors (new ones prefixed by >>):

drivers/char/hw_random/zhaoxin-rng.c: Assembler messages:
>> drivers/char/hw_random/zhaoxin-rng.c:57: Error: bad register name `%rcx'
>> drivers/char/hw_random/zhaoxin-rng.c:58: Error: bad register name `%rdx'
>> drivers/char/hw_random/zhaoxin-rng.c:59: Error: bad register name `%rdi'


vim +57 drivers/char/hw_random/zhaoxin-rng.c

54
55 static inline int rep_xstore(size_t size, size_t factor, void *result)
56 {
> 57 __asm__ __volatile__ (
> 58 "movq %0, %%rcx\n"
> 59 "movq %1, %%rdx\n"
60 "movq %2, %%rdi\n"
61 ".byte 0xf3, 0x0f, 0xa7, 0xc0"
62 :
63 : "r"(size), "r"(factor), "r"(result)
64 : "%rcx", "%rdx", "%rdi", "memory");
65
66 return 0;
67 }
68

--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

2023-07-27 02:49:37

by kernel test robot

[permalink] [raw]
Subject: Re: [PATCH] hwrng: add Zhaoxin HW RNG driver

Hi LeoLiu-oc,

kernel test robot noticed the following build errors:

[auto build test ERROR on char-misc/char-misc-testing]
[also build test ERROR on char-misc/char-misc-next char-misc/char-misc-linus herbert-cryptodev-2.6/master linus/master v6.5-rc3 next-20230726]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url: https://github.com/intel-lab-lkp/linux/commits/LeoLiu-oc/hwrng-add-Zhaoxin-HW-RNG-driver/20230726-193710
base: char-misc/char-misc-testing
patch link: https://lore.kernel.org/r/20230726113553.1965627-1-LeoLiu-oc%40zhaoxin.com
patch subject: [PATCH] hwrng: add Zhaoxin HW RNG driver
config: i386-randconfig-i014-20230726 (https://download.01.org/0day-ci/archive/20230727/[email protected]/config)
compiler: clang version 16.0.4 (https://github.com/llvm/llvm-project.git ae42196bc493ffe877a7e3dff8be32035dea4d07)
reproduce: (https://download.01.org/0day-ci/archive/20230727/[email protected]/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <[email protected]>
| Closes: https://lore.kernel.org/oe-kbuild-all/[email protected]/

All errors (new ones prefixed by >>):

>> drivers/char/hw_random/zhaoxin-rng.c:58:2: error: register %rcx is only available in 64-bit mode
"movq %0, %%rcx\n"
^
<inline asm>:1:13: note: instantiated into assembly here
movq %eax, %rcx
^~~~
>> drivers/char/hw_random/zhaoxin-rng.c:59:3: error: register %rdx is only available in 64-bit mode
"movq %1, %%rdx\n"
^
<inline asm>:2:12: note: instantiated into assembly here
movq %ecx, %rdx
^~~~
>> drivers/char/hw_random/zhaoxin-rng.c:60:3: error: register %rdi is only available in 64-bit mode
"movq %2, %%rdi\n"
^
<inline asm>:3:12: note: instantiated into assembly here
movq %edx, %rdi
^~~~
3 errors generated.


vim +58 drivers/char/hw_random/zhaoxin-rng.c

54
55 static inline int rep_xstore(size_t size, size_t factor, void *result)
56 {
57 __asm__ __volatile__ (
> 58 "movq %0, %%rcx\n"
> 59 "movq %1, %%rdx\n"
> 60 "movq %2, %%rdi\n"
61 ".byte 0xf3, 0x0f, 0xa7, 0xc0"
62 :
63 : "r"(size), "r"(factor), "r"(result)
64 : "%rcx", "%rdx", "%rdi", "memory");
65
66 return 0;
67 }
68

--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

2023-07-27 07:03:21

by Corentin Labbe

[permalink] [raw]
Subject: Re: [PATCH] hwrng: add Zhaoxin HW RNG driver

Le Wed, Jul 26, 2023 at 07:35:53PM +0800, LeoLiu-oc a ?crit :
> From: leoliu-oc <[email protected]>
>
> Add support for Zhaoxin HW RNG.
>
> Signed-off-by: leoliu-oc <[email protected]>
> ---
> drivers/char/hw_random/Kconfig | 13 +++
> drivers/char/hw_random/Makefile | 1 +
> drivers/char/hw_random/via-rng.c | 17 ++--

Hello

You are doing changes in via-rng without stating why.
If changes are needed in via-rng, you should do this in a separate patch.

Regards

2023-07-31 03:25:46

by LeoLiu-oc

[permalink] [raw]
Subject: Re: [PATCH] hwrng: add Zhaoxin HW RNG driver



在 2023/7/26 20:13, Martin Kaiser 写道:
> Hi,
>
> some quick remarks. Feel free to correct me if I misunderstood
> something.
>
Thank you very much for your advice, I will fix them in the next version.

> LeoLiu-oc ([email protected]) wrote:
>
>> From: leoliu-oc <[email protected]>
>
>> Add support for Zhaoxin HW RNG.
>
>> Signed-off-by: leoliu-oc <[email protected]>
>> ---
>> drivers/char/hw_random/Kconfig | 13 +++
>> drivers/char/hw_random/Makefile | 1 +
>> drivers/char/hw_random/via-rng.c | 17 ++--
>> drivers/char/hw_random/zhaoxin-rng.c | 116 +++++++++++++++++++++++++++
>> 4 files changed, 139 insertions(+), 8 deletions(-)
>> create mode 100644 drivers/char/hw_random/zhaoxin-rng.c
>
>> diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig
>> index e0b3786ca51b..3b3c00e87b7b 100644
>> --- a/drivers/char/hw_random/Kconfig
>> +++ b/drivers/char/hw_random/Kconfig
>> @@ -150,6 +150,19 @@ config HW_RANDOM_VIA
>
>> If unsure, say Y.
>
>> +config HW_RANDOM_ZHAOXIN
>> + tristate "Zhaoxin HW Random Number Generator support"
>> + depends on X86
>
> depends on X86 || COMPILE_TEST >
Thanks for your advice. I will add it in the next version.

>> + default HW_RANDOM
>> + help
>> + This driver provides kernel-side support for the Random Number
>> + Generator hardware found on Zhaoxin based motherboards.
>> +
>> + To compile this driver as a module, choose M here: the
>> + module will be called zhaoxin-rng.
>> +
>> + If unsure, say Y.
>> +
>> config HW_RANDOM_IXP4XX
>> tristate "Intel IXP4xx NPU HW Pseudo-Random Number Generator support"
>> depends on ARCH_IXP4XX || COMPILE_TEST
>> diff --git a/drivers/char/hw_random/Makefile b/drivers/char/hw_random/Makefile
>> index 32549a1186dc..ef5b3ae0794d 100644
>> --- a/drivers/char/hw_random/Makefile
>> +++ b/drivers/char/hw_random/Makefile
>> @@ -14,6 +14,7 @@ obj-$(CONFIG_HW_RANDOM_GEODE) += geode-rng.o
>> obj-$(CONFIG_HW_RANDOM_N2RNG) += n2-rng.o
>> n2-rng-y := n2-drv.o n2-asm.o
>> obj-$(CONFIG_HW_RANDOM_VIA) += via-rng.o
>> +obj-$(CONFIG_HW_RANDOM_ZHAOXIN) += zhaoxin-rng.o
>> obj-$(CONFIG_HW_RANDOM_EXYNOS) += exynos-trng.o
>> obj-$(CONFIG_HW_RANDOM_IXP4XX) += ixp4xx-rng.o
>> obj-$(CONFIG_HW_RANDOM_OMAP) += omap-rng.o
>> diff --git a/drivers/char/hw_random/via-rng.c b/drivers/char/hw_random/via-rng.c
>> index a9a0a3b09c8b..33a6e2fdacd1 100644
>> --- a/drivers/char/hw_random/via-rng.c
>> +++ b/drivers/char/hw_random/via-rng.c
>> @@ -135,7 +135,7 @@ static int via_rng_init(struct hwrng *rng)
>> * is always enabled if CPUID rng_en is set. There is no
>> * RNG configuration like it used to be the case in this
>> * register */
>> - if (((c->x86 == 6) && (c->x86_model >= 0x0f)) || (c->x86 > 6)){
>> + if ((c->x86 == 6) && (c->x86_model >= 0x0f)) {
>> if (!boot_cpu_has(X86_FEATURE_XSTORE_EN)) {
>> pr_err(PFX "can't enable hardware RNG "
>> "if XSTORE is not enabled\n");
>> @@ -191,13 +191,20 @@ static struct hwrng via_rng = {
>> .data_read = via_rng_data_read,
>> };
>
>> +static const struct x86_cpu_id via_rng_cpu_ids[] = {
>> + X86_MATCH_VENDOR_FAM_FEATURE(CENTAUR, 6, X86_FEATURE_XSTORE, NULL),
>> + {}
>> +};
>> +MODULE_DEVICE_TABLE(x86cpu, via_rng_cpu_ids);
>
>> static int __init via_rng_mod_init(void)
>> {
>> int err;
>
>> - if (!boot_cpu_has(X86_FEATURE_XSTORE))
>> + if (!x86_match_cpu(via_rng_cpu_ids)) {
>> + pr_err(PFX "The CPU isn't support XSTORE.\n");
>
> doesn't support
>
> Generally: Should we print an error message if our driver doesn't
> support this cpu? It seems that most other callers of x86_match_cpu
> simply return without an error message.
>Agree with you. I will remove it in the next version.

>> return -ENODEV;
>> + }
>
>> pr_info("VIA RNG detected\n");
>> err = hwrng_register(&via_rng);
>> @@ -217,11 +224,5 @@ static void __exit via_rng_mod_exit(void)
>> }
>> module_exit(via_rng_mod_exit);
>
>> -static struct x86_cpu_id __maybe_unused via_rng_cpu_id[] = {
>> - X86_MATCH_FEATURE(X86_FEATURE_XSTORE, NULL),
>> - {}
>> -};
>> -MODULE_DEVICE_TABLE(x86cpu, via_rng_cpu_id);
>> -
>> MODULE_DESCRIPTION("H/W RNG driver for VIA CPU with PadLock");
>> MODULE_LICENSE("GPL");
>> diff --git a/drivers/char/hw_random/zhaoxin-rng.c b/drivers/char/hw_random/zhaoxin-rng.c
>> new file mode 100644
>> index 000000000000..2e657b227c5b
>> --- /dev/null
>> +++ b/drivers/char/hw_random/zhaoxin-rng.c
>> @@ -0,0 +1,116 @@
>> +// SPDX-License-Identifier: GPL-2.0-or-later
>> +/*
>> + * RNG driver for Zhaoxin RNGs
>> + *
>> + * Copyright 2005 (c) MontaVista Software, Inc.
>
> Should this be Copyright 2023 by you? >
OK, I will add Copyright information correctly in the next version.

>> + *
>> + * with the majority of the code coming from:
>> + *
>> + * Hardware driver for the Intel/AMD/VIA Random Number Generators (RNG)
>> + * (c) Copyright 2003 Red Hat Inc <[email protected]>
>> + *
>> + * derived from
>> + *
>> + * Hardware driver for the AMD 768 Random Number Generator (RNG)
>> + * (c) Copyright 2001 Red Hat Inc
>> + *
>> + * derived from
>> + *
>> + * Hardware driver for Intel i810 Random Number Generator (RNG)
>> + * Copyright 2000,2001 Jeff Garzik <[email protected]>
>> + * Copyright 2000,2001 Philipp Rumpf <[email protected]>
>> + *
>> + * This file is licensed under the terms of the GNU General Public
>> + * License version 2. This program is licensed "as is" without any
>> + * warranty of any kind, whether express or implied.
>> + */
>> +
>> +#include <crypto/padlock.h>
>> +#include <linux/module.h>
>> +#include <linux/kernel.h>
>> +#include <linux/hw_random.h>
>> +#include <linux/delay.h>
>> +#include <linux/io.h>
>> +#include <linux/cpufeature.h>
>> +#include <asm/cpu_device_id.h>
>> +#include <asm/fpu/api.h>
>> +
>> +enum {
>> + ZHAOXIN_RNG_CHUNK_8 = 0x00, /* 64 rand bits, 64 stored bits*/
>> + ZHAOXIN_RNG_CHUNK_4 = 0x01, /* 32 rand bits, 32 stored bits */
>> + ZHAOXIN_RNG_CHUNK_2 = 0x02, /* 16 rand bits, 32 stored bits */
>> + ZHAOXIN_RNG_CHUNK_1 = 0x03, /* 8 rand bits, 32 stored bits */
>> + ZHAOXIN_RNG_MAX_SIZE = (128*1024),
>> +};
>> +
>> +static int zhaoxin_rng_init(struct hwrng *rng)
>> +{
>> + if (!boot_cpu_has(X86_FEATURE_XSTORE_EN)) {
>> + pr_err(PFX "can't enable hardware RNG if XSTORE is not enabled\n");
>> + return -ENODEV;
>> + }
>
> Can't we check this when the driver is loaded? (This init function here
> is called when the rng becomes active.) >
The XSTORE feature has two related macro definitions,X86_FEATURE_XSTORE
and X86_FEATURE_XSTORE_EN.Indicates that the XSTORE feature is present
and enabled,respectively. X86_FEATURE_XSTORE has been checked when the
driver is loaded. X86_FEATURE_XSTORE_EN is placed in the init function
to check whether it is enabled.

This is also a reference to other driver, such as via-rng.c.

>> + return 0;
>> +}
>> +
>> +static inline int rep_xstore(size_t size, size_t factor, void *result)
>> +{
>> + __asm__ __volatile__ (
>> + "movq %0, %%rcx\n"
>> + "movq %1, %%rdx\n"
>> + "movq %2, %%rdi\n"
>> + ".byte 0xf3, 0x0f, 0xa7, 0xc0"
>> + :
>> + : "r"(size), "r"(factor), "r"(result)
>> + : "%rcx", "%rdx", "%rdi", "memory");
>> +
>> + return 0;
>> +}
>> +
>> +static int zhaoxin_rng_read(struct hwrng *rng, void *data, size_t max, bool wait)
>> +{
>> + if (max > ZHAOXIN_RNG_MAX_SIZE)
>> + max = ZHAOXIN_RNG_MAX_SIZE;
>> + rep_xstore(max, ZHAOXIN_RNG_CHUNK_1, data);
>> + return max;
>> +}
>> +
>> +static struct hwrng zhaoxin_rng = {
>> + .name = "zhaoxin",
>> + .init = zhaoxin_rng_init,
>> + .read = zhaoxin_rng_read,
>> +};
>> +
>> +static const struct x86_cpu_id zhaoxin_rng_cpu_ids[] = {
>> + X86_MATCH_VENDOR_FAM_FEATURE(ZHAOXIN, 6, X86_FEATURE_XSTORE, NULL),
>> + X86_MATCH_VENDOR_FAM_FEATURE(ZHAOXIN, 7, X86_FEATURE_XSTORE, NULL),
>> + X86_MATCH_VENDOR_FAM_FEATURE(CENTAUR, 7, X86_FEATURE_XSTORE, NULL),
>> + {}
>> +};
>> +MODULE_DEVICE_TABLE(x86cpu, zhaoxin_rng_cpu_ids);
>> +
>> +static int __init zhaoxin_rng_mod_init(void)
>> +{
>> + int err;
>> +
>> + if (!x86_match_cpu(zhaoxin_rng_cpu_ids)) {
>> + pr_err(PFX "The CPU isn't support XSTORE.\n");
>
> Yet again, is this really an error?
>
Yes, as discussed above. I will fix it in the next version.

>> + return -ENODEV;
>> + }
>> +
>> + pr_info("Zhaoxin RNG detected\n");
>> + err = hwrng_register(&zhaoxin_rng);
>> + if (err)
>> + pr_err(PFX "RNG registering failed (%d)\n", err);
>> +
>> + return err;
>> +}
>> +module_init(zhaoxin_rng_mod_init);
>> +
>> +static void __exit zhaoxin_rng_mod_exit(void)
>> +{
>> + hwrng_unregister(&zhaoxin_rng);
>> +}
>> +module_exit(zhaoxin_rng_mod_exit);
>> +MODULE_DESCRIPTION("H/W RNG driver for Zhaoxin CPU");
>> +MODULE_AUTHOR("[email protected]");
>> +MODULE_LICENSE("GPL");
>> --
>> 2.34.1
>
> Best regards,
> Martin