Code cleanup.
Roland Vossen (5):
staging: brcm80211: removed ASSERTs from aiutils.c
staging: brcm80211: removed ASSERTs from wlc_pmu.c
staging: brcm80211: removed ASSERTs from siutils.c
staging: brcm80211: removed ASSERTs from hnddma.c and sbutils.c
staging: brcm80211: moved ASSERT logic to fullmac driver
drivers/staging/brcm80211/brcmfmac/bcmsdh.c | 2 +
drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c | 3 +
.../brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c | 3 +
drivers/staging/brcm80211/brcmfmac/dhd.h | 10 +++
drivers/staging/brcm80211/brcmfmac/dhd_pmu.c | 3 +-
drivers/staging/brcm80211/brcmfmac/wl_iw.c | 50 +++++++++++++
drivers/staging/brcm80211/brcmsmac/aiutils.c | 78 +------------------
drivers/staging/brcm80211/brcmsmac/wlc_pmu.c | 50 +------------
drivers/staging/brcm80211/include/bcmdefs.h | 6 --
drivers/staging/brcm80211/include/bcmutils.h | 10 ---
drivers/staging/brcm80211/util/bcmutils.c | 50 -------------
drivers/staging/brcm80211/util/hnddma.c | 2 -
drivers/staging/brcm80211/util/sbutils.c | 16 +----
drivers/staging/brcm80211/util/siutils.c | 49 +-----------
14 files changed, 82 insertions(+), 250 deletions(-)
Code cleanup.
Signed-off-by: Roland Vossen <[email protected]>
Reviewed-by: Arend van Spriel <[email protected]>
---
drivers/staging/brcm80211/util/siutils.c | 49 +++--------------------------
1 files changed, 5 insertions(+), 44 deletions(-)
diff --git a/drivers/staging/brcm80211/util/siutils.c b/drivers/staging/brcm80211/util/siutils.c
index 6e307d1..7f6061d 100644
--- a/drivers/staging/brcm80211/util/siutils.c
+++ b/drivers/staging/brcm80211/util/siutils.c
@@ -156,7 +156,6 @@ static bool si_buscore_setup(si_info_t *sii, chipcregs_t *cc, uint bustype,
uint pciidx, pcieidx, pcirev, pcierev;
cc = si_setcoreidx(&sii->pub, SI_CC_IDX);
- ASSERT(cc);
/* get chipcommon rev */
sii->pub.ccrev = (int)si_corerev(&sii->pub);
@@ -292,7 +291,6 @@ static __used void si_nvram_process(si_info_t *sii, char *pvars)
if (sii->pub.boardtype == 0) {
SI_ERROR(("si_doattach: unknown board type\n"));
- ASSERT(sii->pub.boardtype);
}
sii->pub.boardflags = getintvar(pvars, "boardflags");
@@ -309,8 +307,6 @@ static si_info_t *si_doattach(si_info_t *sii, uint devid,
chipcregs_t *cc;
uint origidx;
- ASSERT(GOODREGS(regs));
-
memset((unsigned char *) sii, 0, sizeof(si_info_t));
savewin = 0;
@@ -431,13 +427,11 @@ void si_deregister_intr_callback(si_t *sih)
uint si_flag(si_t *sih)
{
- ASSERT(0);
return 0;
}
void si_setint(si_t *sih, int siflag)
{
- ASSERT(0);
}
uint si_coreidx(si_t *sih)
@@ -512,7 +506,6 @@ void *si_switch_core(si_t *sih, uint coreid, uint *origidx, uint *intr_val)
INTR_OFF(sii, *intr_val);
*origidx = sii->curidx;
cc = si_setcore(sih, coreid, 0);
- ASSERT(cc != NULL);
return cc;
}
@@ -533,13 +526,11 @@ void si_restore_core(si_t *sih, uint coreid, uint intr_val)
u32 si_core_cflags(si_t *sih, u32 mask, u32 val)
{
- ASSERT(0);
return 0;
}
u32 si_core_sflags(si_t *sih, u32 mask, u32 val)
{
- ASSERT(0);
return 0;
}
@@ -615,8 +606,6 @@ static uint si_slowclk_src(si_info_t *sii)
chipcregs_t *cc;
u32 val;
- ASSERT(SI_FAST(sii) || si_coreid(&sii->pub) == CC_CORE_ID);
-
if (sii->pub.ccrev < 6) {
if (sii->pub.bustype == PCI_BUS) {
pci_read_config_dword(sii->pbus, PCI_GPIO_OUT,
@@ -632,17 +621,15 @@ static uint si_slowclk_src(si_info_t *sii)
return SCC_SS_XTAL;
}
-/* return the ILP (slowclock) min or max frequency */
+/*
+ * return the ILP (slowclock) min or max frequency
+ * precondition: we've established the chip has dynamic clk control
+ */
static uint si_slowclk_freq(si_info_t *sii, bool max_freq, chipcregs_t *cc)
{
u32 slowclk;
uint div;
- ASSERT(SI_FAST(sii) || si_coreid(&sii->pub) == CC_CORE_ID);
-
- /* shouldn't be here unless we've established the chip has dynamic clk control */
- ASSERT(R_REG(&cc->capabilities) & CC_CAP_PWR_CTL);
-
slowclk = si_slowclk_src(sii);
if (sii->pub.ccrev < 6) {
if (slowclk == SCC_SS_PCI)
@@ -663,8 +650,6 @@ static uint si_slowclk_freq(si_info_t *sii, bool max_freq, chipcregs_t *cc)
else if (slowclk == SCC_SS_PCI)
return max_freq ? (PCIMAXFREQ / div)
: (PCIMINFREQ / div);
- else
- ASSERT(0);
} else {
/* Chipc rev 10 is InstaClock */
div = R_REG(&cc->system_clk_ctl) >> SYCC_CD_SHIFT;
@@ -724,7 +709,6 @@ void si_clkctl_init(si_t *sih)
if (cc == NULL)
return;
}
- ASSERT(cc != NULL);
/* set all Instaclk chip ILP to 1 MHz */
if (sih->ccrev >= 10)
@@ -772,7 +756,6 @@ u16 si_clkctl_fast_pwrup_delay(si_t *sih)
if (cc == NULL)
goto done;
}
- ASSERT(cc != NULL);
slowminfreq = si_slowclk_freq(sii, false, cc);
fpdelay = (((R_REG(&cc->pll_on_delay) + 2) * 1000000) +
@@ -896,9 +879,6 @@ static bool _si_clkctl_cc(si_info_t *sii, uint mode)
if (sii->pub.ccrev < 6)
return false;
- /* Chips with ccrev 10 are EOL and they don't have SYCC_HR which we use below */
- ASSERT(sii->pub.ccrev != 10);
-
if (!fast) {
INTR_OFF(sii, intr_val);
origidx = sii->curidx;
@@ -914,7 +894,6 @@ static bool _si_clkctl_cc(si_info_t *sii, uint mode)
if (cc == NULL)
goto done;
}
- ASSERT(cc != NULL);
if (!CCCTL_ENAB(&sii->pub) && (sii->pub.ccrev < 20))
goto done;
@@ -937,7 +916,6 @@ static bool _si_clkctl_cc(si_info_t *sii, uint mode)
u32 htavail = CCS_HTAVAIL;
SPINWAIT(((R_REG(&cc->clk_ctl_st) & htavail)
== 0), PMU_MAX_TRANSITION_DLY);
- ASSERT(R_REG(&cc->clk_ctl_st) & htavail);
} else {
udelay(PLL_DELAY);
}
@@ -963,7 +941,7 @@ static bool _si_clkctl_cc(si_info_t *sii, uint mode)
break;
default:
- ASSERT(0);
+ break;
}
done:
@@ -979,9 +957,6 @@ int si_devpath(si_t *sih, char *path, int size)
{
int slen;
- ASSERT(path != NULL);
- ASSERT(size >= SI_DEVPATH_BUFSZ);
-
if (!path || size <= 0)
return -1;
@@ -991,7 +966,6 @@ int si_devpath(si_t *sih, char *path, int size)
slen = snprintf(path, (size_t) size, "sb/%u/", si_coreidx(sih));
break;
case PCI_BUS:
- ASSERT((SI_INFO(sih))->pbus != NULL);
slen = snprintf(path, (size_t) size, "pci/%u/%u/",
((struct pci_dev *)((SI_INFO(sih))->pbus))->bus->number,
PCI_SLOT(
@@ -1005,7 +979,6 @@ int si_devpath(si_t *sih, char *path, int size)
default:
slen = -1;
- ASSERT(0);
break;
}
@@ -1099,14 +1072,12 @@ void si_sdio_init(si_t *sih)
/* get the current core index */
idx = sii->curidx;
- ASSERT(idx == si_findcoreidx(sih, D11_CORE_ID, 0));
/* switch to sdio core */
sdpregs = (sdpcmd_regs_t *) si_setcore(sih, PCMCIA_CORE_ID, 0);
if (!sdpregs)
sdpregs =
(sdpcmd_regs_t *) si_setcore(sih, SDIOD_CORE_ID, 0);
- ASSERT(sdpregs);
SI_MSG(("si_sdio_init: For PCMCIA/SDIO Corerev %d, enable ints from core %d " "through SD core %d (%p)\n", sih->buscorerev, idx, sii->curidx, sdpregs));
@@ -1195,9 +1166,6 @@ void si_pci_setup(si_t *sih, uint coremask)
if (sii->pub.bustype != PCI_BUS)
return;
- ASSERT(PCI(sii) || PCIE(sii));
- ASSERT(sii->pub.buscoreidx != BADIDX);
-
if (PCI(sii)) {
/* get current core index */
idx = sii->curidx;
@@ -1254,8 +1222,6 @@ int si_pci_fixcfg(si_t *sih)
si_info_t *sii = SI_INFO(sih);
- ASSERT(sii->pub.bustype == PCI_BUS);
-
/* Fixup PI in SROM shadow area to enable the correct PCI core access */
/* save the current index */
origidx = si_coreidx(&sii->pub);
@@ -1265,12 +1231,10 @@ int si_pci_fixcfg(si_t *sih)
pcieregs =
(sbpcieregs_t *) si_setcore(&sii->pub, PCIE_CORE_ID, 0);
regs = pcieregs;
- ASSERT(pcieregs != NULL);
reg16 = &pcieregs->sprom[SRSH_PI_OFFSET];
} else if (sii->pub.buscoretype == PCI_CORE_ID) {
pciregs = (struct sbpciregs *)si_setcore(&sii->pub, PCI_CORE_ID, 0);
regs = pciregs;
- ASSERT(pciregs != NULL);
reg16 = &pciregs->sprom[SRSH_PI_OFFSET];
}
pciidx = si_coreidx(&sii->pub);
@@ -1318,8 +1282,6 @@ socram_banksize(si_info_t *sii, sbsocramregs_t *regs, u8 index,
uint banksize, bankinfo;
uint bankidx = index | (mem_type << SOCRAM_BANKIDX_MEMTYPE_SHIFT);
- ASSERT(mem_type <= SOCRAM_MEMTYPE_DEVRAM);
-
W_REG(®s->bankidx, bankidx);
bankinfo = R_REG(®s->bankinfo);
banksize =
@@ -1454,7 +1416,6 @@ bool si_deviceremoved(si_t *sih)
switch (sih->bustype) {
case PCI_BUS:
- ASSERT(sii->pbus != NULL);
pci_read_config_dword(sii->pbus, PCI_CFG_VID, &w);
if ((w & 0xFFFF) != PCI_VENDOR_ID_BROADCOM)
return true;
--
1.7.1
Code cleanup.
Signed-off-by: Roland Vossen <[email protected]>
Reviewed-by: Arend van Spriel <[email protected]>
---
drivers/staging/brcm80211/brcmsmac/wlc_pmu.c | 50 +-------------------------
1 files changed, 1 insertions(+), 49 deletions(-)
diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_pmu.c b/drivers/staging/brcm80211/brcmsmac/wlc_pmu.c
index dacc5ca..d4b941c 100644
--- a/drivers/staging/brcm80211/brcmsmac/wlc_pmu.c
+++ b/drivers/staging/brcm80211/brcmsmac/wlc_pmu.c
@@ -884,7 +884,6 @@ static const pmu1_xtaltab0_t *si_pmu1_xtaldef0(si_t *sih)
default:
break;
}
- ASSERT(0);
return NULL;
}
@@ -906,7 +905,6 @@ static const pmu1_xtaltab0_t *si_pmu1_xtaltab0(si_t *sih)
default:
break;
}
- ASSERT(0);
return NULL;
}
@@ -926,7 +924,6 @@ si_pmu1_alpclk0(si_t *sih, chipcregs_t *cc)
/* Could not find it so assign a default value */
if (xt == NULL || xt->fref == 0)
xt = si_pmu1_xtaldef0(sih);
- ASSERT(xt != NULL && xt->fref != 0);
return xt->fref * 1000;
}
@@ -949,7 +946,6 @@ static u32 si_pmu1_pllfvco0(si_t *sih)
default:
break;
}
- ASSERT(0);
return 0;
}
@@ -1031,7 +1027,6 @@ static void si_pmu1_pllinit0(si_t *sih, chipcregs_t *cc, u32 xtal)
PMURES_BIT(RES4329_HT_AVAIL)));
SPINWAIT(R_REG(&cc->clk_ctl_st) & CCS_HTAVAIL,
PMU_MAX_TRANSITION_DLY);
- ASSERT(!(R_REG(&cc->clk_ctl_st) & CCS_HTAVAIL));
W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL4);
if (xt->fref == 38400)
tmp = 0x200024C0;
@@ -1076,7 +1071,6 @@ static void si_pmu1_pllinit0(si_t *sih, chipcregs_t *cc, u32 xtal)
udelay(100);
SPINWAIT(R_REG(&cc->clk_ctl_st) & CCS_HTAVAIL,
PMU_MAX_TRANSITION_DLY);
- ASSERT(!(R_REG(&cc->clk_ctl_st) & CCS_HTAVAIL));
W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL4);
tmp = 0x200005c0;
W_REG(&cc->pllcontrol_data, tmp);
@@ -1092,7 +1086,6 @@ static void si_pmu1_pllinit0(si_t *sih, chipcregs_t *cc, u32 xtal)
udelay(100);
SPINWAIT(R_REG(&cc->clk_ctl_st) & CCS_HTAVAIL,
PMU_MAX_TRANSITION_DLY);
- ASSERT(!(R_REG(&cc->clk_ctl_st) & CCS_HTAVAIL));
break;
case BCM4330_CHIP_ID:
@@ -1105,11 +1098,10 @@ static void si_pmu1_pllinit0(si_t *sih, chipcregs_t *cc, u32 xtal)
udelay(100);
SPINWAIT(R_REG(&cc->clk_ctl_st) & CCS_HTAVAIL,
PMU_MAX_TRANSITION_DLY);
- ASSERT(!(R_REG(&cc->clk_ctl_st) & CCS_HTAVAIL));
break;
default:
- ASSERT(0);
+ break;
}
/* Write p1div and p2div to pllcontrol[0] */
@@ -1222,7 +1214,6 @@ u32 si_pmu_ilp_clock(si_t *sih)
u32 start, end, delta;
u32 origidx = ai_coreidx(sih);
chipcregs_t *cc = ai_setcoreidx(sih, SI_CC_IDX);
- ASSERT(cc != NULL);
start = R_REG(&cc->pmutimer);
mdelay(ILP_CALC_DUR);
end = R_REG(&cc->pmutimer);
@@ -1239,8 +1230,6 @@ void si_pmu_set_ldo_voltage(si_t *sih, u8 ldo, u8 voltage)
u8 sr_cntl_shift = 0, rc_shift = 0, shift = 0, mask = 0;
u8 addr = 0;
- ASSERT(sih->cccaps & CC_CAP_PMU);
-
switch (sih->chip) {
case BCM4336_CHIP_ID:
switch (ldo) {
@@ -1260,7 +1249,6 @@ void si_pmu_set_ldo_voltage(si_t *sih, u8 ldo, u8 voltage)
mask = 0xf;
break;
default:
- ASSERT(false);
return;
}
break;
@@ -1272,12 +1260,10 @@ void si_pmu_set_ldo_voltage(si_t *sih, u8 ldo, u8 voltage)
mask = 0x1f;
break;
default:
- ASSERT(false);
break;
}
break;
default:
- ASSERT(false);
return;
}
@@ -1299,12 +1285,9 @@ u16 si_pmu_fast_pwrup_delay(si_t *sih)
chn[0] = 0; /* to suppress compile error */
#endif
- ASSERT(sih->cccaps & CC_CAP_PMU);
-
/* Remember original core before switch to chipc */
origidx = ai_coreidx(sih);
cc = ai_setcoreidx(sih, SI_CC_IDX);
- ASSERT(cc != NULL);
switch (sih->chip) {
case BCM43224_CHIP_ID:
@@ -1374,7 +1357,6 @@ void si_pmu_sprom_enable(si_t *sih, bool enable)
/* Remember original core before switch to chipc */
origidx = ai_coreidx(sih);
cc = ai_setcoreidx(sih, SI_CC_IDX);
- ASSERT(cc != NULL);
/* Return to original core */
ai_setcoreidx(sih, origidx);
@@ -1425,12 +1407,9 @@ u32 si_pmu_alp_clock(si_t *sih)
if (!PMUCTL_ENAB(sih))
return clock;
- ASSERT(sih->cccaps & CC_CAP_PMU);
-
/* Remember original core before switch to chipc */
origidx = ai_coreidx(sih);
cc = ai_setcoreidx(sih, SI_CC_IDX);
- ASSERT(cc != NULL);
switch (sih->chip) {
case BCM43224_CHIP_ID:
@@ -1478,7 +1457,6 @@ void si_pmu_spuravoid(si_t *sih, u8 spuravoid)
/* Remember original core before switch to chipc */
cc = (chipcregs_t *) ai_switch_core(sih, CC_CORE_ID, &origidx,
&intr_val);
- ASSERT(cc != NULL);
/* force the HT off */
if (sih->chip == BCM4336_CHIP_ID) {
@@ -1488,7 +1466,6 @@ void si_pmu_spuravoid(si_t *sih, u8 spuravoid)
/* wait for the ht to really go away */
SPINWAIT(((R_REG(&cc->clk_ctl_st) & CCS_HTAVAIL) == 0),
10000);
- ASSERT((R_REG(&cc->clk_ctl_st) & CCS_HTAVAIL) == 0);
}
/* update the pll changes */
@@ -1511,12 +1488,9 @@ void si_pmu_init(si_t *sih)
chipcregs_t *cc;
uint origidx;
- ASSERT(sih->cccaps & CC_CAP_PMU);
-
/* Remember original core before switch to chipc */
origidx = ai_coreidx(sih);
cc = ai_setcoreidx(sih, SI_CC_IDX);
- ASSERT(cc != NULL);
if (sih->pmurev == 1)
AND_REG(&cc->pmucontrol, ~PCTL_NOILP_ON_WAIT);
@@ -1541,8 +1515,6 @@ void si_pmu_chip_init(si_t *sih)
{
uint origidx;
- ASSERT(sih->cccaps & CC_CAP_PMU);
-
/* Gate off SPROM clock and chip select signals */
si_pmu_sprom_enable(sih, false);
@@ -1556,8 +1528,6 @@ void si_pmu_chip_init(si_t *sih)
/* initialize PMU switch/regulators */
void si_pmu_swreg_init(si_t *sih)
{
- ASSERT(sih->cccaps & CC_CAP_PMU);
-
switch (sih->chip) {
case BCM4336_CHIP_ID:
/* Reduce CLDO PWM output voltage to 1.2V */
@@ -1586,12 +1556,9 @@ void si_pmu_pll_init(si_t *sih, uint xtalfreq)
chipcregs_t *cc;
uint origidx;
- ASSERT(sih->cccaps & CC_CAP_PMU);
-
/* Remember original core before switch to chipc */
origidx = ai_coreidx(sih);
cc = ai_setcoreidx(sih, SI_CC_IDX);
- ASSERT(cc != NULL);
switch (sih->chip) {
case BCM4329_CHIP_ID:
@@ -1636,12 +1603,9 @@ void si_pmu_res_init(si_t *sih)
char name[8], *val;
uint i, rsrcs;
- ASSERT(sih->cccaps & CC_CAP_PMU);
-
/* Remember original core before switch to chipc */
origidx = ai_coreidx(sih);
cc = ai_setcoreidx(sih, SI_CC_IDX);
- ASSERT(cc != NULL);
switch (sih->chip) {
case BCM4329_CHIP_ID:
@@ -1715,7 +1679,6 @@ void si_pmu_res_init(si_t *sih)
/* Program up/down timers */
while (pmu_res_updown_table_sz--) {
- ASSERT(pmu_res_updown_table != NULL);
W_REG(&cc->res_table_sel,
pmu_res_updown_table[pmu_res_updown_table_sz].resnum);
W_REG(&cc->res_updn_timer,
@@ -1734,7 +1697,6 @@ void si_pmu_res_init(si_t *sih)
/* Program resource dependencies table */
while (pmu_res_depend_table_sz--) {
- ASSERT(pmu_res_depend_table != NULL);
if (pmu_res_depend_table[pmu_res_depend_table_sz].filter != NULL
&& !(pmu_res_depend_table[pmu_res_depend_table_sz].
filter) (sih))
@@ -1762,7 +1724,6 @@ void si_pmu_res_init(si_t *sih)
[pmu_res_depend_table_sz].depend_mask);
break;
default:
- ASSERT(0);
break;
}
}
@@ -1811,12 +1772,9 @@ u32 si_pmu_measure_alpclk(si_t *sih)
if (sih->pmurev < 10)
return 0;
- ASSERT(sih->cccaps & CC_CAP_PMU);
-
/* Remember original core before switch to chipc */
origidx = ai_coreidx(sih);
cc = ai_setcoreidx(sih, SI_CC_IDX);
- ASSERT(cc != NULL);
if (R_REG(&cc->pmustatus) & PST_EXTLPOAVAIL) {
u32 ilp_ctr, alp_hz;
@@ -1858,7 +1816,6 @@ bool si_pmu_is_otp_powered(si_t *sih)
/* Remember original core before switch to chipc */
idx = ai_coreidx(sih);
cc = ai_setcoreidx(sih, SI_CC_IDX);
- ASSERT(cc != NULL);
switch (sih->chip) {
case BCM4329_CHIP_ID:
@@ -1906,8 +1863,6 @@ void si_pmu_otp_power(si_t *sih, bool on)
uint origidx;
u32 rsrcs = 0; /* rsrcs to turn on/off OTP power */
- ASSERT(sih->cccaps & CC_CAP_PMU);
-
/* Don't do anything if OTP is disabled */
if (ai_is_otp_disabled(sih))
return;
@@ -1915,7 +1870,6 @@ void si_pmu_otp_power(si_t *sih, bool on)
/* Remember original core before switch to chipc */
origidx = ai_coreidx(sih);
cc = ai_setcoreidx(sih, SI_CC_IDX);
- ASSERT(cc != NULL);
switch (sih->chip) {
case BCM4329_CHIP_ID:
@@ -1947,14 +1901,12 @@ void si_pmu_otp_power(si_t *sih, bool on)
OR_REG(&cc->min_res_mask, (rsrcs | deps));
SPINWAIT(!(R_REG(&cc->res_state) & rsrcs),
PMU_MAX_TRANSITION_DLY);
- ASSERT(R_REG(&cc->res_state) & rsrcs);
} else {
AND_REG(&cc->min_res_mask, ~(rsrcs | deps));
}
SPINWAIT((((otps = R_REG(&cc->otpstatus)) & OTPS_READY) !=
(on ? OTPS_READY : 0)), 100);
- ASSERT((otps & OTPS_READY) == (on ? OTPS_READY : 0));
}
/* Return to original core */
--
1.7.1
Code cleanup. Softmac driver does not use ASSERTs anymore.
Signed-off-by: Roland Vossen <[email protected]>
Reviewed-by: Arend van Spriel <[email protected]>
---
drivers/staging/brcm80211/brcmfmac/bcmsdh.c | 2 +
drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c | 3 +
.../brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c | 3 +
drivers/staging/brcm80211/brcmfmac/dhd.h | 10 ++++
drivers/staging/brcm80211/brcmfmac/dhd_pmu.c | 3 +-
drivers/staging/brcm80211/brcmfmac/wl_iw.c | 50 ++++++++++++++++++++
drivers/staging/brcm80211/include/bcmdefs.h | 6 --
drivers/staging/brcm80211/include/bcmutils.h | 10 ----
drivers/staging/brcm80211/util/bcmutils.c | 50 --------------------
9 files changed, 70 insertions(+), 67 deletions(-)
diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh.c
index 282d711..5093564 100644
--- a/drivers/staging/brcm80211/brcmfmac/bcmsdh.c
+++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh.c
@@ -30,6 +30,8 @@
#include <sbsdio.h> /* BRCM sdio device core */
#include <sdio.h> /* sdio spec */
+#include "dngl_stats.h"
+#include "dhd.h"
#define SDIOH_API_ACCESS_RETRY_LIMIT 2
const uint bcmsdh_msglevel = BCMSDH_ERROR_VAL;
diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c
index c80d83d..b2968c8 100644
--- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c
+++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c
@@ -43,6 +43,9 @@ extern void dhdsdio_isr(void *args);
#include <linux/platform_device.h>
#endif /* CONFIG_MACH_SANDGATE2G */
+#include "dngl_stats.h"
+#include "dhd.h"
+
/**
* SDIO Host Controller info
*/
diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c
index a91684e..2792a4d 100644
--- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c
+++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c
@@ -27,6 +27,9 @@
#include <linux/mmc/sdio_func.h>
#include <linux/mmc/sdio_ids.h>
+#include "dngl_stats.h"
+#include "dhd.h"
+
#if !defined(SDIO_VENDOR_ID_BROADCOM)
#define SDIO_VENDOR_ID_BROADCOM 0x02d0
#endif /* !defined(SDIO_VENDOR_ID_BROADCOM) */
diff --git a/drivers/staging/brcm80211/brcmfmac/dhd.h b/drivers/staging/brcm80211/brcmfmac/dhd.h
index 60cf782..99c38dd 100644
--- a/drivers/staging/brcm80211/brcmfmac/dhd.h
+++ b/drivers/staging/brcm80211/brcmfmac/dhd.h
@@ -397,4 +397,14 @@ extern char nv_path[MOD_PARAM_PATHLEN];
extern void dhd_wait_for_event(dhd_pub_t *dhd, bool * lockvar);
extern void dhd_wait_event_wakeup(dhd_pub_t *dhd);
+extern u32 g_assert_type;
+
+#ifdef BCMDBG
+#define ASSERT(exp) \
+ do { if (!(exp)) osl_assert(#exp, __FILE__, __LINE__); } while (0)
+extern void osl_assert(char *exp, char *file, int line);
+#else
+#define ASSERT(exp) do {} while (0)
+#endif /* defined(BCMDBG) */
+
#endif /* _dhd_h_ */
diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_pmu.c b/drivers/staging/brcm80211/brcmfmac/dhd_pmu.c
index f7a1fe1..2318387 100644
--- a/drivers/staging/brcm80211/brcmfmac/dhd_pmu.c
+++ b/drivers/staging/brcm80211/brcmfmac/dhd_pmu.c
@@ -24,7 +24,8 @@
#include <bcmdevs.h>
#include <hndsoc.h>
#include <sbchipc.h>
-
+#include "dngl_stats.h"
+#include "dhd.h"
#include "dhd_pmu.h"
#include "siutils_priv.h"
diff --git a/drivers/staging/brcm80211/brcmfmac/wl_iw.c b/drivers/staging/brcm80211/brcmfmac/wl_iw.c
index b49957f..7e7a935 100644
--- a/drivers/staging/brcm80211/brcmfmac/wl_iw.c
+++ b/drivers/staging/brcm80211/brcmfmac/wl_iw.c
@@ -119,6 +119,9 @@ iscan_info_t *g_iscan;
static const u8 ether_bcast[ETH_ALEN] = {255, 255, 255, 255, 255, 255};
+/* Global ASSERT type flag */
+u32 g_assert_type;
+
static void wl_iw_timerfunc(unsigned long data);
static void wl_iw_set_event_mask(struct net_device *dev);
static int wl_iw_iscan(iscan_info_t *iscan, wlc_ssid_t *ssid, u16 action);
@@ -3742,3 +3745,50 @@ void wl_iw_detach(void)
g_scan = NULL;
}
+
+#if defined(BCMDBG)
+void osl_assert(char *exp, char *file, int line)
+{
+ char tempbuf[256];
+ char *basename;
+
+ basename = strrchr(file, '/');
+ /* skip the '/' */
+ if (basename)
+ basename++;
+
+ if (!basename)
+ basename = file;
+
+ snprintf(tempbuf, 256,
+ "assertion \"%s\" failed: file \"%s\", line %d\n", exp,
+ basename, line);
+
+ /*
+ * Print assert message and give it time to
+ * be written to /var/log/messages
+ */
+ if (!in_interrupt()) {
+ const int delay = 3;
+ printk(KERN_ERR "%s", tempbuf);
+ printk(KERN_ERR "panic in %d seconds\n", delay);
+ set_current_state(TASK_INTERRUPTIBLE);
+ schedule_timeout(delay * HZ);
+ }
+
+ switch (g_assert_type) {
+ case 0:
+ panic(KERN_ERR "%s", tempbuf);
+ break;
+ case 1:
+ printk(KERN_ERR "%s", tempbuf);
+ BUG();
+ break;
+ case 2:
+ printk(KERN_ERR "%s", tempbuf);
+ break;
+ default:
+ break;
+ }
+}
+#endif /* defined(BCMDBG) */
diff --git a/drivers/staging/brcm80211/include/bcmdefs.h b/drivers/staging/brcm80211/include/bcmdefs.h
index 854f14f..55631f3 100644
--- a/drivers/staging/brcm80211/include/bcmdefs.h
+++ b/drivers/staging/brcm80211/include/bcmdefs.h
@@ -108,12 +108,6 @@ typedef struct {
#define BCMEXTRAHDROOM 172
-#ifdef BCMDBG
-#ifndef BCMDBG_ASSERT
-#define BCMDBG_ASSERT
-#endif /* BCMDBG_ASSERT */
-#endif /* BCMDBG */
-
/* Macros for doing definition and get/set of bitfields
* Usage example, e.g. a three-bit field (bits 4-6):
* #define <NAME>_M BITFIELD_MASK(3)
diff --git a/drivers/staging/brcm80211/include/bcmutils.h b/drivers/staging/brcm80211/include/bcmutils.h
index 3a6d500..1408d15 100644
--- a/drivers/staging/brcm80211/include/bcmutils.h
+++ b/drivers/staging/brcm80211/include/bcmutils.h
@@ -257,16 +257,6 @@ extern struct sk_buff *pktq_mdeq(struct pktq *pq, uint prec_bmp, int *prec_out);
#define REG_MAP(pa, size) (void *)(0)
#endif
-extern u32 g_assert_type;
-
-#if defined(BCMDBG_ASSERT)
-#define ASSERT(exp) \
- do { if (!(exp)) osl_assert(#exp, __FILE__, __LINE__); } while (0)
-extern void osl_assert(char *exp, char *file, int line);
-#else
-#define ASSERT(exp) do {} while (0)
-#endif /* defined(BCMDBG_ASSERT) */
-
/* register access macros */
#if defined(BCMSDIO)
#ifdef BRCM_FULLMAC
diff --git a/drivers/staging/brcm80211/util/bcmutils.c b/drivers/staging/brcm80211/util/bcmutils.c
index 9d5e627..31be729 100644
--- a/drivers/staging/brcm80211/util/bcmutils.c
+++ b/drivers/staging/brcm80211/util/bcmutils.c
@@ -29,9 +29,6 @@
#include <bcmdevs.h>
#include <proto/802.11.h>
-/* Global ASSERT type flag */
-u32 g_assert_type;
-
struct sk_buff *pkt_buf_get_skb(uint len)
{
struct sk_buff *skb;
@@ -1017,50 +1014,3 @@ int bcm_bprintf(struct bcmstrbuf *b, const char *fmt, ...)
return r;
}
-
-#if defined(BCMDBG_ASSERT)
-void osl_assert(char *exp, char *file, int line)
-{
- char tempbuf[256];
- char *basename;
-
- basename = strrchr(file, '/');
- /* skip the '/' */
- if (basename)
- basename++;
-
- if (!basename)
- basename = file;
-
- snprintf(tempbuf, 256,
- "assertion \"%s\" failed: file \"%s\", line %d\n", exp,
- basename, line);
-
- /*
- * Print assert message and give it time to
- * be written to /var/log/messages
- */
- if (!in_interrupt()) {
- const int delay = 3;
- printk(KERN_ERR "%s", tempbuf);
- printk(KERN_ERR "panic in %d seconds\n", delay);
- set_current_state(TASK_INTERRUPTIBLE);
- schedule_timeout(delay * HZ);
- }
-
- switch (g_assert_type) {
- case 0:
- panic(KERN_ERR "%s", tempbuf);
- break;
- case 1:
- printk(KERN_ERR "%s", tempbuf);
- BUG();
- break;
- case 2:
- printk(KERN_ERR "%s", tempbuf);
- break;
- default:
- break;
- }
-}
-#endif /* defined(BCMDBG_ASSERT) */
--
1.7.1
Code cleanup.
Signed-off-by: Roland Vossen <[email protected]>
Reviewed-by: Arend van Spriel <[email protected]>
---
drivers/staging/brcm80211/brcmsmac/aiutils.c | 78 ++------------------------
1 files changed, 5 insertions(+), 73 deletions(-)
diff --git a/drivers/staging/brcm80211/brcmsmac/aiutils.c b/drivers/staging/brcm80211/brcmsmac/aiutils.c
index f055c4f..3807d3f 100644
--- a/drivers/staging/brcm80211/brcmsmac/aiutils.c
+++ b/drivers/staging/brcm80211/brcmsmac/aiutils.c
@@ -147,7 +147,6 @@ void ai_scan(si_t *sih, void *regs, uint devid)
default:
SI_ERROR(("Don't know how to do AXI enumertion on bus %d\n",
sih->bustype));
- ASSERT(0);
return;
}
eromlim = eromptr + (ER_REMAPCONTROL / sizeof(u32));
@@ -331,24 +330,15 @@ void *ai_setcoreidx(si_t *sih, uint coreidx)
if (coreidx >= sii->numcores)
return NULL;
- /*
- * If the user has provided an interrupt mask enabled function,
- * then assert interrupts are disabled before switching the core.
- */
- ASSERT((sii->intrsenabled_fn == NULL)
- || !(*(sii)->intrsenabled_fn) ((sii)->intr_arg));
-
switch (sih->bustype) {
case SI_BUS:
/* map new one */
if (!sii->regs[coreidx]) {
sii->regs[coreidx] = REG_MAP(addr, SI_CORE_SIZE);
- ASSERT(GOODREGS(sii->regs[coreidx]));
}
sii->curmap = regs = sii->regs[coreidx];
if (!sii->wrappers[coreidx]) {
sii->wrappers[coreidx] = REG_MAP(wrap, SI_CORE_SIZE);
- ASSERT(GOODREGS(sii->wrappers[coreidx]));
}
sii->curwrap = sii->wrappers[coreidx];
break;
@@ -368,7 +358,6 @@ void *ai_setcoreidx(si_t *sih, uint coreidx)
break;
default:
- ASSERT(0);
regs = NULL;
break;
}
@@ -489,11 +478,8 @@ void ai_core_cflags_wo(si_t *sih, u32 mask, u32 val)
return;
}
- ASSERT(GOODREGS(sii->curwrap));
ai = sii->curwrap;
- ASSERT((val & ~mask) == 0);
-
if (mask || val) {
w = ((R_REG(&ai->ioctrl) & ~mask) | val);
W_REG(&ai->ioctrl, w);
@@ -513,11 +499,8 @@ u32 ai_core_cflags(si_t *sih, u32 mask, u32 val)
return 0;
}
- ASSERT(GOODREGS(sii->curwrap));
ai = sii->curwrap;
- ASSERT((val & ~mask) == 0);
-
if (mask || val) {
w = ((R_REG(&ai->ioctrl) & ~mask) | val);
W_REG(&ai->ioctrl, w);
@@ -538,12 +521,8 @@ u32 ai_core_sflags(si_t *sih, u32 mask, u32 val)
return 0;
}
- ASSERT(GOODREGS(sii->curwrap));
ai = sii->curwrap;
- ASSERT((val & ~mask) == 0);
- ASSERT((mask & ~SISF_CORE_BITS) == 0);
-
if (mask || val) {
w = ((R_REG(&ai->iostatus) & ~mask) | val);
W_REG(&ai->iostatus, w);
@@ -623,7 +602,6 @@ static bool ai_buscore_setup(si_info_t *sii, chipcregs_t *cc, uint bustype,
uint pciidx, pcieidx, pcirev, pcierev;
cc = ai_setcoreidx(&sii->pub, SI_CC_IDX);
- ASSERT(cc);
/* get chipcommon rev */
sii->pub.ccrev = (int)ai_corerev(&sii->pub);
@@ -769,7 +747,6 @@ static __used void ai_nvram_process(si_info_t *sii, char *pvars)
if (sii->pub.boardtype == 0) {
SI_ERROR(("si_doattach: unknown board type\n"));
- ASSERT(sii->pub.boardtype);
}
sii->pub.boardflags = getintvar(pvars, "boardflags");
@@ -786,8 +763,6 @@ static si_info_t *ai_doattach(si_info_t *sii, uint devid,
uint socitype;
uint origidx;
- ASSERT(GOODREGS(regs));
-
memset((unsigned char *) sii, 0, sizeof(si_info_t));
savewin = 0;
@@ -924,7 +899,6 @@ static si_info_t *ai_doattach(si_info_t *sii, uint devid,
ai_corereg(sih, SI_CC_IDX, offsetof(chipcregs_t, gpiotimerval), ~0, w);
if (PCIE(sii)) {
- ASSERT(sii->pch != NULL);
pcicore_attach(sii->pch, pvars, SI_DOATTACH);
}
@@ -1116,8 +1090,6 @@ void *ai_switch_core(si_t *sih, uint coreid, uint *origidx, uint *intr_val)
INTR_OFF(sii, *intr_val);
*origidx = sii->curidx;
cc = ai_setcore(sih, coreid, 0);
- ASSERT(cc != NULL);
-
return cc;
}
@@ -1164,10 +1136,6 @@ uint ai_corereg(si_t *sih, uint coreidx, uint regoff, uint mask, uint val)
sii = SI_INFO(sih);
- ASSERT(GOODIDX(coreidx));
- ASSERT(regoff < SI_CORE_SIZE);
- ASSERT((val & ~mask) == 0);
-
if (coreidx >= SI_MAXCORES)
return 0;
@@ -1178,7 +1146,6 @@ uint ai_corereg(si_t *sih, uint coreidx, uint regoff, uint mask, uint val)
if (!sii->regs[coreidx]) {
sii->regs[coreidx] = REG_MAP(sii->coresba[coreidx],
SI_CORE_SIZE);
- ASSERT(GOODREGS(sii->regs[coreidx]));
}
r = (u32 *) ((unsigned char *) sii->regs[coreidx] + regoff);
} else if (sih->bustype == PCI_BUS) {
@@ -1221,7 +1188,6 @@ uint ai_corereg(si_t *sih, uint coreidx, uint regoff, uint mask, uint val)
r = (u32 *) ((unsigned char *) ai_setcoreidx(&sii->pub, coreidx)
+ regoff);
}
- ASSERT(r != NULL);
/* mask and set */
if (mask || val) {
@@ -1251,7 +1217,6 @@ void ai_core_disable(si_t *sih, u32 bits)
sii = SI_INFO(sih);
- ASSERT(GOODREGS(sii->curwrap));
ai = sii->curwrap;
/* if core is already in reset, just return */
@@ -1278,7 +1243,6 @@ void ai_core_reset(si_t *sih, u32 bits, u32 resetbits)
u32 dummy;
sii = SI_INFO(sih);
- ASSERT(GOODREGS(sii->curwrap));
ai = sii->curwrap;
/*
@@ -1306,8 +1270,6 @@ static uint ai_slowclk_src(si_info_t *sii)
chipcregs_t *cc;
u32 val;
- ASSERT(SI_FAST(sii) || ai_coreid(&sii->pub) == CC_CORE_ID);
-
if (sii->pub.ccrev < 6) {
if (sii->pub.bustype == PCI_BUS) {
pci_read_config_dword(sii->pbus, PCI_GPIO_OUT,
@@ -1323,20 +1285,15 @@ static uint ai_slowclk_src(si_info_t *sii)
return SCC_SS_XTAL;
}
-/* return the ILP (slowclock) min or max frequency */
+/*
+* return the ILP (slowclock) min or max frequency
+* precondition: we've established the chip has dynamic clk control
+*/
static uint ai_slowclk_freq(si_info_t *sii, bool max_freq, chipcregs_t *cc)
{
u32 slowclk;
uint div;
- ASSERT(SI_FAST(sii) || ai_coreid(&sii->pub) == CC_CORE_ID);
-
- /*
- * shouldn't be here unless we've established
- * the chip has dynamic clk control
- */
- ASSERT(R_REG(&cc->capabilities) & CC_CAP_PWR_CTL);
-
slowclk = ai_slowclk_src(sii);
if (sii->pub.ccrev < 6) {
if (slowclk == SCC_SS_PCI)
@@ -1357,8 +1314,6 @@ static uint ai_slowclk_freq(si_info_t *sii, bool max_freq, chipcregs_t *cc)
else if (slowclk == SCC_SS_PCI)
return max_freq ? (PCIMAXFREQ / div)
: (PCIMINFREQ / div);
- else
- ASSERT(0);
} else {
/* Chipc rev 10 is InstaClock */
div = R_REG(&cc->system_clk_ctl) >> SYCC_CD_SHIFT;
@@ -1420,7 +1375,6 @@ void ai_clkctl_init(si_t *sih)
if (cc == NULL)
return;
}
- ASSERT(cc != NULL);
/* set all Instaclk chip ILP to 1 MHz */
if (sih->ccrev >= 10)
@@ -1471,7 +1425,6 @@ u16 ai_clkctl_fast_pwrup_delay(si_t *sih)
if (cc == NULL)
goto done;
}
- ASSERT(cc != NULL);
slowminfreq = ai_slowclk_freq(sii, false, cc);
fpdelay = (((R_REG(&cc->pll_on_delay) + 2) * 1000000) +
@@ -1592,12 +1545,6 @@ static bool _ai_clkctl_cc(si_info_t *sii, uint mode)
if (sii->pub.ccrev < 6)
return false;
- /*
- * Chips with ccrev 10 are EOL and they
- * don't have SYCC_HR which we use below
- */
- ASSERT(sii->pub.ccrev != 10);
-
if (!fast) {
INTR_OFF(sii, intr_val);
origidx = sii->curidx;
@@ -1613,7 +1560,6 @@ static bool _ai_clkctl_cc(si_info_t *sii, uint mode)
if (cc == NULL)
goto done;
}
- ASSERT(cc != NULL);
if (!CCCTL_ENAB(&sii->pub) && (sii->pub.ccrev < 20))
goto done;
@@ -1639,7 +1585,6 @@ static bool _ai_clkctl_cc(si_info_t *sii, uint mode)
u32 htavail = CCS_HTAVAIL;
SPINWAIT(((R_REG(&cc->clk_ctl_st) & htavail)
== 0), PMU_MAX_TRANSITION_DLY);
- ASSERT(R_REG(&cc->clk_ctl_st) & htavail);
} else {
udelay(PLL_DELAY);
}
@@ -1668,7 +1613,7 @@ static bool _ai_clkctl_cc(si_info_t *sii, uint mode)
break;
default:
- ASSERT(0);
+ break;
}
done:
@@ -1684,9 +1629,6 @@ int ai_devpath(si_t *sih, char *path, int size)
{
int slen;
- ASSERT(path != NULL);
- ASSERT(size >= SI_DEVPATH_BUFSZ);
-
if (!path || size <= 0)
return -1;
@@ -1696,7 +1638,6 @@ int ai_devpath(si_t *sih, char *path, int size)
slen = snprintf(path, (size_t) size, "sb/%u/", ai_coreidx(sih));
break;
case PCI_BUS:
- ASSERT((SI_INFO(sih))->pbus != NULL);
slen = snprintf(path, (size_t) size, "pci/%u/%u/",
((struct pci_dev *)((SI_INFO(sih))->pbus))->bus->number,
PCI_SLOT(
@@ -1705,7 +1646,6 @@ int ai_devpath(si_t *sih, char *path, int size)
default:
slen = -1;
- ASSERT(0);
break;
}
@@ -1858,9 +1798,6 @@ void ai_pci_setup(si_t *sih, uint coremask)
if (sii->pub.bustype != PCI_BUS)
return;
- ASSERT(PCI(sii) || PCIE(sii));
- ASSERT(sii->pub.buscoreidx != BADIDX);
-
if (PCI(sii)) {
/* get current core index */
idx = sii->curidx;
@@ -1917,8 +1854,6 @@ int ai_pci_fixcfg(si_t *sih)
si_info_t *sii = SI_INFO(sih);
- ASSERT(sii->pub.bustype == PCI_BUS);
-
/* Fixup PI in SROM shadow area to enable the correct PCI core access */
/* save the current index */
origidx = ai_coreidx(&sii->pub);
@@ -1927,12 +1862,10 @@ int ai_pci_fixcfg(si_t *sih)
if (sii->pub.buscoretype == PCIE_CORE_ID) {
pcieregs = ai_setcore(&sii->pub, PCIE_CORE_ID, 0);
regs = pcieregs;
- ASSERT(pcieregs != NULL);
reg16 = &pcieregs->sprom[SRSH_PI_OFFSET];
} else if (sii->pub.buscoretype == PCI_CORE_ID) {
pciregs = ai_setcore(&sii->pub, PCI_CORE_ID, 0);
regs = pciregs;
- ASSERT(pciregs != NULL);
reg16 = &pciregs->sprom[SRSH_PI_OFFSET];
}
pciidx = ai_coreidx(&sii->pub);
@@ -2034,7 +1967,6 @@ bool ai_deviceremoved(si_t *sih)
switch (sih->bustype) {
case PCI_BUS:
- ASSERT(sii->pbus != NULL);
pci_read_config_dword(sii->pbus, PCI_CFG_VID, &w);
if ((w & 0xFFFF) != PCI_VENDOR_ID_BROADCOM)
return true;
--
1.7.1
Code cleanup.
Signed-off-by: Roland Vossen <[email protected]>
Reviewed-by: Arend van Spriel <[email protected]>
---
drivers/staging/brcm80211/util/hnddma.c | 2 --
drivers/staging/brcm80211/util/sbutils.c | 16 +---------------
2 files changed, 1 insertions(+), 17 deletions(-)
diff --git a/drivers/staging/brcm80211/util/hnddma.c b/drivers/staging/brcm80211/util/hnddma.c
index 7d9a99d..f6b5df9 100644
--- a/drivers/staging/brcm80211/util/hnddma.c
+++ b/drivers/staging/brcm80211/util/hnddma.c
@@ -1644,8 +1644,6 @@ static void dma64_txrotate(dma_info_t *di)
- di->xmtptrbase) & D64_XS1_AD_MASK), dma64dd_t));
rot = TXD(ad - di->txin);
- ASSERT(rot < di->ntxd);
-
/* full-ring case is a lot harder - don't worry about this */
if (rot >= (di->ntxd - nactive)) {
DMA_ERROR(("%s: dma_txrotate: ring full - punt\n", di->name));
diff --git a/drivers/staging/brcm80211/util/sbutils.c b/drivers/staging/brcm80211/util/sbutils.c
index 21dde8e..9384055 100644
--- a/drivers/staging/brcm80211/util/sbutils.c
+++ b/drivers/staging/brcm80211/util/sbutils.c
@@ -95,7 +95,6 @@ static u32 _sb_coresba(si_info_t *sii)
sbaddr = (u32)(unsigned long)sii->curmap;
break;
default:
- ASSERT(0);
break;
}
@@ -152,10 +151,6 @@ uint sb_corereg(si_t *sih, uint coreidx, uint regoff, uint mask, uint val)
sii = SI_INFO(sih);
- ASSERT(GOODIDX(coreidx));
- ASSERT(regoff < SI_CORE_SIZE);
- ASSERT((val & ~mask) == 0);
-
if (coreidx >= SI_MAXCORES)
return 0;
@@ -169,7 +164,6 @@ uint sb_corereg(si_t *sih, uint coreidx, uint regoff, uint mask, uint val)
r = (u32 *) ((unsigned char *) sb_setcoreidx(&sii->pub, coreidx) +
regoff);
}
- ASSERT(r != NULL);
/* mask and set */
if (mask || val) {
@@ -251,7 +245,6 @@ static uint _sb_scan(si_info_t *sii, u32 sba, void *regs, uint bus, u32 sbba,
/* Older chips */
SI_ERROR(("sb_chip2numcores: unsupported chip "
"0x%x\n", sii->pub.chip));
- ASSERT(0);
numcores = 1;
}
@@ -327,11 +320,8 @@ void *sb_setcoreidx(si_t *sih, uint coreidx)
/*
* If the user has provided an interrupt mask enabled function,
- * then assert interrupts are disabled before switching the core.
+ * then interrupts should be disabled before switching the core.
*/
- ASSERT((sii->intrsenabled_fn == NULL)
- || !(*(sii)->intrsenabled_fn) ((sii)->intr_arg));
-
sii->curmap = _sb_setcoreidx(sii, coreidx);
sii->curidx = coreidx;
@@ -353,13 +343,11 @@ static void *_sb_setcoreidx(si_info_t *sii, uint coreidx)
/* map new one */
if (!sii->regs[coreidx]) {
sii->regs[coreidx] = (void *)sbaddr;
- ASSERT(GOODREGS(sii->regs[coreidx]));
}
regs = sii->regs[coreidx];
break;
#endif /* BCMSDIO */
default:
- ASSERT(0);
regs = NULL;
break;
}
@@ -375,7 +363,6 @@ void sb_core_disable(si_t *sih, u32 bits)
sii = SI_INFO(sih);
- ASSERT(GOODREGS(sii->curmap));
sb = REGS2SB(sii->curmap);
/* if core is already in reset, just return */
@@ -433,7 +420,6 @@ void sb_core_reset(si_t *sih, u32 bits, u32 resetbits)
volatile u32 dummy;
sii = SI_INFO(sih);
- ASSERT(GOODREGS(sii->curmap));
sb = REGS2SB(sii->curmap);
/*
--
1.7.1