Hi Greg,
I fix the apply error issue of the rest 5 patches. The original path series
intends to remove si and sb utility from broadcom fullmac driver.
Thanks
Franky
Franky Lin (5):
staging: brcm80211: Remove siutils dependency of
dhdsdio_download_state
staging: brcm80211: Move sdiod strength init to dhd_sdio.c
staging: brcm80211: Add dhdsdio_chip_detach in dhd_sdio.c
staging: brcm80211: Remove siutils dependence from dhd_sdio.c
staging: brcm80211: Remove si sb utils from brcmfmac
drivers/staging/brcm80211/brcmfmac/Makefile | 6 +-
drivers/staging/brcm80211/brcmfmac/bcmchip.h | 1 +
drivers/staging/brcm80211/brcmfmac/bcmsdh.c | 1 -
drivers/staging/brcm80211/brcmfmac/dhd_sdio.c | 325 +++++++++++-------
drivers/staging/brcm80211/brcmfmac/hndpmu.c | 1 -
drivers/staging/brcm80211/brcmfmac/sbutils.c | 1 -
drivers/staging/brcm80211/brcmfmac/siutils.c | 1 -
drivers/staging/brcm80211/util/bcmutils.c | 1 -
drivers/staging/brcm80211/util/sbutils.c | 476 -------------------------
9 files changed, 206 insertions(+), 607 deletions(-)
delete mode 100644 drivers/staging/brcm80211/brcmfmac/hndpmu.c
delete mode 100644 drivers/staging/brcm80211/brcmfmac/sbutils.c
delete mode 100644 drivers/staging/brcm80211/brcmfmac/siutils.c
delete mode 100644 drivers/staging/brcm80211/util/sbutils.c
Remove siutils related functions and resources from dhd_sdio.c
Signed-off-by: Franky Lin <[email protected]>
---
drivers/staging/brcm80211/brcmfmac/bcmchip.h | 1 +
drivers/staging/brcm80211/brcmfmac/dhd_sdio.c | 79 +++++++++----------------
2 files changed, 28 insertions(+), 52 deletions(-)
diff --git a/drivers/staging/brcm80211/brcmfmac/bcmchip.h b/drivers/staging/brcm80211/brcmfmac/bcmchip.h
index 29eeee2..c0d4c3b 100644
--- a/drivers/staging/brcm80211/brcmfmac/bcmchip.h
+++ b/drivers/staging/brcm80211/brcmfmac/bcmchip.h
@@ -30,5 +30,6 @@
#define BCM4329_CORE_SOCRAM_BASE 0x18003000
/* ARM Cortex M3 core, ID 0x82a */
#define BCM4329_CORE_ARM_BASE 0x18002000
+#define BCM4329_RAMSIZE 0x48000
#endif /* _bcmchip_h_ */
diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c
index 74d7935..dc80e27 100644
--- a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c
+++ b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c
@@ -180,6 +180,7 @@ struct chip_info {
u32 ramcorebase;
u32 armcorebase;
u32 pmurev;
+ u32 ramsize;
};
/* Private data for SDIO bus interaction */
@@ -187,7 +188,6 @@ typedef struct dhd_bus {
dhd_pub_t *dhd;
bcmsdh_info_t *sdh; /* Handle for BCMSDH calls */
- si_t *sih; /* Handle for SI calls */
struct chip_info *ci; /* Chip info struct */
char *vars; /* Variables (from CIS and/or other) */
uint varsz; /* Size of variables buffer */
@@ -535,8 +535,8 @@ static int dhdsdio_htclk(dhd_bus_t *bus, bool on, bool pendok)
clkreq =
bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
- if ((bus->sih->chip == BCM4329_CHIP_ID)
- && (bus->sih->chiprev == 0))
+ if ((bus->ci->chip == BCM4329_CHIP_ID)
+ && (bus->ci->chiprev == 0))
clkreq |= SBSDIO_FORCE_ALP;
bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
@@ -547,8 +547,8 @@ static int dhdsdio_htclk(dhd_bus_t *bus, bool on, bool pendok)
return BCME_ERROR;
}
- if (pendok && ((bus->sih->buscoretype == PCMCIA_CORE_ID)
- && (bus->sih->buscorerev == 9))) {
+ if (pendok && ((bus->ci->buscoretype == PCMCIA_CORE_ID)
+ && (bus->ci->buscorerev == 9))) {
u32 dummy, retries;
R_SDREG(dummy, &bus->regs->clockctlstatus, retries);
}
@@ -842,8 +842,8 @@ int dhdsdio_bussleep(dhd_bus_t *bus, bool sleep)
SBSDIO_FORCE_HW_CLKREQ_OFF, NULL);
/* Isolate the bus */
- if (bus->sih->chip != BCM4329_CHIP_ID
- && bus->sih->chip != BCM4319_CHIP_ID) {
+ if (bus->ci->chip != BCM4329_CHIP_ID
+ && bus->ci->chip != BCM4319_CHIP_ID) {
bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_DEVICE_CTL,
SBSDIO_DEVCTL_PADS_ISO, NULL);
}
@@ -859,8 +859,8 @@ int dhdsdio_bussleep(dhd_bus_t *bus, bool sleep)
/* Force pad isolation off if possible
(in case power never toggled) */
- if ((bus->sih->buscoretype == PCMCIA_CORE_ID)
- && (bus->sih->buscorerev >= 10))
+ if ((bus->ci->buscoretype == PCMCIA_CORE_ID)
+ && (bus->ci->buscorerev >= 10))
bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_DEVICE_CTL, 0,
NULL);
@@ -2920,14 +2920,11 @@ int dhd_bus_init(dhd_pub_t *dhdp, bool enforce_mutex)
/* If F2 successfully enabled, set core and enable interrupts */
if (ready == enable) {
- /* Make sure we're talking to the core. */
- bus->regs = si_setcore(bus->sih, PCMCIA_CORE_ID, 0);
- if (!(bus->regs))
- bus->regs = si_setcore(bus->sih, SDIOD_CORE_ID, 0);
-
/* Set up the interrupt mask and enable interrupts */
bus->hostintmask = HOSTINTMASK;
- W_SDREG(bus->hostintmask, &bus->regs->hostintmask, retries);
+ W_SDREG(bus->hostintmask,
+ (unsigned int *)CORE_BUS_REG(bus->ci->buscorebase,
+ hostintmask), retries);
bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_WATERMARK,
(u8) watermark, &err);
@@ -5187,7 +5184,10 @@ dhdsdio_probe_attach(struct dhd_bus *bus, void *sdh, void *regsva, u16 devid)
#endif /* DHD_DEBUG */
- /* Force PLL off until si_attach() programs PLL control regs */
+ /*
+ * Force PLL off until dhdsdio_chip_attach()
+ * programs PLL control regs
+ */
bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
DHD_INIT_CLKCTL1, &err);
@@ -5253,23 +5253,16 @@ dhdsdio_probe_attach(struct dhd_bus *bus, void *sdh, void *regsva, u16 devid)
}
#endif /* DHD_DEBUG */
- /* si_attach() will provide an SI handle and scan the backplane */
- bus->sih = si_attach((uint) devid, regsva, DHD_BUS, sdh,
- &bus->vars, &bus->varsz);
- if (!(bus->sih)) {
- DHD_ERROR(("%s: si_attach failed!\n", __func__));
- goto fail;
- }
if (dhdsdio_chip_attach(bus, regsva)) {
DHD_ERROR(("%s: dhdsdio_chip_attach failed!\n", __func__));
goto fail;
}
- bcmsdh_chipinfo(sdh, bus->sih->chip, bus->sih->chiprev);
+ bcmsdh_chipinfo(sdh, bus->ci->chip, bus->ci->chiprev);
- if (!dhdsdio_chipmatch((u16) bus->sih->chip)) {
+ if (!dhdsdio_chipmatch((u16) bus->ci->chip)) {
DHD_ERROR(("%s: unsupported chip: 0x%04x\n",
- __func__, bus->sih->chip));
+ __func__, bus->ci->chip));
goto fail;
}
@@ -5277,14 +5270,9 @@ dhdsdio_probe_attach(struct dhd_bus *bus, void *sdh, void *regsva, u16 devid)
/* Get info on the ARM and SOCRAM cores... */
if (!DHD_NOPMU(bus)) {
- if ((si_setcore(bus->sih, ARM7S_CORE_ID, 0)) ||
- (si_setcore(bus->sih, ARMCM3_CORE_ID, 0))) {
- bus->armrev = si_corerev(bus->sih);
- } else {
- DHD_ERROR(("%s: failed to find ARM core!\n", __func__));
- goto fail;
- }
- bus->orig_ramsize = si_socram_size(bus->sih);
+ bus->armrev = SBCOREREV(bcmsdh_reg_read(bus->sdh,
+ CORE_SB(bus->ci->armcorebase, sbidhigh), 4));
+ bus->orig_ramsize = bus->ci->ramsize;
if (!(bus->orig_ramsize)) {
DHD_ERROR(("%s: failed to find SOCRAM memory!\n",
__func__));
@@ -5298,17 +5286,7 @@ dhdsdio_probe_attach(struct dhd_bus *bus, void *sdh, void *regsva, u16 devid)
bus->ramsize, bus->orig_ramsize));
}
- /* ...but normally deal with the SDPCMDEV core */
- bus->regs = si_setcore(bus->sih, PCMCIA_CORE_ID, 0);
- if (!bus->regs) {
- bus->regs = si_setcore(bus->sih, SDIOD_CORE_ID, 0);
- if (!bus->regs) {
- DHD_ERROR(("%s: failed to find SDIODEV core!\n",
- __func__));
- goto fail;
- }
- }
- bus->sdpcmrev = si_corerev(bus->sih);
+ bus->regs = (void *)bus->ci->buscorebase;
/* Set core control so an SDIO reset does a backplane reset */
OR_REG(&bus->regs->corecontrol, CC_BPRESEN);
@@ -5522,13 +5500,9 @@ static void dhdsdio_release_dongle(dhd_bus_t *bus)
if (bus->dhd && bus->dhd->dongle_reset)
return;
- if (bus->sih) {
+ if (bus->ci) {
dhdsdio_clkctl(bus, CLK_AVAIL, false);
-#if !defined(BCMLXSDMMC)
- si_watchdog(bus->sih, 4);
-#endif /* !defined(BCMLXSDMMC) */
dhdsdio_clkctl(bus, CLK_NONE, false);
- si_detach(bus->sih);
dhdsdio_chip_detach(bus);
if (bus->vars && bus->varsz)
kfree(bus->vars);
@@ -5955,8 +5929,8 @@ dhd_bcmsdh_send_buf(dhd_bus_t *bus, u32 addr, uint fn, uint flags,
uint dhd_bus_chip(struct dhd_bus *bus)
{
- ASSERT(bus->sih != NULL);
- return bus->sih->chip;
+ ASSERT(bus->ci != NULL);
+ return bus->ci->chip;
}
void *dhd_bus_pub(struct dhd_bus *bus)
@@ -6071,6 +6045,7 @@ dhdsdio_chip_recognition(bcmsdh_info_t *sdh, struct chip_info *ci, void *regs)
ci->buscorebase = BCM4329_CORE_BUS_BASE;
ci->ramcorebase = BCM4329_CORE_SOCRAM_BASE;
ci->armcorebase = BCM4329_CORE_ARM_BASE;
+ ci->ramsize = BCM4329_RAMSIZE;
break;
default:
DHD_ERROR(("%s: chipid 0x%x is not supported\n",
--
1.7.1
si/sb utility is removed from Broadcom fullmac driver.
All unused files are removed.
Signed-off-by: Franky Lin <[email protected]>
---
drivers/staging/brcm80211/brcmfmac/Makefile | 6 +-
drivers/staging/brcm80211/brcmfmac/bcmsdh.c | 1 -
drivers/staging/brcm80211/brcmfmac/dhd_sdio.c | 3 -
drivers/staging/brcm80211/brcmfmac/hndpmu.c | 1 -
drivers/staging/brcm80211/brcmfmac/sbutils.c | 1 -
drivers/staging/brcm80211/brcmfmac/siutils.c | 1 -
drivers/staging/brcm80211/util/bcmutils.c | 1 -
drivers/staging/brcm80211/util/sbutils.c | 476 -------------------------
8 files changed, 1 insertions(+), 489 deletions(-)
delete mode 100644 drivers/staging/brcm80211/brcmfmac/hndpmu.c
delete mode 100644 drivers/staging/brcm80211/brcmfmac/sbutils.c
delete mode 100644 drivers/staging/brcm80211/brcmfmac/siutils.c
delete mode 100644 drivers/staging/brcm80211/util/sbutils.c
diff --git a/drivers/staging/brcm80211/brcmfmac/Makefile b/drivers/staging/brcm80211/brcmfmac/Makefile
index ac5a7d4..4adbc4e 100644
--- a/drivers/staging/brcm80211/brcmfmac/Makefile
+++ b/drivers/staging/brcm80211/brcmfmac/Makefile
@@ -52,12 +52,8 @@ DHDOFILES = \
bcmsdh_linux.o \
bcmsdh_sdmmc.o \
bcmsdh_sdmmc_linux.o \
- aiutils.o \
- siutils.o \
- sbutils.o \
bcmutils.o \
- bcmwifi.o \
- hndpmu.o
+ bcmwifi.o
obj-m += brcmfmac.o
brcmfmac-objs += $(DHDOFILES)
diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh.c
index f15ee63..0627b7d 100644
--- a/drivers/staging/brcm80211/brcmfmac/bcmsdh.c
+++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh.c
@@ -22,7 +22,6 @@
#include <bcmdevs.h>
#include <bcmutils.h>
#include <hndsoc.h>
-#include <siutils.h>
#include <bcmsdh.h> /* BRCM API for SDIO
clients (such as wl, dhd) */
diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c
index dc80e27..6debc1e 100644
--- a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c
+++ b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c
@@ -28,8 +28,6 @@
#include <bcmutils.h>
#include <bcmdevs.h>
-#include <siutils.h>
-#include <hndpmu.h>
#include <hndsoc.h>
#ifdef DHD_DEBUG
#include <hndrte_armtrap.h>
@@ -52,7 +50,6 @@
#include <dhd_dbg.h>
#include <dhdioctl.h>
#include <sdiovar.h>
-#include <siutils_priv.h>
#include <bcmchip.h>
#ifndef DHDSDIO_MEM_DUMP_FNAME
diff --git a/drivers/staging/brcm80211/brcmfmac/hndpmu.c b/drivers/staging/brcm80211/brcmfmac/hndpmu.c
deleted file mode 100644
index e841da6..0000000
--- a/drivers/staging/brcm80211/brcmfmac/hndpmu.c
+++ /dev/null
@@ -1 +0,0 @@
-#include "../util/hndpmu.c"
diff --git a/drivers/staging/brcm80211/brcmfmac/sbutils.c b/drivers/staging/brcm80211/brcmfmac/sbutils.c
deleted file mode 100644
index 64496b8..0000000
--- a/drivers/staging/brcm80211/brcmfmac/sbutils.c
+++ /dev/null
@@ -1 +0,0 @@
-#include "../util/sbutils.c"
diff --git a/drivers/staging/brcm80211/brcmfmac/siutils.c b/drivers/staging/brcm80211/brcmfmac/siutils.c
deleted file mode 100644
index f428e99..0000000
--- a/drivers/staging/brcm80211/brcmfmac/siutils.c
+++ /dev/null
@@ -1 +0,0 @@
-#include "../util/siutils.c"
diff --git a/drivers/staging/brcm80211/util/bcmutils.c b/drivers/staging/brcm80211/util/bcmutils.c
index fb0bccc..387fd5d 100644
--- a/drivers/staging/brcm80211/util/bcmutils.c
+++ b/drivers/staging/brcm80211/util/bcmutils.c
@@ -24,7 +24,6 @@
#include <bcmdefs.h>
#include <stdarg.h>
#include <bcmutils.h>
-#include <siutils.h>
#include <bcmnvram.h>
#include <bcmdevs.h>
#include <proto/802.11.h>
diff --git a/drivers/staging/brcm80211/util/sbutils.c b/drivers/staging/brcm80211/util/sbutils.c
deleted file mode 100644
index 21dde8e..0000000
--- a/drivers/staging/brcm80211/util/sbutils.c
+++ /dev/null
@@ -1,476 +0,0 @@
-/*
- * Copyright (c) 2010 Broadcom Corporation
- *
- * Permission to use, copy, modify, and/or distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#include <linux/types.h>
-#include <bcmdefs.h>
-#ifdef BRCM_FULLMAC
-#include <linux/netdevice.h>
-#endif
-#include <bcmutils.h>
-#include <siutils.h>
-#include <bcmdevs.h>
-#include <hndsoc.h>
-#include <sbchipc.h>
-#include <pci_core.h>
-#include <pcicfg.h>
-#include <sbpcmcia.h>
-#include "siutils_priv.h"
-
-/* local prototypes */
-static uint _sb_coreidx(si_info_t *sii, u32 sba);
-static uint _sb_scan(si_info_t *sii, u32 sba, void *regs, uint bus,
- u32 sbba, uint ncores);
-static u32 _sb_coresba(si_info_t *sii);
-static void *_sb_setcoreidx(si_info_t *sii, uint coreidx);
-
-#define SET_SBREG(sii, r, mask, val) \
- W_SBREG((sii), (r), ((R_SBREG((sii), (r)) & ~(mask)) | (val)))
-#define REGS2SB(va) (sbconfig_t *) ((s8 *)(va) + SBCONFIGOFF)
-
-/* sonicsrev */
-#define SONICS_2_2 (SBIDL_RV_2_2 >> SBIDL_RV_SHIFT)
-#define SONICS_2_3 (SBIDL_RV_2_3 >> SBIDL_RV_SHIFT)
-
-#define R_SBREG(sii, sbr) sb_read_sbreg((sii), (sbr))
-#define W_SBREG(sii, sbr, v) sb_write_sbreg((sii), (sbr), (v))
-#define AND_SBREG(sii, sbr, v) \
- W_SBREG((sii), (sbr), (R_SBREG((sii), (sbr)) & (v)))
-#define OR_SBREG(sii, sbr, v) \
- W_SBREG((sii), (sbr), (R_SBREG((sii), (sbr)) | (v)))
-
-static u32 sb_read_sbreg(si_info_t *sii, volatile u32 *sbr)
-{
- return R_REG(sbr);
-}
-
-static void sb_write_sbreg(si_info_t *sii, volatile u32 *sbr, u32 v)
-{
- W_REG(sbr, v);
-}
-
-uint sb_coreid(si_t *sih)
-{
- si_info_t *sii;
- sbconfig_t *sb;
-
- sii = SI_INFO(sih);
- sb = REGS2SB(sii->curmap);
-
- return (R_SBREG(sii, &sb->sbidhigh) & SBIDH_CC_MASK) >>
- SBIDH_CC_SHIFT;
-}
-
-/* return core index of the core with address 'sba' */
-static uint _sb_coreidx(si_info_t *sii, u32 sba)
-{
- uint i;
-
- for (i = 0; i < sii->numcores; i++)
- if (sba == sii->coresba[i])
- return i;
- return BADIDX;
-}
-
-/* return core address of the current core */
-static u32 _sb_coresba(si_info_t *sii)
-{
- u32 sbaddr = 0;
-
- switch (sii->pub.bustype) {
- case SPI_BUS:
- case SDIO_BUS:
- sbaddr = (u32)(unsigned long)sii->curmap;
- break;
- default:
- ASSERT(0);
- break;
- }
-
- return sbaddr;
-}
-
-uint sb_corerev(si_t *sih)
-{
- si_info_t *sii;
- sbconfig_t *sb;
- uint sbidh;
-
- sii = SI_INFO(sih);
- sb = REGS2SB(sii->curmap);
- sbidh = R_SBREG(sii, &sb->sbidhigh);
-
- return SBCOREREV(sbidh);
-}
-
-bool sb_iscoreup(si_t *sih)
-{
- si_info_t *sii;
- sbconfig_t *sb;
-
- sii = SI_INFO(sih);
- sb = REGS2SB(sii->curmap);
-
- return (R_SBREG(sii, &sb->sbtmstatelow) &
- (SBTML_RESET | SBTML_REJ_MASK |
- (SICF_CLOCK_EN << SBTML_SICF_SHIFT))) ==
- (SICF_CLOCK_EN << SBTML_SICF_SHIFT);
-}
-
-/*
- * Switch to 'coreidx', issue a single arbitrary 32bit
- * register mask&set operation,
- * switch back to the original core, and return the new value.
- *
- * When using the silicon backplane, no fidleing with interrupts
- * or core switches are needed.
- *
- * Also, when using pci/pcie, we can optimize away the core switching
- * for pci registers
- * and (on newer pci cores) chipcommon registers.
- */
-uint sb_corereg(si_t *sih, uint coreidx, uint regoff, uint mask, uint val)
-{
- uint origidx = 0;
- u32 *r = NULL;
- uint w;
- uint intr_val = 0;
- bool fast = false;
- si_info_t *sii;
-
- sii = SI_INFO(sih);
-
- ASSERT(GOODIDX(coreidx));
- ASSERT(regoff < SI_CORE_SIZE);
- ASSERT((val & ~mask) == 0);
-
- if (coreidx >= SI_MAXCORES)
- return 0;
-
- if (!fast) {
- INTR_OFF(sii, intr_val);
-
- /* save current core index */
- origidx = si_coreidx(&sii->pub);
-
- /* switch core */
- r = (u32 *) ((unsigned char *) sb_setcoreidx(&sii->pub, coreidx) +
- regoff);
- }
- ASSERT(r != NULL);
-
- /* mask and set */
- if (mask || val) {
- if (regoff >= SBCONFIGOFF) {
- w = (R_SBREG(sii, r) & ~mask) | val;
- W_SBREG(sii, r, w);
- } else {
- w = (R_REG(r) & ~mask) | val;
- W_REG(r, w);
- }
- }
-
- /* readback */
- if (regoff >= SBCONFIGOFF)
- w = R_SBREG(sii, r);
- else
- w = R_REG(r);
-
- if (!fast) {
- /* restore core index */
- if (origidx != coreidx)
- sb_setcoreidx(&sii->pub, origidx);
-
- INTR_RESTORE(sii, intr_val);
- }
-
- return w;
-}
-
-/* Scan the enumeration space to find all cores starting from the given
- * bus 'sbba'. Append coreid and other info to the lists in 'si'. 'sba'
- * is the default core address at chip POR time and 'regs' is the virtual
- * address that the default core is mapped at. 'ncores' is the number of
- * cores expected on bus 'sbba'. It returns the total number of cores
- * starting from bus 'sbba', inclusive.
- */
-#define SB_MAXBUSES 2
-static uint _sb_scan(si_info_t *sii, u32 sba, void *regs, uint bus, u32 sbba,
- uint numcores)
-{
- uint next;
- uint ncc = 0;
- uint i;
-
- if (bus >= SB_MAXBUSES) {
- SI_ERROR(("_sb_scan: bus 0x%08x at level %d is too deep to "
- "scan\n", sbba, bus));
- return 0;
- }
- SI_MSG(("_sb_scan: scan bus 0x%08x assume %u cores\n",
- sbba, numcores));
-
- /* Scan all cores on the bus starting from core 0.
- * Core addresses must be contiguous on each bus.
- */
- for (i = 0, next = sii->numcores;
- i < numcores && next < SB_BUS_MAXCORES; i++, next++) {
- sii->coresba[next] = sbba + (i * SI_CORE_SIZE);
-
- /* change core to 'next' and read its coreid */
- sii->curmap = _sb_setcoreidx(sii, next);
- sii->curidx = next;
-
- sii->coreid[next] = sb_coreid(&sii->pub);
-
- /* core specific processing... */
- /* chipc provides # cores */
- if (sii->coreid[next] == CC_CORE_ID) {
- chipcregs_t *cc = (chipcregs_t *) sii->curmap;
- u32 ccrev = sb_corerev(&sii->pub);
-
- /* determine numcores - this is the
- total # cores in the chip */
- if (((ccrev == 4) || (ccrev >= 6)))
- numcores =
- (R_REG(&cc->chipid) & CID_CC_MASK)
- >> CID_CC_SHIFT;
- else {
- /* Older chips */
- SI_ERROR(("sb_chip2numcores: unsupported chip "
- "0x%x\n", sii->pub.chip));
- ASSERT(0);
- numcores = 1;
- }
-
- SI_VMSG(("_sb_scan: %u cores in the chip %s\n",
- numcores, sii->pub.issim ? "QT" : ""));
- }
- /* scan bridged SB(s) and add results to the end of the list */
- else if (sii->coreid[next] == OCP_CORE_ID) {
- sbconfig_t *sb = REGS2SB(sii->curmap);
- u32 nsbba = R_SBREG(sii, &sb->sbadmatch1);
- uint nsbcc;
-
- sii->numcores = next + 1;
-
- if ((nsbba & 0xfff00000) != SI_ENUM_BASE)
- continue;
- nsbba &= 0xfffff000;
- if (_sb_coreidx(sii, nsbba) != BADIDX)
- continue;
-
- nsbcc =
- (R_SBREG(sii, &sb->sbtmstatehigh) & 0x000f0000) >>
- 16;
- nsbcc = _sb_scan(sii, sba, regs, bus + 1, nsbba, nsbcc);
- if (sbba == SI_ENUM_BASE)
- numcores -= nsbcc;
- ncc += nsbcc;
- }
- }
-
- SI_MSG(("_sb_scan: found %u cores on bus 0x%08x\n", i, sbba));
-
- sii->numcores = i + ncc;
- return sii->numcores;
-}
-
-/* scan the sb enumerated space to identify all cores */
-void sb_scan(si_t *sih, void *regs, uint devid)
-{
- si_info_t *sii;
- u32 origsba;
- sbconfig_t *sb;
-
- sii = SI_INFO(sih);
- sb = REGS2SB(sii->curmap);
-
- sii->pub.socirev =
- (R_SBREG(sii, &sb->sbidlow) & SBIDL_RV_MASK) >> SBIDL_RV_SHIFT;
-
- /* Save the current core info and validate it later till we know
- * for sure what is good and what is bad.
- */
- origsba = _sb_coresba(sii);
-
- /* scan all SB(s) starting from SI_ENUM_BASE */
- sii->numcores = _sb_scan(sii, origsba, regs, 0, SI_ENUM_BASE, 1);
-}
-
-/*
- * This function changes logical "focus" to the indicated core;
- * must be called with interrupts off.
- * Moreover, callers should keep interrupts off during switching out of
- * and back to d11 core
- */
-void *sb_setcoreidx(si_t *sih, uint coreidx)
-{
- si_info_t *sii;
-
- sii = SI_INFO(sih);
-
- if (coreidx >= sii->numcores)
- return NULL;
-
- /*
- * If the user has provided an interrupt mask enabled function,
- * then assert interrupts are disabled before switching the core.
- */
- ASSERT((sii->intrsenabled_fn == NULL)
- || !(*(sii)->intrsenabled_fn) ((sii)->intr_arg));
-
- sii->curmap = _sb_setcoreidx(sii, coreidx);
- sii->curidx = coreidx;
-
- return sii->curmap;
-}
-
-/* This function changes the logical "focus" to the indicated core.
- * Return the current core's virtual address.
- */
-static void *_sb_setcoreidx(si_info_t *sii, uint coreidx)
-{
- u32 sbaddr = sii->coresba[coreidx];
- void *regs;
-
- switch (sii->pub.bustype) {
-#ifdef BCMSDIO
- case SPI_BUS:
- case SDIO_BUS:
- /* map new one */
- if (!sii->regs[coreidx]) {
- sii->regs[coreidx] = (void *)sbaddr;
- ASSERT(GOODREGS(sii->regs[coreidx]));
- }
- regs = sii->regs[coreidx];
- break;
-#endif /* BCMSDIO */
- default:
- ASSERT(0);
- regs = NULL;
- break;
- }
-
- return regs;
-}
-
-void sb_core_disable(si_t *sih, u32 bits)
-{
- si_info_t *sii;
- volatile u32 dummy;
- sbconfig_t *sb;
-
- sii = SI_INFO(sih);
-
- ASSERT(GOODREGS(sii->curmap));
- sb = REGS2SB(sii->curmap);
-
- /* if core is already in reset, just return */
- if (R_SBREG(sii, &sb->sbtmstatelow) & SBTML_RESET)
- return;
-
- /* if clocks are not enabled, put into reset and return */
- if ((R_SBREG(sii, &sb->sbtmstatelow) &
- (SICF_CLOCK_EN << SBTML_SICF_SHIFT)) == 0)
- goto disable;
-
- /* set target reject and spin until busy is clear
- (preserve core-specific bits) */
- OR_SBREG(sii, &sb->sbtmstatelow, SBTML_REJ);
- dummy = R_SBREG(sii, &sb->sbtmstatelow);
- udelay(1);
- SPINWAIT((R_SBREG(sii, &sb->sbtmstatehigh) & SBTMH_BUSY), 100000);
- if (R_SBREG(sii, &sb->sbtmstatehigh) & SBTMH_BUSY)
- SI_ERROR(("%s: target state still busy\n", __func__));
-
- if (R_SBREG(sii, &sb->sbidlow) & SBIDL_INIT) {
- OR_SBREG(sii, &sb->sbimstate, SBIM_RJ);
- dummy = R_SBREG(sii, &sb->sbimstate);
- udelay(1);
- SPINWAIT((R_SBREG(sii, &sb->sbimstate) & SBIM_BY), 100000);
- }
-
- /* set reset and reject while enabling the clocks */
- W_SBREG(sii, &sb->sbtmstatelow,
- (((bits | SICF_FGC | SICF_CLOCK_EN) << SBTML_SICF_SHIFT) |
- SBTML_REJ | SBTML_RESET));
- dummy = R_SBREG(sii, &sb->sbtmstatelow);
- udelay(10);
-
- /* don't forget to clear the initiator reject bit */
- if (R_SBREG(sii, &sb->sbidlow) & SBIDL_INIT)
- AND_SBREG(sii, &sb->sbimstate, ~SBIM_RJ);
-
-disable:
- /* leave reset and reject asserted */
- W_SBREG(sii, &sb->sbtmstatelow,
- ((bits << SBTML_SICF_SHIFT) | SBTML_REJ | SBTML_RESET));
- udelay(1);
-}
-
-/* reset and re-enable a core
- * inputs:
- * bits - core specific bits that are set during and after reset sequence
- * resetbits - core specific bits that are set only during reset sequence
- */
-void sb_core_reset(si_t *sih, u32 bits, u32 resetbits)
-{
- si_info_t *sii;
- sbconfig_t *sb;
- volatile u32 dummy;
-
- sii = SI_INFO(sih);
- ASSERT(GOODREGS(sii->curmap));
- sb = REGS2SB(sii->curmap);
-
- /*
- * Must do the disable sequence first to work for
- * arbitrary current core state.
- */
- sb_core_disable(sih, (bits | resetbits));
-
- /*
- * Now do the initialization sequence.
- */
-
- /* set reset while enabling the clock and
- forcing them on throughout the core */
- W_SBREG(sii, &sb->sbtmstatelow,
- (((bits | resetbits | SICF_FGC | SICF_CLOCK_EN) <<
- SBTML_SICF_SHIFT) | SBTML_RESET));
- dummy = R_SBREG(sii, &sb->sbtmstatelow);
- udelay(1);
-
- if (R_SBREG(sii, &sb->sbtmstatehigh) & SBTMH_SERR)
- W_SBREG(sii, &sb->sbtmstatehigh, 0);
-
- dummy = R_SBREG(sii, &sb->sbimstate);
- if (dummy & (SBIM_IBE | SBIM_TO))
- AND_SBREG(sii, &sb->sbimstate, ~(SBIM_IBE | SBIM_TO));
-
- /* clear reset and allow it to propagate throughout the core */
- W_SBREG(sii, &sb->sbtmstatelow,
- ((bits | resetbits | SICF_FGC | SICF_CLOCK_EN) <<
- SBTML_SICF_SHIFT));
- dummy = R_SBREG(sii, &sb->sbtmstatelow);
- udelay(1);
-
- /* leave clock enabled */
- W_SBREG(sii, &sb->sbtmstatelow,
- ((bits | SICF_CLOCK_EN) << SBTML_SICF_SHIFT));
- dummy = R_SBREG(sii, &sb->sbtmstatelow);
- udelay(1);
-}
--
1.7.1
Use dhdsdio_chip_disablecore and dhd_sdio_chip_resetcore to replace
siutils functions used in dhdsdio_download_state
Signed-off-by: Franky Lin <[email protected]>
---
drivers/staging/brcm80211/brcmfmac/dhd_sdio.c | 114 ++++++++++++-------------
1 files changed, 53 insertions(+), 61 deletions(-)
diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c
index 14f4703..2827af2 100644
--- a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c
+++ b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c
@@ -482,7 +482,9 @@ static int dhdsdio_download_nvram(struct dhd_bus *bus);
#ifdef BCMEMBEDIMAGE
static int dhdsdio_download_code_array(struct dhd_bus *bus);
#endif
+static void dhdsdio_chip_disablecore(bcmsdh_info_t *sdh, u32 corebase);
static int dhdsdio_chip_attach(struct dhd_bus *bus, void *regs);
+static void dhdsdio_chip_resetcore(bcmsdh_info_t *sdh, u32 corebase);
static void dhd_dongle_setmemsize(struct dhd_bus *bus, int mem_size)
{
@@ -2615,42 +2617,18 @@ static int dhdsdio_write_vars(dhd_bus_t *bus)
static int dhdsdio_download_state(dhd_bus_t *bus, bool enter)
{
uint retries;
+ u32 regdata;
int bcmerror = 0;
/* To enter download state, disable ARM and reset SOCRAM.
* To exit download state, simply reset ARM (default is RAM boot).
*/
if (enter) {
-
bus->alp_only = true;
- if (!(si_setcore(bus->sih, ARM7S_CORE_ID, 0)) &&
- !(si_setcore(bus->sih, ARMCM3_CORE_ID, 0))) {
- DHD_ERROR(("%s: Failed to find ARM core!\n", __func__));
- bcmerror = BCME_ERROR;
- goto fail;
- }
+ dhdsdio_chip_disablecore(bus->sdh, bus->ci->armcorebase);
- si_core_disable(bus->sih, 0);
- if (bcmsdh_regfail(bus->sdh)) {
- bcmerror = BCME_SDIO_ERROR;
- goto fail;
- }
-
- if (!(si_setcore(bus->sih, SOCRAM_CORE_ID, 0))) {
- DHD_ERROR(("%s: Failed to find SOCRAM core!\n",
- __func__));
- bcmerror = BCME_ERROR;
- goto fail;
- }
-
- si_core_reset(bus->sih, 0, 0);
- if (bcmsdh_regfail(bus->sdh)) {
- DHD_ERROR(("%s: Failure trying reset SOCRAM core?\n",
- __func__));
- bcmerror = BCME_SDIO_ERROR;
- goto fail;
- }
+ dhdsdio_chip_resetcore(bus->sdh, bus->ci->ramcorebase);
/* Clear the top bit of memory */
if (bus->ramsize) {
@@ -2659,14 +2637,11 @@ static int dhdsdio_download_state(dhd_bus_t *bus, bool enter)
(u8 *)&zeros, 4);
}
} else {
- if (!(si_setcore(bus->sih, SOCRAM_CORE_ID, 0))) {
- DHD_ERROR(("%s: Failed to find SOCRAM core!\n",
- __func__));
- bcmerror = BCME_ERROR;
- goto fail;
- }
-
- if (!si_iscoreup(bus->sih)) {
+ regdata = bcmsdh_reg_read(bus->sdh,
+ CORE_SB(bus->ci->ramcorebase, sbtmstatelow), 4);
+ regdata &= (SBTML_RESET | SBTML_REJ_MASK |
+ (SICF_CLOCK_EN << SBTML_SICF_SHIFT));
+ if ((SICF_CLOCK_EN << SBTML_SICF_SHIFT) != regdata) {
DHD_ERROR(("%s: SOCRAM core is down after reset?\n",
__func__));
bcmerror = BCME_ERROR;
@@ -2679,41 +2654,16 @@ static int dhdsdio_download_state(dhd_bus_t *bus, bool enter)
bcmerror = 0;
}
- if (!si_setcore(bus->sih, PCMCIA_CORE_ID, 0) &&
- !si_setcore(bus->sih, SDIOD_CORE_ID, 0)) {
- DHD_ERROR(("%s: Can't change back to SDIO core?\n",
- __func__));
- bcmerror = BCME_ERROR;
- goto fail;
- }
W_SDREG(0xFFFFFFFF, &bus->regs->intstatus, retries);
- if (!(si_setcore(bus->sih, ARM7S_CORE_ID, 0)) &&
- !(si_setcore(bus->sih, ARMCM3_CORE_ID, 0))) {
- DHD_ERROR(("%s: Failed to find ARM core!\n", __func__));
- bcmerror = BCME_ERROR;
- goto fail;
- }
-
- si_core_reset(bus->sih, 0, 0);
- if (bcmsdh_regfail(bus->sdh)) {
- DHD_ERROR(("%s: Failure trying to reset ARM core?\n",
- __func__));
- bcmerror = BCME_SDIO_ERROR;
- goto fail;
- }
+ dhdsdio_chip_resetcore(bus->sdh, bus->ci->armcorebase);
/* Allow HT Clock now that the ARM is running. */
bus->alp_only = false;
bus->dhd->busstate = DHD_BUS_LOAD;
}
-
fail:
- /* Always return to SDIOD core */
- if (!si_setcore(bus->sih, PCMCIA_CORE_ID, 0))
- si_setcore(bus->sih, SDIOD_CORE_ID, 0);
-
return bcmerror;
}
@@ -6324,3 +6274,45 @@ fail:
kfree(ci);
return err;
}
+
+static void
+dhdsdio_chip_resetcore(bcmsdh_info_t *sdh, u32 corebase)
+{
+ u32 regdata;
+
+ /*
+ * Must do the disable sequence first to work for
+ * arbitrary current core state.
+ */
+ dhdsdio_chip_disablecore(sdh, corebase);
+
+ /*
+ * Now do the initialization sequence.
+ * set reset while enabling the clock and
+ * forcing them on throughout the core
+ */
+ bcmsdh_reg_write(sdh, CORE_SB(corebase, sbtmstatelow), 4,
+ ((SICF_FGC | SICF_CLOCK_EN) << SBTML_SICF_SHIFT) |
+ SBTML_RESET);
+ udelay(1);
+
+ regdata = bcmsdh_reg_read(sdh, CORE_SB(corebase, sbtmstatehigh), 4);
+ if (regdata & SBTMH_SERR)
+ bcmsdh_reg_write(sdh, CORE_SB(corebase, sbtmstatehigh), 4, 0);
+
+ regdata = bcmsdh_reg_read(sdh, CORE_SB(corebase, sbimstate), 4);
+ if (regdata & (SBIM_IBE | SBIM_TO))
+ bcmsdh_reg_write(sdh, CORE_SB(corebase, sbimstate), 4,
+ regdata & ~(SBIM_IBE | SBIM_TO));
+
+ /* clear reset and allow it to propagate throughout the core */
+ bcmsdh_reg_write(sdh, CORE_SB(corebase, sbtmstatelow), 4,
+ (SICF_FGC << SBTML_SICF_SHIFT) |
+ (SICF_CLOCK_EN << SBTML_SICF_SHIFT));
+ udelay(1);
+
+ /* leave clock enabled */
+ bcmsdh_reg_write(sdh, CORE_SB(corebase, sbtmstatelow), 4,
+ (SICF_CLOCK_EN << SBTML_SICF_SHIFT));
+ udelay(1);
+}
--
1.7.1
Add dhdsdio_chip_detach to replace si_detach for si/sb utils removal
Signed-off-by: Franky Lin <[email protected]>
---
drivers/staging/brcm80211/brcmfmac/dhd_sdio.c | 15 ++++++++++++---
1 files changed, 12 insertions(+), 3 deletions(-)
diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c
index e2d5aa5..74d7935 100644
--- a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c
+++ b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c
@@ -487,6 +487,7 @@ static int dhdsdio_chip_attach(struct dhd_bus *bus, void *regs);
static void dhdsdio_chip_resetcore(bcmsdh_info_t *sdh, u32 corebase);
static void dhdsdio_sdiod_drive_strength_init(struct dhd_bus *bus,
u32 drivestrength);
+static void dhdsdio_chip_detach(struct dhd_bus *bus);
static void dhd_dongle_setmemsize(struct dhd_bus *bus, int mem_size)
{
@@ -5484,10 +5485,8 @@ static void dhdsdio_release(dhd_bus_t *bus)
bcmsdh_intr_dereg(bus->sdh);
if (bus->dhd) {
-
- dhdsdio_release_dongle(bus);
-
dhd_detach(bus->dhd);
+ dhdsdio_release_dongle(bus);
bus->dhd = NULL;
}
@@ -5530,6 +5529,7 @@ static void dhdsdio_release_dongle(dhd_bus_t *bus)
#endif /* !defined(BCMLXSDMMC) */
dhdsdio_clkctl(bus, CLK_NONE, false);
si_detach(bus->sih);
+ dhdsdio_chip_detach(bus);
if (bus->vars && bus->varsz)
kfree(bus->vars);
bus->vars = NULL;
@@ -6426,3 +6426,12 @@ dhdsdio_sdiod_drive_strength_init(struct dhd_bus *bus, u32 drivestrength) {
drivestrength, cc_data_temp));
}
}
+
+static void
+dhdsdio_chip_detach(struct dhd_bus *bus)
+{
+ DHD_TRACE(("%s: Enter\n", __func__));
+
+ kfree(bus->ci);
+ bus->ci = NULL;
+}
--
1.7.1
Move si_sdiod_drive_strength_init to dhd_sdio and rename to
dhdsdio_sdiod_drive_strength_init for dhd_pmu.c removal
Signed-off-by: Franky Lin <[email protected]>
---
drivers/staging/brcm80211/brcmfmac/dhd_sdio.c | 114 ++++++++++++++++++++++++-
1 files changed, 112 insertions(+), 2 deletions(-)
diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c
index 2827af2..e2d5aa5 100644
--- a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c
+++ b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c
@@ -485,6 +485,8 @@ static int dhdsdio_download_code_array(struct dhd_bus *bus);
static void dhdsdio_chip_disablecore(bcmsdh_info_t *sdh, u32 corebase);
static int dhdsdio_chip_attach(struct dhd_bus *bus, void *regs);
static void dhdsdio_chip_resetcore(bcmsdh_info_t *sdh, u32 corebase);
+static void dhdsdio_sdiod_drive_strength_init(struct dhd_bus *bus,
+ u32 drivestrength);
static void dhd_dongle_setmemsize(struct dhd_bus *bus, int mem_size)
{
@@ -2292,7 +2294,7 @@ dhdsdio_doiovar(dhd_bus_t *bus, const bcm_iovar_t *vi, u32 actionid,
case IOV_SVAL(IOV_SDIOD_DRIVE):
dhd_sdiod_drive_strength = int_val;
- si_sdiod_drive_strength_init(bus->sih,
+ dhdsdio_sdiod_drive_strength_init(bus,
dhd_sdiod_drive_strength);
break;
@@ -5270,7 +5272,7 @@ dhdsdio_probe_attach(struct dhd_bus *bus, void *sdh, void *regsva, u16 devid)
goto fail;
}
- si_sdiod_drive_strength_init(bus->sih, dhd_sdiod_drive_strength);
+ dhdsdio_sdiod_drive_strength_init(bus, dhd_sdiod_drive_strength);
/* Get info on the ARM and SOCRAM cores... */
if (!DHD_NOPMU(bus)) {
@@ -6316,3 +6318,111 @@ dhdsdio_chip_resetcore(bcmsdh_info_t *sdh, u32 corebase)
(SICF_CLOCK_EN << SBTML_SICF_SHIFT));
udelay(1);
}
+
+/* SDIO Pad drive strength to select value mappings */
+struct sdiod_drive_str {
+ u8 strength; /* Pad Drive Strength in mA */
+ u8 sel; /* Chip-specific select value */
+};
+
+/* SDIO Drive Strength to sel value table for PMU Rev 1 */
+static const struct sdiod_drive_str sdiod_drive_strength_tab1[] = {
+ {
+ 4, 0x2}, {
+ 2, 0x3}, {
+ 1, 0x0}, {
+ 0, 0x0}
+ };
+
+/* SDIO Drive Strength to sel value table for PMU Rev 2, 3 */
+static const struct sdiod_drive_str sdiod_drive_strength_tab2[] = {
+ {
+ 12, 0x7}, {
+ 10, 0x6}, {
+ 8, 0x5}, {
+ 6, 0x4}, {
+ 4, 0x2}, {
+ 2, 0x1}, {
+ 0, 0x0}
+ };
+
+/* SDIO Drive Strength to sel value table for PMU Rev 8 (1.8V) */
+static const struct sdiod_drive_str sdiod_drive_strength_tab3[] = {
+ {
+ 32, 0x7}, {
+ 26, 0x6}, {
+ 22, 0x5}, {
+ 16, 0x4}, {
+ 12, 0x3}, {
+ 8, 0x2}, {
+ 4, 0x1}, {
+ 0, 0x0}
+ };
+
+#define SDIOD_DRVSTR_KEY(chip, pmu) (((chip) << 16) | (pmu))
+
+static void
+dhdsdio_sdiod_drive_strength_init(struct dhd_bus *bus, u32 drivestrength) {
+ struct sdiod_drive_str *str_tab = NULL;
+ u32 str_mask = 0;
+ u32 str_shift = 0;
+#ifdef BCMDBG
+ char chn[8];
+#endif
+
+ if (!(bus->ci->cccaps & CC_CAP_PMU))
+ return;
+
+ switch (SDIOD_DRVSTR_KEY(bus->ci->chip, bus->ci->pmurev)) {
+ case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 1):
+ str_tab = (struct sdiod_drive_str *)&sdiod_drive_strength_tab1;
+ str_mask = 0x30000000;
+ str_shift = 28;
+ break;
+ case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 2):
+ case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 3):
+ str_tab = (struct sdiod_drive_str *)&sdiod_drive_strength_tab2;
+ str_mask = 0x00003800;
+ str_shift = 11;
+ break;
+ case SDIOD_DRVSTR_KEY(BCM4336_CHIP_ID, 8):
+ str_tab = (struct sdiod_drive_str *)&sdiod_drive_strength_tab3;
+ str_mask = 0x00003800;
+ str_shift = 11;
+ break;
+ default:
+ DHD_ERROR(("No SDIO Drive strength init"
+ "done for chip %s rev %d pmurev %d\n",
+ bcm_chipname(bus->ci->chip, chn, 8),
+ bus->ci->chiprev, bus->ci->pmurev));
+ break;
+ }
+
+ if (str_tab != NULL) {
+ u32 drivestrength_sel = 0;
+ u32 cc_data_temp;
+ int i;
+
+ for (i = 0; str_tab[i].strength != 0; i++) {
+ if (drivestrength >= str_tab[i].strength) {
+ drivestrength_sel = str_tab[i].sel;
+ break;
+ }
+ }
+
+ bcmsdh_reg_write(bus->sdh,
+ CORE_CC_REG(bus->ci->cccorebase, chipcontrol_addr),
+ 4, 1);
+ cc_data_temp = bcmsdh_reg_read(bus->sdh,
+ CORE_CC_REG(bus->ci->cccorebase, chipcontrol_addr), 4);
+ cc_data_temp &= ~str_mask;
+ drivestrength_sel <<= str_shift;
+ cc_data_temp |= drivestrength_sel;
+ bcmsdh_reg_write(bus->sdh,
+ CORE_CC_REG(bus->ci->cccorebase, chipcontrol_addr),
+ 4, cc_data_temp);
+
+ DHD_INFO(("SDIO: %dmA drive strength selected, set to 0x%08x\n",
+ drivestrength, cc_data_temp));
+ }
+}
--
1.7.1
On Mon, Apr 25, 2011 at 07:34:03PM -0700, Franky Lin wrote:
> Hi Greg,
>
> I fix the apply error issue of the rest 5 patches. The original path series
> intends to remove si and sb utility from broadcom fullmac driver.
That worked much better, thanks.
greg k-h