From: Mohammed Shafi Shajakhan <[email protected]>
*this patch set adds initial code support for WoW in
ath9k, offloading features of WoW is not yet added.
*this had to be completely tested, its not working currently
and there are few known issues that need to be addressed.
thanks to
"Russell Hu" <[email protected]>
"Aeolus Yang" <[email protected]>
Senthil Balasubramanian <[email protected]>
Rajkumar Manoharan <[email protected]>
Raja Mani <[email protected]>
and Luis for his initial WoW patches and help
once this is properly tested and working,
we will send it patches, with issues fixed.
Mohammed Shafi Shajakhan (11):
ath9k_hw: Add register definitions for WoW support
ath9k: Add definitions and structures to support WoW
ath9k_hw: Add WoW hardware capability flags
ath9k_hw: advertise WoW support for capable chipsets
ath9k: advertise supported WoW flags to upper layer
ath9k_hw: INI changes for WoW for AR9002 chipsets
ath9k_hw: Add hardware code for WoW
ath9k: Add WoW related mac80211 callbacks
ath: Add Wake-on-Wireless debug mask
ath9k: Add debug messages for WoW
ath9k: do not disable hardware while wow is enabled
drivers/net/wireless/ath/ath.h | 2 +
drivers/net/wireless/ath/ath9k/Makefile | 1 +
drivers/net/wireless/ath/ath9k/ar9002_hw.c | 5 +
drivers/net/wireless/ath/ath9k/ar9002_initvals.h | 14 +
drivers/net/wireless/ath/ath9k/ath9k.h | 30 ++
drivers/net/wireless/ath/ath9k/hw.c | 8 +
drivers/net/wireless/ath/ath9k/hw.h | 74 +++
drivers/net/wireless/ath/ath9k/init.c | 21 +-
drivers/net/wireless/ath/ath9k/main.c | 453 ++++++++++++++++++-
drivers/net/wireless/ath/ath9k/pci.c | 6 +
drivers/net/wireless/ath/ath9k/reg.h | 170 +++++++-
drivers/net/wireless/ath/ath9k/wow.c | 547 ++++++++++++++++++++++
12 files changed, 1319 insertions(+), 12 deletions(-)
create mode 100644 drivers/net/wireless/ath/ath9k/wow.c
From: Mohammed Shafi Shajakhan <[email protected]>
support WoW for all chipsets starting from AR9280, AR9285, AR9287,
AR9380, AR9382, AR9485, AR9462. Really all hardware may not support
WoW even though the flag is set and the WoW working depends on
your laptop, BIOS apart from the hardware.
Signed-off-by: Luis R. Rodriguez <[email protected]>
Signed-off-by: Mohammed Shafi Shajakhan <[email protected]>
---
drivers/net/wireless/ath/ath9k/hw.c | 8 ++++++++
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index 3022c4e..345a802 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -2442,6 +2442,14 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
}
+ if (AR_SREV_9280_20_OR_LATER(ah)) {
+ pCap->wow_caps = ATH9K_HW_WOW_DEVICE_CAPABLE |
+ ATH9K_HW_WOW_PATTERN_MATCH_EXACT;
+
+ if (AR_SREV_9280(ah))
+ pCap->wow_caps |= ATH9K_HW_WOW_PATTERN_MATCH_DWORD;
+ }
+
return 0;
}
--
1.7.0.4
From: Mohammed Shafi Shajakhan <[email protected]>
*MAC WoW registers
back-off shift, MAC interrupt enable, magic packet enable,
pattern match enable, aifs, slot wait period, keep alive
frame failure count, beacon fail enable, beacon timeout,
keep alive timeout, auto keep alive disable,
keep alive fail disable and their corresponding
status registers. keep alive frame delay,
pattern end/byte offsets, transmit buffers for
keep alive frames and storing the user patterns
*Power Management Control registers
pme_d3cold_vaux, host_pme_enable, aux_pwr_detect,
power_state_mask, wow_pme_clear
Signed-off-by: Luis R. Rodriguez <[email protected]>
Signed-off-by: Mohammed Shafi Shajakhan <[email protected]>
---
drivers/net/wireless/ath/ath9k/reg.h | 170 +++++++++++++++++++++++++++++++++-
1 files changed, 169 insertions(+), 1 deletions(-)
diff --git a/drivers/net/wireless/ath/ath9k/reg.h b/drivers/net/wireless/ath/ath9k/reg.h
index 458f81b..a111e55 100644
--- a/drivers/net/wireless/ath/ath9k/reg.h
+++ b/drivers/net/wireless/ath/ath9k/reg.h
@@ -696,9 +696,12 @@
#define AR_WA_BIT7 (1 << 7)
#define AR_WA_BIT23 (1 << 23)
#define AR_WA_D3_L1_DISABLE (1 << 14)
+#define AR_WA_UNTIE_RESET_EN (1 << 15) /* Enable PCI Reset
+ to POR (power-on-reset) */
#define AR_WA_D3_TO_L1_DISABLE_REAL (1 << 16)
#define AR_WA_ASPM_TIMER_BASED_DISABLE (1 << 17)
-#define AR_WA_RESET_EN (1 << 18) /* Sw Control to enable PCI-Reset to POR (bit 15) */
+#define AR_WA_RESET_EN (1 << 18) /* Enable PCI-Reset to
+ POR (bit 15) */
#define AR_WA_ANALOG_SHIFT (1 << 20)
#define AR_WA_POR_SHORT (1 << 21) /* PCI-E Phy reset control */
#define AR_WA_BIT22 (1 << 22)
@@ -1231,6 +1234,8 @@ enum {
#define AR_RTC_PLL_CLKSEL 0x00000300
#define AR_RTC_PLL_CLKSEL_S 8
#define AR_RTC_PLL_BYPASS 0x00010000
+#define AR_RTC_PLL_NOPWD 0x00040000
+#define AR_RTC_PLL_NOPWD_S 18
#define PLL3 0x16188
#define PLL3_DO_MEAS_MASK 0x40000000
@@ -2211,5 +2216,168 @@ enum {
#define AR_BTCOEX_CTRL3_CONT_INFO_TIMEOUT 0x00000fff
#define AR_BTCOEX_CTRL3_CONT_INFO_TIMEOUT_S 0
+/* WoW - Wake On Wireless */
+
+#define AR_PMCTRL_AUX_PWR_DET 0x10000000 /* Puts Chip in L2 state */
+#define AR_PMCTRL_D3COLD_VAUX 0x00800000
+#define AR_PMCTRL_HOST_PME_EN 0x00400000 /* Send OOB WAKE_L on WoW
+ event */
+#define AR_PMCTRL_WOW_PME_CLR 0x00200000 /* Clear WoW event */
+#define AR_PMCTRL_PWR_STATE_MASK 0x0f000000 /* Power State Mask */
+#define AR_PMCTRL_PWR_STATE_D1D3 0x0f000000 /* Activate D1 and D3 */
+#define AR_PMCTRL_PWR_STATE_D0 0x08000000 /* Activate D0 */
+#define AR_PMCTRL_PWR_PM_CTRL_ENA 0x00008000 /* Enable power mgmt */
+
+#define AR_WOW_BEACON_TIMO_MAX 0xffffffff
+
+/*
+ * MAC WoW Registers
+ */
+
+#define AR_WOW_PATTERN 0x825C
+#define AR_WOW_COUNT 0x8260
+#define AR_WOW_BCN_EN 0x8270
+#define AR_WOW_BCN_TIMO 0x8274
+#define AR_WOW_KEEP_ALIVE_TIMO 0x8278
+#define AR_WOW_KEEP_ALIVE 0x827c
+#define AR_WOW_US_SCALAR 0x8284
+#define AR_WOW_KEEP_ALIVE_DELAY 0x8288
+#define AR_WOW_PATTERN_MATCH 0x828c
+#define AR_WOW_PATTERN_OFF1 0x8290 /* pattern bytes 0 -> 3 */
+#define AR_WOW_PATTERN_OFF2 0x8294 /* pattern bytes 4 -> 7 */
+
+/* for AR9285 or later version of chips */
+#define AR_WOW_EXACT 0x829c
+#define AR_WOW_LENGTH1 0x8360
+#define AR_WOW_LENGTH2 0X8364
+/* register to enable match for less than 256 bytes packets */
+#define AR_WOW_PATTERN_MATCH_LT_256B 0x8368
+
+#define AR_SW_WOW_CONTROL 0x20018
+#define AR_SW_WOW_ENABLE 0x1
+#define AR_SWITCH_TO_REFCLK 0x2
+#define AR_RESET_CONTROL 0x4
+#define AR_RESET_VALUE_MASK 0x8
+#define AR_HW_WOW_DISABLE 0x10
+#define AR_CLR_MAC_INTERRUPT 0x20
+#define AR_CLR_KA_INTERRUPT 0x40
+
+/* AR_WOW_PATTERN register values */
+#define AR_WOW_BACK_OFF_SHIFT(x) ((x & 0xf) << 28) /* in usecs */
+#define AR_WOW_MAC_INTR_EN 0x00040000
+#define AR_WOW_MAGIC_EN 0x00010000
+#define AR_WOW_PATTERN_EN(x) (x & 0xff)
+#define AR_WOW_PAT_FOUND_SHIFT 8
+#define AR_WOW_PATTERN_FOUND(x) (x & (0xff << AR_WOW_PAT_FOUND_SHIFT))
+#define AR_WOW_PATTERN_FOUND_MASK ((0xff) << AR_WOW_PAT_FOUND_SHIFT)
+#define AR_WOW_MAGIC_PAT_FOUND 0x00020000
+#define AR_WOW_MAC_INTR 0x00080000
+#define AR_WOW_KEEP_ALIVE_FAIL 0x00100000
+#define AR_WOW_BEACON_FAIL 0x00200000
+
+#define AR_WOW_STATUS(x) (x & (AR_WOW_PATTERN_FOUND_MASK | \
+ AR_WOW_MAGIC_PAT_FOUND | \
+ AR_WOW_KEEP_ALIVE_FAIL | \
+ AR_WOW_BEACON_FAIL))
+#define AR_WOW_CLEAR_EVENTS(x) (x & ~(AR_WOW_PATTERN_EN(0xff) | \
+ AR_WOW_MAGIC_EN | \
+ AR_WOW_MAC_INTR_EN | \
+ AR_WOW_BEACON_FAIL | \
+ AR_WOW_KEEP_ALIVE_FAIL))
+
+/* AR_WOW_COUNT register values */
+#define AR_WOW_AIFS_CNT(x) (x & 0xff)
+#define AR_WOW_SLOT_CNT(x) ((x & 0xff) << 8)
+#define AR_WOW_KEEP_ALIVE_CNT(x) ((x & 0xff) << 16)
+
+/* AR_WOW_BCN_EN register */
+#define AR_WOW_BEACON_FAIL_EN 0x00000001
+
+/* AR_WOW_BCN_TIMO rgister */
+#define AR_WOW_BEACON_TIMO 0x40000000 /* valid if BCN_EN is set */
+
+/* AR_WOW_KEEP_ALIVE_TIMO register */
+#define AR_WOW_KEEP_ALIVE_TIMO_VALUE
+#define AR_WOW_KEEP_ALIVE_NEVER 0xffffffff
+
+/* AR_WOW_KEEP_ALIVE register */
+#define AR_WOW_KEEP_ALIVE_AUTO_DIS 0x00000001
+#define AR_WOW_KEEP_ALIVE_FAIL_DIS 0x00000002
+
+/* AR_WOW_KEEP_ALIVE_DELAY register */
+#define AR_WOW_KEEP_ALIVE_DELAY_VALUE 0x000003e8 /* 1 msec */
+
+
+/*
+ * keep it long for beacon workaround - ensure no false alarm
+ */
+#define AR_WOW_BMISSTHRESHOLD 0x20
+
+/* AR_WOW_PATTERN_MATCH register */
+#define AR_WOW_PAT_END_OF_PKT(x) (x & 0xf)
+#define AR_WOW_PAT_OFF_MATCH(x) ((x & 0xf) << 8)
+
+/*
+ * default values for Wow Configuration for backoff, aifs, slot, keep-alive
+ * to be programmed into various registers.
+ */
+#define AR_WOW_PAT_BACKOFF 0x00000004 /* AR_WOW_PATTERN_REG */
+#define AR_WOW_CNT_AIFS_CNT 0x00000022 /* AR_WOW_COUNT_REG */
+#define AR_WOW_CNT_SLOT_CNT 0x00000009 /* AR_WOW_COUNT_REG */
+/*
+ * Keepalive count applicable for AR9280 2.0 and above.
+ */
+#define AR_WOW_CNT_KA_CNT 0x00000008 /* AR_WOW_COUNT register */
+
+/* WoW - Transmit buffer for keep alive frames */
+#define AR_WOW_TRANSMIT_BUFFER 0xe000 /* E000 - EFFC */
+
+#define AR_WOW_TXBUF(i) (AR_WOW_TRANSMIT_BUFFER + ((i) << 2))
+
+#define AR_WOW_KA_DESC_WORD2 0xe000
+#define AR_WOW_KA_DESC_WORD3 0xe004
+#define AR_WOW_KA_DESC_WORD4 0xe008
+#define AR_WOW_KA_DESC_WORD5 0xe00c
+#define AR_WOW_KA_DESC_WORD6 0xe010
+#define AR_WOW_KA_DESC_WORD7 0xe014
+#define AR_WOW_KA_DESC_WORD8 0xe018
+#define AR_WOW_KA_DESC_WORD9 0xe01c
+#define AR_WOW_KA_DESC_WORD10 0xe020
+#define AR_WOW_KA_DESC_WORD11 0xe024
+#define AR_WOW_KA_DESC_WORD12 0xe028
+#define AR_WOW_KA_DESC_WORD13 0xe02c
+
+#define AR_WOW_KA_DATA_WORD0 0xe030
+#define AR_WOW_KA_DATA_WORD1 0xe034
+#define AR_WOW_KA_DATA_WORD2 0xe038
+#define AR_WOW_KA_DATA_WORD3 0xe03c
+#define AR_WOW_KA_DATA_WORD4 0xe040
+#define AR_WOW_KA_DATA_WORD5 0xe044
+
+/* WoW Transmit Buffer for patterns */
+#define AR_WOW_TB_PATTERN0 0xe100
+#define AR_WOW_TB_PATTERN1 0xe200
+#define AR_WOW_TB_PATTERN2 0xe300
+#define AR_WOW_TB_PATTERN3 0xe400
+#define AR_WOW_TB_PATTERN4 0xe500
+#define AR_WOW_TB_PATTERN5 0xe600
+#define AR_WOW_TB_PATTERN6 0xe700
+#define AR_WOW_TB_PATTERN7 0xe800
+#define AR_WOW_TB_MASK0 0xec00
+#define AR_WOW_TB_MASK1 0xec20
+#define AR_WOW_TB_MASK2 0xec40
+#define AR_WOW_TB_MASK3 0xec60
+#define AR_WOW_TB_MASK4 0xec80
+#define AR_WOW_TB_MASK5 0xeca0
+#define AR_WOW_TB_MASK6 0xecc0
+#define AR_WOW_TB_MASK7 0xece0
+
+/* Currently Pattern 0-7 are supported - so bit 0-7 are set */
+#define AR_WOW_PATTERN_SUPPORTED 0xff
+#define AR_WOW_LENGTH_MAX 0xff
+#define AR_WOW_LEN1_SHIFT(_i) ((0x3 - ((_i) & 0x3)) << 0x3)
+#define AR_WOW_LENGTH1_MASK(_i) (AR_WOW_LENGTH_MAX << AR_WOW_LEN1_SHIFT(_i))
+#define AR_WOW_LEN2_SHIFT(_i) ((0x7 - ((_i) & 0x7)) << 0x3)
+#define AR_WOW_LENGTH2_MASK(_i) (AR_WOW_LENGTH_MAX << AR_WOW_LEN2_SHIFT(_i))
#endif
--
1.7.0.4
From: Mohammed Shafi Shajakhan <[email protected]>
add a new file wow.c which takes care of the hardware code
for WoW.
*program the descriptors and data words to periodically
send Keep Alive Frames.
*program the user defined patterns/masks and pattern length
in the hardware registers.
*'ath9k_hw_wow_enable' is called during the drivers suspend
callback which takes care of the following
- tracking wow event mask (to suppress spurious
wow events)
- properly configure suspend/resume WAR registers
- configure PCIE PM control register
- configure MAC WoW registers and their timeouts
- enabling wow configuration like magic packet,
user patterns based on users configuration
- configuring timeouts for KAL, beacon miss,
aifs, slot time, backoff
- create Keep Alive Pattern ('KAL')
*'ath9k_hw_wow_wakeup' is called during the drivers resume
callback which takes care of the following
- primary task is to find the reason for wakeup
from the wow status register
- configure/restore AR_PCIE_PM_CTRL register
- clear all WoW events
- configure/restore suspend/resume WAR registers
Signed-off-by: Luis R. Rodriguez <[email protected]>
Signed-off-by: Mohammed Shafi Shajakhan <[email protected]>
---
drivers/net/wireless/ath/ath9k/Makefile | 1 +
drivers/net/wireless/ath/ath9k/hw.h | 32 ++
drivers/net/wireless/ath/ath9k/wow.c | 547 +++++++++++++++++++++++++++++++
3 files changed, 580 insertions(+), 0 deletions(-)
create mode 100644 drivers/net/wireless/ath/ath9k/wow.c
diff --git a/drivers/net/wireless/ath/ath9k/Makefile b/drivers/net/wireless/ath/ath9k/Makefile
index 27d95fe..72ffcd0 100644
--- a/drivers/net/wireless/ath/ath9k/Makefile
+++ b/drivers/net/wireless/ath/ath9k/Makefile
@@ -12,6 +12,7 @@ ath9k-$(CONFIG_ATH9K_AHB) += ahb.o
ath9k-$(CONFIG_ATH9K_DEBUGFS) += debug.o
ath9k-$(CONFIG_ATH9K_DFS_DEBUGFS) += dfs_debug.o
ath9k-$(CONFIG_ATH9K_DFS_CERTIFIED) += dfs.o
+ath9k-$(CONFIG_PM_SLEEP) += wow.o
obj-$(CONFIG_ATH9K) += ath9k.o
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
index ca770e4..3f70800 100644
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -1105,6 +1105,38 @@ ath9k_hw_get_btcoex_scheme(struct ath_hw *ah)
}
#endif /* CONFIG_ATH9K_BTCOEX_SUPPORT */
+
+#ifdef CONFIG_PM_SLEEP
+const char *ath9k_hw_wow_event_to_string(u32 wow_event);
+void ath9k_hw_wow_apply_pattern(struct ath_hw *ah, u8 *user_pattern,
+ u8 *user_mask, int pattern_count,
+ int pattern_len);
+u32 ath9k_hw_wow_wakeup(struct ath_hw *ah);
+void ath9k_hw_wow_enable(struct ath_hw *ah, u32 pattern_enable);
+#else
+static inline const char *ath9k_hw_wow_event_to_string(u32 wow_event)
+{
+ return NULL;
+}
+static inline void ath9k_hw_wow_apply_pattern(struct ath_hw *ah,
+ u8 *user_pattern, u8 *user_mask,
+ int pattern_count,
+ int pattern_len)
+{
+ return;
+}
+static inline u32 ath9k_hw_wow_wakeup(struct ath_hw *ah)
+{
+ return 0;
+}
+static inline void ath9k_hw_wow_enable(struct ath_hw *ah, u32 pattern_enable)
+{
+ return;
+}
+#endif
+
+
+
#define ATH9K_CLOCK_RATE_CCK 22
#define ATH9K_CLOCK_RATE_5GHZ_OFDM 40
#define ATH9K_CLOCK_RATE_2GHZ_OFDM 44
diff --git a/drivers/net/wireless/ath/ath9k/wow.c b/drivers/net/wireless/ath/ath9k/wow.c
new file mode 100644
index 0000000..6eed9de
--- /dev/null
+++ b/drivers/net/wireless/ath/ath9k/wow.c
@@ -0,0 +1,547 @@
+
+/*
+ * Copyright (c) 2008-2011 Atheros Communications Inc.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#include <linux/export.h>
+#include "ath9k.h"
+#include "reg.h"
+#include "hw-ops.h"
+
+const char *ath9k_hw_wow_event_to_string(u32 wow_event)
+{
+ if (wow_event & AH_WOW_MAGIC_PATTERN_EN)
+ return "Magic pattern";
+ if (wow_event & AH_WOW_USER_PATTERN_EN)
+ return "User pattern";
+ if (wow_event & AH_WOW_LINK_CHANGE)
+ return "Link change";
+ if (wow_event & AH_WOW_BEACON_MISS)
+ return "Beacon reason";
+
+ return "unknown reason";
+}
+EXPORT_SYMBOL(ath9k_hw_wow_event_to_string);
+
+static void ath9k_hw_config_serdes_wow_sleep(struct ath_hw *ah)
+{
+ int i;
+ /*
+ * for WoW sleep, we reprogram the SerDes so that the PLL
+ * and CHK REQ are both enabled. This use more power
+ * but otherwise WoW sleep is unstable and the chip may
+ * disappear
+ */
+
+ for (i = 0; i < ah->iniPcieSerdesWow.ia_rows; i++)
+ REG_WRITE(ah, INI_RA(&ah->iniPcieSerdesWow, i, 0),
+ INI_RA(&ah->iniPcieSerdesWow, i, 1));
+
+ udelay(1000);
+}
+
+static void ath9k_hw_set_powermode_wow_sleep(struct ath_hw *ah)
+{
+ struct ath_common *common = ath9k_hw_common(ah);
+ REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
+ REG_WRITE(ah, AR_CR, AR_CR_RXD); /* set rx disable bit */
+
+ if (!ath9k_hw_wait(ah, AR_CR, AR_CR_RXE, 0, AH_WAIT_TIMEOUT)) {
+ ath_err(common, "Failed to stop Rx DMA in 10ms"
+ "AR_CR=0x%08x AR_DIAG_SW=0x%08x\n",
+ REG_READ(ah, AR_CR), REG_READ(ah, AR_DIAG_SW));
+ } else {
+ if (!AR_SREV_9300_20_OR_LATER(ah))
+ REG_WRITE(ah, AR_RXDP, 0x0);
+ }
+
+ /* AR9280 WoW has sleep issue, do not set it to sleep */
+ if (AR_SREV_9280_20(ah))
+ return;
+
+ REG_WRITE(ah, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_ON_INT);
+}
+
+#define KAL_FRAME_LEN 28
+#define KAL_FRAME_TYPE 0x2 /* data frame */
+#define KAL_FRAME_SUB_TYPE 0x4 /* null data frame */
+#define KAL_DURATION_ID 0x3d
+#define KAL_NUM_DATA_WORDS 6
+
+static void ath9k_wow_create_keep_alive_pattern(struct ath_hw *ah)
+{
+ struct ath_common *common = ath9k_hw_common(ah);
+ u32 frame_len = KAL_FRAME_LEN;
+ u32 tpc = MAX_RATE_POWER;
+ u32 antenna_mode = 1;
+ u32 transmit_rate;
+ u32 frame_type = KAL_FRAME_TYPE; /* frame type -> data */
+ u32 sub_type = KAL_FRAME_SUB_TYPE; /* subtype -> NULL data */
+ u32 to_ds = 1;
+ u32 duration_id = KAL_DURATION_ID;
+ u8 sta_mac_addr[ETH_ALEN], ap_mac_addr[ETH_ALEN];
+ u32 ctl[12] = {0};
+ u32 data_word[KAL_NUM_DATA_WORDS];
+ u8 i;
+ u32 wow_ka_data_word0;
+
+ memcpy(sta_mac_addr, common->macaddr, ETH_ALEN);
+ memcpy(ap_mac_addr, common->curbssid, ETH_ALEN);
+
+ if (ah->curchan->channelFlags & CHANNEL_CCK)
+ transmit_rate = 0x1b; /* CCK_1M hardware value for this rate */
+ else
+ transmit_rate = 0xb; /* OFDM_6M hardware value for this rate */
+
+ /* set the transmit buffer */
+ ctl[0] = (frame_len | (tpc << 16)) + (antenna_mode << 25);
+ /* antenna_mode not required for AR9300 family of chipsets ? */
+
+ ctl[1] = 0;
+ ctl[2] = 0x7 << 16; /* tx_tries 0 */
+ ctl[3] = transmit_rate;
+ ctl[4] = 0;
+ ctl[7] = (ah->txchainmask) << 2;
+
+ for (i = 0; i < 12; i++)
+ REG_WRITE(ah, (AR_WOW_KA_DESC_WORD2 + i * 4), ctl[i]);
+
+ data_word[0] = (frame_type << 2) | (sub_type << 4) |
+ (to_ds << 8) | (duration_id << 16);
+ data_word[1] = (ap_mac_addr[3] << 24) | (ap_mac_addr[2] << 16) |
+ (ap_mac_addr[1] << 8) | (ap_mac_addr[0]);
+ data_word[2] = (sta_mac_addr[1] << 24) | (sta_mac_addr[0] << 16) |
+ (ap_mac_addr[5] << 8) | (ap_mac_addr[4]);
+ data_word[3] = (sta_mac_addr[5] << 24) | (sta_mac_addr[4] << 16) |
+ (sta_mac_addr[3] << 8) | (sta_mac_addr[2]);
+ data_word[4] = (ap_mac_addr[3] << 24) | (ap_mac_addr[2] << 16) |
+ (ap_mac_addr[1] << 8) | (ap_mac_addr[0]);
+ data_word[5] = (ap_mac_addr[5] << 8) | (ap_mac_addr[4]);
+
+ if (AR_SREV_9462_20_OR_LATER(ah)) {
+ /* AR9462 2.0 has an extra descriptor word (time based
+ * discard) compared to other chips */
+ REG_WRITE(ah, (AR_WOW_KA_DESC_WORD2 + 12*4), 0);
+ wow_ka_data_word0 = AR_WOW_TXBUF(13);
+ } else {
+ wow_ka_data_word0 = AR_WOW_TXBUF(12);
+ }
+
+ for (i = 0; i < KAL_NUM_DATA_WORDS; i++)
+ REG_WRITE(ah, (wow_ka_data_word0 + i*4), data_word[i]);
+
+}
+
+void ath9k_hw_wow_apply_pattern(struct ath_hw *ah, u8 *user_pattern,
+ u8 *user_mask, int pattern_count,
+ int pattern_len)
+{
+ int i;
+ u32 reg_pat[] = {AR_WOW_TB_PATTERN0,
+ AR_WOW_TB_PATTERN1,
+ AR_WOW_TB_PATTERN2,
+ AR_WOW_TB_PATTERN3,
+ AR_WOW_TB_PATTERN4,
+ AR_WOW_TB_PATTERN5,
+ AR_WOW_TB_PATTERN6,
+ AR_WOW_TB_PATTERN7
+ }; /* pattern registers */
+ u32 reg_mask[] = {AR_WOW_TB_MASK0,
+ AR_WOW_TB_MASK1,
+ AR_WOW_TB_MASK2,
+ AR_WOW_TB_MASK3,
+ AR_WOW_TB_MASK4,
+ AR_WOW_TB_MASK5,
+ AR_WOW_TB_MASK6,
+ AR_WOW_TB_MASK7
+ }; /* pattern mask registers */
+ u32 pattern_val;
+ u32 mask_val;
+ u32 val;
+ u8 mask_bit = 0x1;
+ u8 pattern;
+
+ /* FIXME: should check count by querying the hardware caopability */
+ if (pattern_count >= MAX_NUM_USER_PATTERN)
+ return;
+
+ pattern = (u8)REG_READ(ah, AR_WOW_PATTERN);
+ pattern = pattern | (mask_bit << pattern_count);
+ REG_WRITE(ah, AR_WOW_PATTERN, pattern);
+
+ /* set the registers for pattern */
+ for (i = 0; i < MAX_PATTERN_SIZE; i += 4) {
+ memcpy(&pattern_val, user_pattern, 4);
+ REG_WRITE(ah, (reg_pat[pattern_count] + i), pattern_val);
+ }
+
+ /* set the registers for mask */
+ for (i = 0; i < MAX_PATTERN_SIZE; i += 4) {
+ memcpy(&mask_val, user_mask, 4);
+ REG_WRITE(ah, (reg_mask[pattern_count] + i), mask_val);
+ }
+
+ /* set the pattern length to be matched
+ *
+ * AR_WOW_LENGTH1_REG1
+ * bit 31:24 pattern 0 length
+ * bit 23:16 pattern 1 length
+ * bit 15:8 pattern 2 length
+ * bit 7:0 pattern 3 length
+ *
+ * AR_WOW_LENGTH1_REG2
+ * bit 31:24 pattern 4 length
+ * bit 23:16 pattern 5 length
+ * bit 15:8 pattern 6 length
+ * bit 7:0 pattern 7 length
+ *
+ * the below logic writes out the new
+ * pattern length for the corresponding
+ * pattern_count, while masking out the
+ * other fields
+ */
+
+ if (AR_SREV_9285_12_OR_LATER(ah)) {
+ if (pattern_count < 4) {
+ /* Pattern 0-3 uses AR_WOW_LENGTH1 register */
+ val = REG_READ(ah, AR_WOW_LENGTH1);
+ val = ((val & (~AR_WOW_LENGTH1_MASK(pattern_count))) |
+ ((pattern_len & AR_WOW_LENGTH_MAX) <<
+ AR_WOW_LEN1_SHIFT(pattern_count)));
+ REG_WRITE(ah, AR_WOW_LENGTH1, val);
+ } else {
+ /* Pattern 4-7 uses AR_WOW_LENGTH2 register */
+ val = REG_READ(ah, AR_WOW_LENGTH2);
+ val = ((val & (~AR_WOW_LENGTH2_MASK(pattern_count))) |
+ ((pattern_len & AR_WOW_LENGTH_MAX) <<
+ AR_WOW_LEN2_SHIFT(pattern_count)));
+ REG_WRITE(ah, AR_WOW_LENGTH2, val);
+ }
+ }
+
+ ah->wow_event_mask |= (1 << (pattern_count + AR_WOW_PAT_FOUND_SHIFT));
+
+}
+EXPORT_SYMBOL(ath9k_hw_wow_apply_pattern);
+
+u32 ath9k_hw_wow_wakeup(struct ath_hw *ah)
+{
+ u32 wow_status = 0;
+ u32 val = 0, rval;
+
+ /*
+ * read the WoW status register to know
+ * the wakeup reason
+ */
+ rval = REG_READ(ah, AR_WOW_PATTERN);
+ val = AR_WOW_STATUS(rval);
+
+ /*
+ * mask only the WoW events that we have enabled. Sometimes
+ * we have spurious WoW events from the AR_WOW_PATTERN
+ * register. This mask will clean it up.
+ */
+
+ val &= ah->wow_event_mask;
+
+ if (val) {
+
+ if (val & AR_WOW_MAGIC_PAT_FOUND)
+ wow_status |= AH_WOW_MAGIC_PATTERN_EN;
+
+ if (AR_WOW_PATTERN_FOUND(val))
+ wow_status |= AH_WOW_USER_PATTERN_EN;
+
+ if (val & AR_WOW_KEEP_ALIVE_FAIL)
+ wow_status |= AH_WOW_LINK_CHANGE;
+
+ if (val & AR_WOW_BEACON_FAIL)
+ wow_status |= AH_WOW_BEACON_MISS;
+
+ }
+
+ /*
+ * set and clear WOW_PME_CLEAR registers for the chip to
+ * generate next wow signal.
+ * disable D3 before accessing other registers ?
+ */
+
+ val = REG_READ(ah, AR_PCIE_PM_CTRL);
+ val &= ~AR_PMCTRL_PWR_STATE_D1D3;
+ /* do we need to check the bit value 0x01000000 (7-10) ?? */
+ val |= AR_PMCTRL_WOW_PME_CLR;
+ REG_WRITE(ah, AR_PCIE_PM_CTRL, val);
+
+ /*
+ * clear all events
+ */
+ REG_WRITE(ah, AR_WOW_PATTERN,
+ AR_WOW_CLEAR_EVENTS(REG_READ(ah, AR_WOW_PATTERN)));
+
+ /*
+ * tie reset register
+ * NB: not tieing it back might have some repurcussions.
+ */
+
+ if (AR_SREV_9280_20_OR_LATER(ah) && !(AR_SREV_9300_20_OR_LATER(ah)))
+ REG_WRITE(ah, AR_WA, (REG_READ(ah, AR_WA) |
+ AR_WA_UNTIE_RESET_EN |
+ AR_WA_POR_SHORT |
+ AR_WA_RESET_EN));
+
+ /* restore the beacon threshold to init value */
+ REG_RMW_FIELD(ah, AR_RSSI_THR, AR_RSSI_THR_BM_THR, INIT_RSSI_THR);
+
+ /*
+ * Restore the way the PCI-E reset, Power-On-Reset, external
+ * PCIE_POR_SHORT pins are tied to its original value.
+ * Previously just before WoW sleep, we untie the PCI-E
+ * reset to our Chip's Power On Reset so that any PCI-E
+ * reset from the bus will not reset our chip
+ */
+
+ if (AR_SREV_9280_20_OR_LATER(ah) && ah->is_pciexpress)
+ ath9k_hw_configpcipowersave(ah, false);
+
+ ah->wow_event_mask = 0;
+
+ return wow_status;
+}
+EXPORT_SYMBOL(ath9k_hw_wow_wakeup);
+
+void ath9k_hw_wow_enable(struct ath_hw *ah, u32 pattern_enable)
+{
+ u32 init_val, val, rval = 0;
+ const int ka_delay = 4; /* delay of 4 milliseconds between
+ two keep alive frames */
+ u32 wow_event_mask;
+ u32 wa_reg_val;
+
+ /*
+ * wow_event_mask is a mask to the AR_WOW_PATTERN register to
+ * indicate which WoW events we have enabled. The WoW events
+ * are from the 'pattern_enable' in this function and
+ * 'pattern_count' of ath9k_hw_wow_apply_pattern()
+ */
+
+ wow_event_mask = ah->wow_event_mask;
+
+ /*
+ * Untie Power-on-Reset from the PCI-E-Reset. When we are in
+ * WOW sleep, we do want the Reset from the PCI-E to disturb
+ * our hw state
+ */
+
+ if (ah->is_pciexpress) {
+
+ if (AR_SREV_9280_20_OR_LATER(ah) &&
+ !(AR_SREV_9300_20_OR_LATER(ah))) {
+ /*
+ * we need to untie
+ */
+ if (AR_SREV_9285(ah) || AR_SREV_9287(ah))
+ wa_reg_val = AR9285_WA_DEFAULT;
+ else
+ wa_reg_val = AR9280_WA_DEFAULT;
+
+ /*
+ * In AR9280 and AR9285, bit 14 in WA register
+ * (disable L1) should only be set when device
+ * enters D3 state and be cleared when device
+ * comes back to D0
+ */
+
+ if (ah->config.pcie_waen & AR_WA_D3_L1_DISABLE)
+ wa_reg_val = wa_reg_val | AR_WA_D3_L1_DISABLE;
+
+ wa_reg_val = wa_reg_val & ~(AR_WA_UNTIE_RESET_EN);
+ wa_reg_val = wa_reg_val | AR_WA_RESET_EN |
+ AR_WA_POR_SHORT;
+ REG_WRITE(ah, AR_WA, wa_reg_val);
+
+ if (!AR_SREV_9285(ah) || AR_SREV_9285_12_OR_LATER(ah))
+ ath9k_hw_config_serdes_wow_sleep(ah);
+
+ }
+
+ if (AR_SREV_9300_20_OR_LATER(ah)) {
+ wa_reg_val = REG_READ(ah, AR_WA);
+ wa_reg_val = wa_reg_val & ~(AR_WA_UNTIE_RESET_EN |
+ AR_WA_D3_L1_DISABLE);
+ wa_reg_val = wa_reg_val | AR_WA_RESET_EN |
+ AR_WA_POR_SHORT;
+ REG_WRITE(ah, AR_WA, wa_reg_val);
+ }
+
+ }
+
+ /*
+ * set the power states appropriately and enable PME
+ */
+ val = REG_READ(ah, AR_PCIE_PM_CTRL);
+ val |= AR_PMCTRL_HOST_PME_EN | AR_PMCTRL_PWR_PM_CTRL_ENA |
+ AR_PMCTRL_AUX_PWR_DET;
+
+ val |= AR_PMCTRL_WOW_PME_CLR;
+ REG_WRITE(ah, AR_PCIE_PM_CTRL, val);
+ val &= ~AR_PMCTRL_WOW_PME_CLR;
+ REG_WRITE(ah, AR_PCIE_PM_CTRL, val);
+
+ /*
+ * Setup for:
+ * - beacon misses
+ * - magic pattern
+ * - keep alive timeout
+ * - pattern matching
+ */
+
+ /*
+ * Program default values foa pattern backoff, aifs/slot/KAL count,
+ * beacon miss timeout, KAL timeout,
+ */
+
+ init_val = REG_READ(ah, AR_WOW_PATTERN);
+ val = AR_WOW_BACK_OFF_SHIFT(AR_WOW_PAT_BACKOFF) | init_val;
+ REG_WRITE(ah, AR_WOW_PATTERN, val);
+ rval = REG_READ(ah, AR_WOW_PATTERN);
+
+ init_val = REG_READ(ah, AR_WOW_COUNT);
+ val = AR_WOW_AIFS_CNT(AR_WOW_CNT_AIFS_CNT) |
+ AR_WOW_SLOT_CNT(AR_WOW_CNT_SLOT_CNT) |
+ AR_WOW_KEEP_ALIVE_CNT(AR_WOW_CNT_KA_CNT);
+ REG_WRITE(ah, AR_WOW_COUNT, val);
+ rval = REG_READ(ah, AR_WOW_COUNT);
+
+ init_val = REG_READ(ah, AR_WOW_BCN_TIMO);
+ if (pattern_enable & AH_WOW_BEACON_MISS)
+ val = AR_WOW_BEACON_TIMO;
+ else
+ /* we are not using the beacon miss. program a value */
+ val = AR_WOW_BEACON_TIMO_MAX;
+
+ REG_WRITE(ah, AR_WOW_BCN_TIMO, val);
+ rval = REG_READ(ah, AR_WOW_BCN_TIMO);
+
+ init_val = REG_READ(ah, AR_WOW_KEEP_ALIVE_TIMO);
+
+ /*
+ * keep alive timo in ms except AR9280
+ */
+ if (!pattern_enable || AR_SREV_9280(ah))
+ val = AR_WOW_KEEP_ALIVE_NEVER;
+ else
+ val = 60000 * 32;
+
+ REG_WRITE(ah, AR_WOW_KEEP_ALIVE_TIMO, val);
+ rval = REG_READ(ah, AR_WOW_KEEP_ALIVE_TIMO);
+
+ init_val = REG_READ(ah, AR_WOW_KEEP_ALIVE_DELAY);
+ /*
+ * keep alive delay in us. based on 'power on clock',
+ * therefore in usec
+ */
+ val = ka_delay * 1000;
+ REG_WRITE(ah, AR_WOW_KEEP_ALIVE_DELAY, val);
+ rval = REG_READ(ah, AR_WOW_KEEP_ALIVE_DELAY);
+
+ /*
+ * create keep alive pattern to respond to beacons
+ */
+ ath9k_wow_create_keep_alive_pattern(ah);
+
+ /*
+ * configure MAC WoW Registers
+ */
+ val = REG_READ(ah, AR_WOW_KEEP_ALIVE);
+
+ /*
+ * send keep alive timeouts anyway
+ */
+
+ val &= ~AR_WOW_KEEP_ALIVE_AUTO_DIS;
+
+ if (pattern_enable & AH_WOW_LINK_CHANGE) {
+ val &= ~AR_WOW_KEEP_ALIVE_FAIL_DIS;
+ wow_event_mask |= AR_WOW_KEEP_ALIVE_FAIL;
+ } else {
+ val |= AR_WOW_KEEP_ALIVE_FAIL_DIS;
+ }
+
+ REG_WRITE(ah, AR_WOW_KEEP_ALIVE, val);
+ val = REG_READ(ah, AR_WOW_KEEP_ALIVE);
+
+ val = REG_READ(ah, AR_WOW_BCN_EN);
+
+ /*
+ * we are relying on a bmiss failure. ensure we have
+ * enough threshold to prevent false positives
+ */
+ REG_RMW_FIELD(ah, AR_RSSI_THR, AR_RSSI_THR_BM_THR,
+ AR_WOW_BMISSTHRESHOLD);
+
+ /*
+ * Beacon miss and user pattern evets are broken
+ * in some older chipsets
+ */
+ if (!AR_SREV_9280_20_OR_LATER(ah))
+ pattern_enable &= ~AH_WOW_BEACON_MISS;
+
+ if (pattern_enable & AH_WOW_BEACON_MISS) {
+ val |= AR_WOW_BEACON_FAIL_EN;
+ wow_event_mask |= AR_WOW_BEACON_FAIL;
+ } else {
+ val &= ~AR_WOW_BEACON_FAIL_EN;
+ }
+
+ REG_WRITE(ah, AR_WOW_BCN_EN, val);
+ val = REG_READ(ah, AR_WOW_BCN_EN);
+
+ /*
+ * Enable the magic packet registers
+ */
+ val = REG_READ(ah, AR_WOW_PATTERN);
+
+ if (pattern_enable & AH_WOW_MAGIC_PATTERN_EN) {
+ val |= AR_WOW_MAGIC_EN;
+ wow_event_mask |= AR_WOW_MAGIC_PAT_FOUND;
+ } else {
+ val &= ~AR_WOW_MAGIC_EN;
+ }
+ val |= AR_WOW_MAC_INTR_EN;
+ REG_WRITE(ah, AR_WOW_PATTERN, val);
+ val = REG_READ(ah, AR_WOW_PATTERN);
+
+ /*
+ * For AR9285 and later version of chipsets
+ * enable WoW pattern match for packets less
+ * than 256 bytes for all patterns
+ */
+ if (AR_SREV_9285_12_OR_LATER(ah))
+ REG_WRITE(ah, AR_WOW_PATTERN_MATCH_LT_256B,
+ AR_WOW_PATTERN_SUPPORTED);
+
+ /*
+ * set the power states appropriately and enable PME
+ */
+ val = REG_READ(ah, AR_PCIE_PM_CTRL);
+ val |= AR_PMCTRL_PWR_STATE_D1D3 | AR_PMCTRL_HOST_PME_EN |
+ AR_PMCTRL_PWR_PM_CTRL_ENA;
+ REG_WRITE(ah, AR_PCIE_PM_CTRL, val);
+
+ REG_CLR_BIT(ah, AR_STA_ID1, AR_STA_ID1_PRESERVE_SEQNUM);
+ ath9k_hw_set_powermode_wow_sleep(ah);
+ ah->wow_event_mask = wow_event_mask;
+}
+EXPORT_SYMBOL(ath9k_hw_wow_enable);
--
1.7.0.4
From: Mohammed Shafi Shajakhan <[email protected]>
add sufficient debug messages in the driver for
debugging WoW
Signed-off-by: Mohammed Shafi Shajakhan <[email protected]>
---
drivers/net/wireless/ath/ath9k/main.c | 91 +++++++++++++++++++++++++++++----
1 files changed, 80 insertions(+), 11 deletions(-)
diff --git a/drivers/net/wireless/ath/ath9k/main.c b/drivers/net/wireless/ath/ath9k/main.c
index 7b8b8a9..92637da 100644
--- a/drivers/net/wireless/ath/ath9k/main.c
+++ b/drivers/net/wireless/ath/ath9k/main.c
@@ -2521,6 +2521,8 @@ void ath9k_wow_add_disassoc_deauth_pattern(struct ath_softc *sc)
dis_deauth_mask[3] = 0xfc;
}
+ ath_dbg(common, WOW, "Adding disassoc/deauth patterns for WoW\n");
+
ath9k_hw_wow_apply_pattern(ah, dis_deauth_pattern, dis_deauth_mask,
pattern_count, byte_cnt);
@@ -2544,6 +2546,7 @@ void ath9k_wow_add_pattern(struct ath_softc *sc, struct cfg80211_wowlan *wowlan)
struct ath9k_wow_pattern *wow_pattern = NULL;
struct cfg80211_wowlan_trig_pkt_pattern *patterns = wowlan->patterns;
s8 i = 0;
+ u16 j = 0;
/*
* check for duplicate patterns
@@ -2553,8 +2556,11 @@ void ath9k_wow_add_pattern(struct ath_softc *sc, struct cfg80211_wowlan *wowlan)
if (!memcmp(wow_pattern->pattern_bytes,
patterns->pattern, MAX_PATTERN_SIZE) &&
!memcmp(wow_pattern->mask_bytes,
- patterns->mask, MAX_PATTERN_SIZE))
+ patterns->mask, MAX_PATTERN_SIZE)) {
+ ath_dbg(common, WOW, "duplicate WOW pattern"
+ "detected returning\n");
return;
+ }
}
i++;
@@ -2567,12 +2573,16 @@ void ath9k_wow_add_pattern(struct ath_softc *sc, struct cfg80211_wowlan *wowlan)
list_for_each_entry(wow_pattern, &wow_info->wow_patterns, list) {
-
+ /* check if we have free slot for the new pattern */
if (!wow_pattern->slot) {
wow_pattern = kzalloc(sizeof(*wow_pattern), GFP_KERNEL);
- if (!wow_pattern)
+ if (!wow_pattern) {
+ ath_dbg(common, WOW, "memory allocation failed"
+ "for wow_pattern driver structure\n");
return;
+ }
+
memcpy(wow_pattern->pattern_bytes,
patterns->pattern, MAX_PATTERN_SIZE);
memcpy(wow_pattern->mask_bytes,
@@ -2582,11 +2592,42 @@ void ath9k_wow_add_pattern(struct ath_softc *sc, struct cfg80211_wowlan *wowlan)
list_add_tail(&wow_pattern->list,
&wow_info->wow_patterns);
- wow_info->num_of_patterns = i + 2;
/*
- * just need to take care of deauth and
+ * need to take care of deauth and
* disssoc pattern, make sure we don't overwirte
*/
+ wow_info->num_of_patterns = i + 2;
+
+ ath_dbg(common, WOW, "number of WOW patterns"
+ "configured %u", wow_info->num_of_patterns);
+
+ ath_dbg(common, WOW, "WoW pattern_len %u",
+ wow_pattern->pattern_len);
+
+ ath_dbg(common, WOW, "WoW patterns:\n");
+
+ for (j = 0; j < MAX_PATTERN_SIZE; j++) {
+
+ if (j && !(j % 32))
+ ath_dbg(common, WOW, "\n");
+
+ ath_dbg(common, WOW, "0x%x",
+ wow_pattern->pattern_bytes[j]);
+
+ }
+
+ ath_dbg(common, WOW, "WoW mask:\n");
+
+ for (j = 0; j < MAX_PATTERN_SIZE; j++) {
+
+ if (j && !(j % 32))
+ ath_dbg(common, WOW, "\n");
+
+ ath_dbg(common, WOW, "0x%x",
+ wow_pattern->mask_bytes[j]);
+
+ }
+
ath9k_hw_wow_apply_pattern(ah,
wow_pattern->pattern_bytes,
@@ -2598,8 +2639,11 @@ void ath9k_wow_add_pattern(struct ath_softc *sc, struct cfg80211_wowlan *wowlan)
i++;
- if (i >= MAX_NUM_USER_PATTERN)
+ if (i >= MAX_NUM_USER_PATTERN) {
+ ath_dbg(common, WOW, "no available slot for new"
+ "WOW pattern\n");
break;
+ }
}
}
@@ -2617,12 +2661,16 @@ static int ath9k_suspend(struct ieee80211_hw *hw,
sc->wow_enabled = false;
- if (WARN_ON(!wowlan))
+ if (WARN_ON(!wowlan)) {
+ ath_dbg(common, WOW, "None of the WoW triggers enabled");
return -EINVAL;
+ }
ath9k_ps_wakeup(sc);
if (!device_can_wakeup(sc->dev)) {
+ ath_dbg(common, WOW, "device_can_wakeup failed"
+ "WoW is not enabled");
ret = 1;
goto fail_wow;
}
@@ -2634,13 +2682,33 @@ static int ath9k_suspend(struct ieee80211_hw *hw,
* configure 'keep alive frame' for each
* STA
*/
- if (!(sc->sc_flags & SC_OP_PRIM_STA_VIF) || (sc->nvifs > 1)) {
+ if (sc->nvifs > 1) {
+ ath_dbg(common, WOW, "more than one interfaces"
+ "Currently WoW for multivif is not handled"
+ "WoW is not enabled %s\n", __func__);
+ ret = 1;
+ goto fail_wow;
+ }
+
+ if (!(sc->sc_flags & SC_OP_PRIM_STA_VIF)) {
+ ath_dbg(common, WOW, "None of the STA vifs are associated"
+ "WoW is not enabled %s\n", __func__);
ret = 1;
goto fail_wow;
}
+
wow_triggers_enabled = ath9k_wow_map_triggers(sc, wowlan);
+ ath_dbg(common, WOW, "WoW triggers enabled 0x%x\n",
+ wow_triggers_enabled);
+
+ if (!wow_triggers_enabled) {
+ ath_dbg(common, WOW, "No WoW triggers are configured\n");
+ ret = 1;
+ goto fail_wow;
+ }
+
if (wow_triggers_enabled & AH_WOW_USER_PATTERN_EN) {
ath9k_wow_add_disassoc_deauth_pattern(sc);
ath9k_wow_add_pattern(sc, wowlan);
@@ -2678,8 +2746,10 @@ static int ath9k_resume(struct ieee80211_hw *hw)
mutex_lock(&sc->mutex);
- if (!sc->wow_enabled)
+ if (!sc->wow_enabled) {
+ ath_dbg(common, ANY, "WoW not enabled %s\n", __func__);
goto wow_unlock;
+ }
ath9k_ps_wakeup(sc);
ath9k_hw_disable_interrupts(ah);
@@ -2703,14 +2773,13 @@ static int ath9k_resume(struct ieee80211_hw *hw)
if (wow_status) {
ath_dbg(common, ANY, "Waking up due to WoW triggers %s"
- "with WoW status = %x\n",
+ "with WoW status = 0x%x\n",
ath9k_hw_wow_event_to_string(wow_status), wow_status);
}
ath9k_ps_restore(sc);
wow_unlock:
-
mutex_unlock(&sc->mutex);
return 0;
}
--
1.7.0.4
From: Mohammed Shafi Shajakhan <[email protected]>
to help the developers and users to debug/know
whats happening with WoW
Signed-off-by: Mohammed Shafi Shajakhan <[email protected]>
---
drivers/net/wireless/ath/ath.h | 2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/drivers/net/wireless/ath/ath.h b/drivers/net/wireless/ath/ath.h
index c54b7d3..9bd0248 100644
--- a/drivers/net/wireless/ath/ath.h
+++ b/drivers/net/wireless/ath/ath.h
@@ -215,6 +215,7 @@ void ath_printk(const char *level, const struct ath_common *common,
* used exclusively for WLAN-BT coexistence starting from
* AR9462.
* @ATH_DBG_DFS: radar datection
+ * @ATH_DBG_WOW: Wake on Wireless
* @ATH_DBG_ANY: enable all debugging
*
* The debug level is used to control the amount and type of debugging output
@@ -242,6 +243,7 @@ enum ATH_DEBUG {
ATH_DBG_BSTUCK = 0x00008000,
ATH_DBG_MCI = 0x00010000,
ATH_DBG_DFS = 0x00020000,
+ ATH_DBG_WOW = 0x00040000,
ATH_DBG_ANY = 0xffffffff
};
--
1.7.0.4
From: Mohammed Shafi Shajakhan <[email protected]>
Signed-off-by: Mohammed Shafi Shajakhan <[email protected]>
---
drivers/net/wireless/ath/ath9k/pci.c | 3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/drivers/net/wireless/ath/ath9k/pci.c b/drivers/net/wireless/ath/ath9k/pci.c
index 9b25299..32608ea 100644
--- a/drivers/net/wireless/ath/ath9k/pci.c
+++ b/drivers/net/wireless/ath/ath9k/pci.c
@@ -310,6 +310,9 @@ static int ath_pci_suspend(struct device *device)
struct ieee80211_hw *hw = pci_get_drvdata(pdev);
struct ath_softc *sc = hw->priv;
+ if (sc->wow_enabled)
+ return 0;
+
/* The device has to be moved to FULLSLEEP forcibly.
* Otherwise the chip never moved to full sleep,
* when no interface is up.
--
1.7.0.4
From: Mohammed Shafi Shajakhan <[email protected]>
add suspend/resume/set_wakeup callbacks to the driver
*suspend
- bail out only if all the conditions for configuring WoW
is fine, currently multivif case is not handled
- check for associated state
- map wow triggers from user space data
- add deauth/disassoc pattern and user defined pattern.,
for the later a list is maintained
- store the interrupt mask before suspend, enabled beacon
miss interrupt for WoW
- configure WoW in the hardware by calling the
ath9k_hw_wow_enable
*resume
- restore the interrupts based on the interrupt mask
stored before suspend
- call ath9k_hw_wow_wakeup to configure/restore the hardware
after wow wakeup by clearning away WoW events and also
to know the WoW wakeup reason from the status register
*set_wakeup
- to call 'device_set_wakeup_enable' from cfg80211/mac80211
when wow is configured and as per Rafael/johannnes the
right way to do so rather in the driver suspend/resume
call back
also a minor cleanup
Signed-off-by: Mohammed Shafi Shajakhan <[email protected]>
---
drivers/net/wireless/ath/ath9k/ath9k.h | 9 +
drivers/net/wireless/ath/ath9k/init.c | 1 +
drivers/net/wireless/ath/ath9k/main.c | 384 +++++++++++++++++++++++++++++++-
drivers/net/wireless/ath/ath9k/pci.c | 3 +
4 files changed, 388 insertions(+), 9 deletions(-)
diff --git a/drivers/net/wireless/ath/ath9k/ath9k.h b/drivers/net/wireless/ath/ath9k/ath9k.h
index 2b3c94b..f32f43a 100644
--- a/drivers/net/wireless/ath/ath9k/ath9k.h
+++ b/drivers/net/wireless/ath/ath9k/ath9k.h
@@ -500,6 +500,14 @@ struct ath9k_wow_info {
struct list_head wow_patterns;
};
+#ifdef CONFIG_PM_SLEEP
+void ath_wow_cleanup(struct ath_softc *sc);
+#else
+static inline void ath_wow_cleanup(struct ath_softc *sc)
+{
+}
+#endif
+
/********************/
/* LED Control */
/********************/
@@ -693,6 +701,7 @@ struct ath_softc {
struct ath_ant_comb ant_comb;
u8 ant_tx, ant_rx;
+ bool wow_enabled;
#ifdef CONFIG_PM_SLEEP
bool wow_got_bmiss_intr;
diff --git a/drivers/net/wireless/ath/ath9k/init.c b/drivers/net/wireless/ath/ath9k/init.c
index 0e82981..4872d0f 100644
--- a/drivers/net/wireless/ath/ath9k/init.c
+++ b/drivers/net/wireless/ath/ath9k/init.c
@@ -854,6 +854,7 @@ void ath9k_deinit_device(struct ath_softc *sc)
ath9k_ps_restore(sc);
ieee80211_unregister_hw(hw);
+ ath_wow_cleanup(sc);
ath_rx_cleanup(sc);
ath_tx_cleanup(sc);
ath9k_deinit_softc(sc);
diff --git a/drivers/net/wireless/ath/ath9k/main.c b/drivers/net/wireless/ath/ath9k/main.c
index 215eb25..7b8b8a9 100644
--- a/drivers/net/wireless/ath/ath9k/main.c
+++ b/drivers/net/wireless/ath/ath9k/main.c
@@ -803,6 +803,17 @@ irqreturn_t ath_isr(int irq, void *dev)
if (status & SCHED_INTR)
sched = true;
+#ifdef CONFIG_PM_SLEEP
+ if (status & ATH9K_INT_BMISS) {
+ if (sc->wow_sleep_proc_intr) {
+ ath_dbg(common, ANY, "during WoW we got a BMISS\n");
+ sc->wow_got_bmiss_intr = true;
+ sc->wow_sleep_proc_intr = false;
+ }
+ ath_dbg(common, INTERRUPT, "beacon miss interrupt\n");
+ }
+#endif
+
/*
* If a FATAL or RXORN interrupt is received, we have to reset the
* chip immediately.
@@ -2366,24 +2377,374 @@ static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
return 0;
}
+#ifdef CONFIG_PM_SLEEP
+
+void ath_wow_cleanup(struct ath_softc *sc)
+{
+ struct ath9k_wow_info *wow_info = &sc->wow_info;
+ struct ath9k_wow_pattern *wow_pattern = NULL, *tmp;
+
+ if (!sc->wow_enabled)
+ return;
+
+ list_for_each_entry_safe(wow_pattern, tmp,
+ &wow_info->wow_patterns, list) {
+
+ list_del(&wow_pattern->list);
+ kfree(wow_pattern);
+
+ }
+
+}
+
+u32 ath9k_wow_map_triggers(struct ath_softc *sc, struct cfg80211_wowlan *wowlan)
+{
+ u32 wow_triggers = 0;
+
+ if (wowlan->disconnect)
+ wow_triggers |= AH_WOW_LINK_CHANGE |
+ AH_WOW_BEACON_MISS;
+ if (wowlan->magic_pkt)
+ wow_triggers |= AH_WOW_MAGIC_PATTERN_EN;
+
+ if (wowlan->n_patterns)
+ wow_triggers |= AH_WOW_USER_PATTERN_EN;
+
+ if (wow_triggers)
+ sc->wow_enabled = true;
+
+ return wow_triggers;
+}
+
+void ath9k_wow_add_disassoc_deauth_pattern(struct ath_softc *sc)
+{
+ struct ath_hw *ah = sc->sc_ah;
+ struct ath_common *common = ath9k_hw_common(ah);
+ struct ath9k_hw_capabilities *pcaps = &ah->caps;
+ int pattern_count = 0;
+ int i, byte_cnt;
+ u8 dis_deauth_pattern[MAX_PATTERN_SIZE];
+ u8 dis_deauth_mask[MAX_PATTERN_SIZE];
+
+ memset(dis_deauth_pattern, 0, MAX_PATTERN_SIZE);
+ memset(dis_deauth_mask, 0, MAX_PATTERN_SIZE);
+
+ /*
+ * Create Dissassociate / Deauthenticate packet filter
+ *
+ * 2 bytes 2 byte 6 bytes 6 bytes 6 bytes
+ * +--------------+----------+---------+--------+--------+----
+ * + Frame Control+ Duration + DA + SA + BSSID +
+ * +--------------+----------+---------+--------+--------+----
+ *
+ * The above is the management frame format for disassociate/
+ * deauthenticate pattern, from this we need to match the first byte
+ * of 'Frame Control' and DA, SA, and BSSID fields
+ * (skipping 2nd byte of FC and Duration feild.
+ *
+ * Disassociate pattern
+ * --------------------
+ * Frame control = 00 00 1010
+ * DA, SA, BSSID = x:x:x:x:x:x
+ * Pattern will be A0000000 | x:x:x:x:x:x | x:x:x:x:x:x
+ * | x:x:x:x:x:x -- 22 bytes
+ *
+ * Deauthenticate pattern
+ * ----------------------
+ * Frame control = 00 00 1100
+ * DA, SA, BSSID = x:x:x:x:x:x
+ * Pattern will be C0000000 | x:x:x:x:x:x | x:x:x:x:x:x
+ * | x:x:x:x:x:x -- 22 bytes
+ */
+
+ /* Create Disassociate Pattern first */
+
+ byte_cnt = 0;
+
+ /* Fill out the mask with all FF's */
+
+ for (i = 0; i < MAX_PATTERN_MASK_SIZE; i++)
+ dis_deauth_mask[i] = 0xff;
+
+ /* copy the first byte of frame control field */
+ dis_deauth_pattern[byte_cnt] = 0xa0;
+ byte_cnt++;
+
+ /* skip 2nd byte of frame control and Duration field */
+ byte_cnt += 3;
+
+ /*
+ * need not match the destination mac address, it can be a broadcast
+ * mac address or an unicast to this station
+ */
+ byte_cnt += 6;
+
+ /* copy the source mac address */
+ memcpy((dis_deauth_pattern + byte_cnt), common->curbssid, ETH_ALEN);
+
+ byte_cnt += 6;
+
+ /* copy the bssid, its same as the source mac address */
+
+ memcpy((dis_deauth_pattern + byte_cnt), common->curbssid, ETH_ALEN);
+
+ /* Create Disassociate pattern mask */
+
+ if (pcaps->wow_caps & ATH9K_HW_WOW_PATTERN_MATCH_EXACT) {
+
+ if (pcaps->wow_caps & ATH9K_HW_WOW_PATTERN_MATCH_DWORD) {
+ /*
+ * for AR9280, because of hardware limitation, the
+ * first 4 bytes have to be matched for all patterns.
+ * the mask for disassociation and de-auth pattern
+ * matching need to enable the first 4 bytes.
+ * also the duration field needs to be filled.
+ */
+ dis_deauth_mask[0] = 0xf0;
+
+ /*
+ * fill in duration field
+ FIXME: what is the exact value ?
+ */
+ dis_deauth_pattern[2] = 0xff;
+ dis_deauth_pattern[3] = 0xff;
+ } else {
+ dis_deauth_mask[0] = 0xfe;
+ }
+
+ dis_deauth_mask[1] = 0x03;
+ dis_deauth_mask[2] = 0xc0;
+ } else {
+ dis_deauth_mask[0] = 0xef;
+ dis_deauth_mask[1] = 0x3f;
+ dis_deauth_mask[2] = 0x00;
+ dis_deauth_mask[3] = 0xfc;
+ }
+
+ ath9k_hw_wow_apply_pattern(ah, dis_deauth_pattern, dis_deauth_mask,
+ pattern_count, byte_cnt);
+
+ pattern_count++;
+ /*
+ * for de-authenticate pattern, only the first byte of the frame
+ * control field gets changed from 0xA0 to 0xC0
+ */
+ dis_deauth_pattern[0] = 0xC0;
+
+ ath9k_hw_wow_apply_pattern(ah, dis_deauth_pattern, dis_deauth_mask,
+ pattern_count, byte_cnt);
+
+}
+
+void ath9k_wow_add_pattern(struct ath_softc *sc, struct cfg80211_wowlan *wowlan)
+{
+ struct ath_hw *ah = sc->sc_ah;
+ struct ath_common *common = ath9k_hw_common(ah);
+ struct ath9k_wow_info *wow_info = &sc->wow_info;
+ struct ath9k_wow_pattern *wow_pattern = NULL;
+ struct cfg80211_wowlan_trig_pkt_pattern *patterns = wowlan->patterns;
+ s8 i = 0;
+
+ /*
+ * check for duplicate patterns
+ */
+ list_for_each_entry(wow_pattern, &wow_info->wow_patterns, list) {
+ if (wow_pattern->slot) {
+ if (!memcmp(wow_pattern->pattern_bytes,
+ patterns->pattern, MAX_PATTERN_SIZE) &&
+ !memcmp(wow_pattern->mask_bytes,
+ patterns->mask, MAX_PATTERN_SIZE))
+ return;
+ }
+
+ i++;
+
+ if (i >= MAX_NUM_USER_PATTERN)
+ break;
+ }
+
+ i = 0;
+
+ list_for_each_entry(wow_pattern, &wow_info->wow_patterns, list) {
+
+
+ if (!wow_pattern->slot) {
+ wow_pattern = kzalloc(sizeof(*wow_pattern), GFP_KERNEL);
+
+ if (!wow_pattern)
+ return;
+ memcpy(wow_pattern->pattern_bytes,
+ patterns->pattern, MAX_PATTERN_SIZE);
+ memcpy(wow_pattern->mask_bytes,
+ patterns->mask, MAX_PATTERN_SIZE);
+ wow_pattern->slot = true;
+ wow_pattern->pattern_len = patterns->pattern_len;
+ list_add_tail(&wow_pattern->list,
+ &wow_info->wow_patterns);
+
+ wow_info->num_of_patterns = i + 2;
+ /*
+ * just need to take care of deauth and
+ * disssoc pattern, make sure we don't overwirte
+ */
+
+ ath9k_hw_wow_apply_pattern(ah,
+ wow_pattern->pattern_bytes,
+ wow_pattern->mask_bytes,
+ wow_info->num_of_patterns,
+ wow_pattern->pattern_len);
+ break;
+ }
+
+ i++;
+
+ if (i >= MAX_NUM_USER_PATTERN)
+ break;
+ }
+
+}
+
+static int ath9k_suspend(struct ieee80211_hw *hw,
+ struct cfg80211_wowlan *wowlan)
+{
+ struct ath_softc *sc = hw->priv;
+ struct ath_hw *ah = sc->sc_ah;
+ struct ath_common *common = ath9k_hw_common(ah);
+ u32 wow_triggers_enabled = 0;
+ int ret = 0;
+
+ mutex_lock(&sc->mutex);
+
+ sc->wow_enabled = false;
+
+ if (WARN_ON(!wowlan))
+ return -EINVAL;
+
+ ath9k_ps_wakeup(sc);
+
+ if (!device_can_wakeup(sc->dev)) {
+ ret = 1;
+ goto fail_wow;
+ }
+
+ /*
+ * none of the sta vifs are associated
+ * and we are not currently handling multivif
+ * cases, for instance we have to seperately
+ * configure 'keep alive frame' for each
+ * STA
+ */
+ if (!(sc->sc_flags & SC_OP_PRIM_STA_VIF) || (sc->nvifs > 1)) {
+ ret = 1;
+ goto fail_wow;
+ }
+
+ wow_triggers_enabled = ath9k_wow_map_triggers(sc, wowlan);
+
+ if (wow_triggers_enabled & AH_WOW_USER_PATTERN_EN) {
+ ath9k_wow_add_disassoc_deauth_pattern(sc);
+ ath9k_wow_add_pattern(sc, wowlan);
+ }
+
+ /*
+ * To avoid false wake, we enable beacon miss interrupt only
+ * when we go to sleep. We save the current interrupt mask
+ * so we can restore it after the system wakes up
+ */
+ sc->wow_intr_before_sleep = ah->imask;
+ ah->imask &= ~ATH9K_INT_GLOBAL;
+ ath9k_hw_disable_interrupts(ah);
+ ah->imask = ATH9K_INT_BMISS | ATH9K_INT_GLOBAL;
+ ath9k_hw_set_interrupts(ah);
+ ath9k_hw_enable_interrupts(ah);
+
+ ath9k_hw_wow_enable(ah, wow_triggers_enabled);
+
+ ath_dbg(common, ANY, "WoW enabled in ath9k\n");
+ sc->wow_sleep_proc_intr = true;
+
+fail_wow:
+ ath9k_ps_restore(sc);
+ mutex_unlock(&sc->mutex);
+ return ret;
+}
+
+static int ath9k_resume(struct ieee80211_hw *hw)
+{
+ struct ath_softc *sc = hw->priv;
+ struct ath_hw *ah = sc->sc_ah;
+ struct ath_common *common = ath9k_hw_common(ah);
+ u32 wow_status;
+
+ mutex_lock(&sc->mutex);
+
+ if (!sc->wow_enabled)
+ goto wow_unlock;
+
+ ath9k_ps_wakeup(sc);
+ ath9k_hw_disable_interrupts(ah);
+ ah->imask = sc->wow_intr_before_sleep;
+ ath9k_hw_set_interrupts(ah);
+ ath9k_hw_enable_interrupts(ah);
+
+ wow_status = ath9k_hw_wow_wakeup(ah);
+
+ if (sc->wow_got_bmiss_intr) {
+ /*
+ * some devices may not pick beacon miss
+ * as the reason they woke up so we add
+ * that here for that shortcoming
+ */
+ wow_status |= AH_WOW_BEACON_MISS;
+ sc->wow_got_bmiss_intr = false;
+ ath_dbg(common, ANY, "Beacon miss interrupt picked up during"
+ "sleep adding as possible wake up reason\n");
+ }
+
+ if (wow_status) {
+ ath_dbg(common, ANY, "Waking up due to WoW triggers %s"
+ "with WoW status = %x\n",
+ ath9k_hw_wow_event_to_string(wow_status), wow_status);
+ }
+
+ ath9k_ps_restore(sc);
+
+wow_unlock:
+
+ mutex_unlock(&sc->mutex);
+ return 0;
+}
+
+static void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled)
+{
+ struct ath_softc *sc = hw->priv;
+
+ mutex_lock(&sc->mutex);
+ device_set_wakeup_enable(sc->dev, enabled);
+ mutex_unlock(&sc->mutex);
+
+}
+
+#endif
+
struct ieee80211_ops ath9k_ops = {
- .tx = ath9k_tx,
- .start = ath9k_start,
- .stop = ath9k_stop,
- .add_interface = ath9k_add_interface,
+ .tx = ath9k_tx,
+ .start = ath9k_start,
+ .stop = ath9k_stop,
+ .add_interface = ath9k_add_interface,
.change_interface = ath9k_change_interface,
.remove_interface = ath9k_remove_interface,
- .config = ath9k_config,
+ .config = ath9k_config,
.configure_filter = ath9k_configure_filter,
.sta_add = ath9k_sta_add,
.sta_remove = ath9k_sta_remove,
.sta_notify = ath9k_sta_notify,
- .conf_tx = ath9k_conf_tx,
+ .conf_tx = ath9k_conf_tx,
.bss_info_changed = ath9k_bss_info_changed,
.set_key = ath9k_set_key,
- .get_tsf = ath9k_get_tsf,
- .set_tsf = ath9k_set_tsf,
- .reset_tsf = ath9k_reset_tsf,
+ .get_tsf = ath9k_get_tsf,
+ .set_tsf = ath9k_set_tsf,
+ .reset_tsf = ath9k_reset_tsf,
.ampdu_action = ath9k_ampdu_action,
.get_survey = ath9k_get_survey,
.rfkill_poll = ath9k_rfkill_poll_state,
@@ -2394,4 +2755,9 @@ struct ieee80211_ops ath9k_ops = {
.get_stats = ath9k_get_stats,
.set_antenna = ath9k_set_antenna,
.get_antenna = ath9k_get_antenna,
+#ifdef CONFIG_PM_SLEEP
+ .suspend = ath9k_suspend,
+ .resume = ath9k_resume,
+ .set_wakeup = ath9k_set_wakeup,
+#endif
};
diff --git a/drivers/net/wireless/ath/ath9k/pci.c b/drivers/net/wireless/ath/ath9k/pci.c
index 77dc327..9b25299 100644
--- a/drivers/net/wireless/ath/ath9k/pci.c
+++ b/drivers/net/wireless/ath/ath9k/pci.c
@@ -215,6 +215,9 @@ static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
if ((val & 0x0000ff00) != 0)
pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
+ device_init_wakeup(&pdev->dev, 1);
+ device_set_wakeup_enable(&pdev->dev, 0);
+
ret = pci_request_region(pdev, 0, "ath9k");
if (ret) {
dev_err(&pdev->dev, "PCI memory region reserve error\n");
--
1.7.0.4
From: Mohammed Shafi Shajakhan <[email protected]>
have seperate wow capability flags for
*basic wow support
*device capable of matching exact user defined pattern
or de-authentication/disassoc pattern
*device such AR9280 requires first four bytest for
all sort of patterns
Signed-off-by: Luis R. Rodriguez <[email protected]>
Signed-off-by: Mohammed Shafi Shajakhan <[email protected]>
---
drivers/net/wireless/ath/ath9k/hw.h | 18 ++++++++++++++++++
1 files changed, 18 insertions(+), 0 deletions(-)
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
index c061070..ce97b1e 100644
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -231,6 +231,23 @@ enum ath9k_hw_caps {
ATH9K_HW_CAP_DFS = BIT(16),
};
+/*
+ * enum ath9k_hw_wow_caps - WoW device capabilities
+ * @ATH9K_HW_WOW_DEVICE_CAPABLE: device revision is capable of WoW.
+ * @ATH9K_HW_WOW_PATTERN_MATCH_EXACT: device is capable of matching
+ * an exact user defined pattern or de-authentication/disassoc pattern.
+ * @ATH9K_HW_WOW_PATTERN_MATCH_DWORD: device requires the first four
+ * bytes of the pattern for user defined pattern, de-authentication and
+ * disassociation patterns for all types of possible frames recieved
+ * of those types.
+ */
+
+enum ath9k_hw_wow_caps {
+ ATH9K_HW_WOW_DEVICE_CAPABLE = BIT(0),
+ ATH9K_HW_WOW_PATTERN_MATCH_EXACT = BIT(1),
+ ATH9K_HW_WOW_PATTERN_MATCH_DWORD = BIT(2),
+};
+
struct ath9k_hw_capabilities {
u32 hw_caps; /* ATH9K_HW_CAP_* from ath9k_hw_caps */
u16 rts_aggr_limit;
@@ -246,6 +263,7 @@ struct ath9k_hw_capabilities {
u8 txs_len;
u16 pcie_lcr_offset;
bool pcie_lcr_extsync_en;
+ enum ath9k_hw_wow_caps wow_caps;
};
struct ath9k_ops_config {
--
1.7.0.4
From: Mohammed Shafi Shajakhan <[email protected]>
for AR9002 family of chipsets and for WoW sleep, we reprogram
the SerDes so that the PLL and CHK REQ are both enabled. this
uses more power but in certain cases this is required as otherwise
WoW sleep is unstable and chip may disappear.
Signed-off-by: Luis R. Rodriguez <[email protected]>
Signed-off-by: Mohammed Shafi Shajakhan <[email protected]>
---
drivers/net/wireless/ath/ath9k/ar9002_hw.c | 5 +++++
drivers/net/wireless/ath/ath9k/ar9002_initvals.h | 14 ++++++++++++++
drivers/net/wireless/ath/ath9k/hw.h | 3 +++
3 files changed, 22 insertions(+), 0 deletions(-)
diff --git a/drivers/net/wireless/ath/ath9k/ar9002_hw.c b/drivers/net/wireless/ath/ath9k/ar9002_hw.c
index d9a69fc..65b604a 100644
--- a/drivers/net/wireless/ath/ath9k/ar9002_hw.c
+++ b/drivers/net/wireless/ath/ath9k/ar9002_hw.c
@@ -47,6 +47,11 @@ static void ar9002_hw_init_mode_regs(struct ath_hw *ah)
INIT_INI_ARRAY(&ah->iniPcieSerdes,
ar9280PciePhy_clkreq_always_on_L1_9280,
ARRAY_SIZE(ar9280PciePhy_clkreq_always_on_L1_9280), 2);
+#ifdef CONFIG_PM_SLEEP
+ INIT_INI_ARRAY(&ah->iniPcieSerdesWow,
+ ar9280PciePhy_awow,
+ ARRAY_SIZE(ar9280PciePhy_awow), 2);
+#endif
if (AR_SREV_9287_11_OR_LATER(ah)) {
INIT_INI_ARRAY(&ah->iniModes, ar9287Modes_9287_1_1,
diff --git a/drivers/net/wireless/ath/ath9k/ar9002_initvals.h b/drivers/net/wireless/ath/ath9k/ar9002_initvals.h
index 4d18c66..beb6162 100644
--- a/drivers/net/wireless/ath/ath9k/ar9002_initvals.h
+++ b/drivers/net/wireless/ath/ath9k/ar9002_initvals.h
@@ -925,6 +925,20 @@ static const u32 ar9280PciePhy_clkreq_always_on_L1_9280[][2] = {
{0x00004044, 0x00000000},
};
+static const u32 ar9280PciePhy_awow[][2] = {
+ /* Addr allmodes */
+ {0x00004040, 0x9248fd00},
+ {0x00004040, 0x24924924},
+ {0x00004040, 0xa8000019},
+ {0x00004040, 0x13160820},
+ {0x00004040, 0xe5980560},
+ {0x00004040, 0xc01dcffd},
+ {0x00004040, 0x1aaabe41},
+ {0x00004040, 0xbe105554},
+ {0x00004040, 0x00043007},
+ {0x00004044, 0x00000000},
+};
+
static const u32 ar9285Modes_9285_1_2[][5] = {
/* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
{0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160},
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
index ce97b1e..ca770e4 100644
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -862,6 +862,9 @@ struct ath_hw {
struct ar5416IniArray iniBank7;
struct ar5416IniArray iniAddac;
struct ar5416IniArray iniPcieSerdes;
+#ifdef CONFIG_PM_SLEEP
+ struct ar5416IniArray iniPcieSerdesWow;
+#endif
struct ar5416IniArray iniPcieSerdesLowPower;
struct ar5416IniArray iniModesFastClock;
struct ar5416IniArray iniAdditional;
--
1.7.0.4
From: Mohammed Shafi Shajakhan <[email protected]>
currently the code supports WoW triggers due to
*magic packet
*user defined patterns
*deauth and disassoc patterns
*disconnect - beacon miss, last beacon received timeout,
no ack for keeep alive frames.
we need to support other WoW offload features in the
near future. also a minor cleanup.
Signed-off-by: Luis R. Rodriguez <[email protected]>
Signed-off-by: Mohammed Shafi Shajakhan <[email protected]>
---
drivers/net/wireless/ath/ath9k/init.c | 20 ++++++++++++++++++--
1 files changed, 18 insertions(+), 2 deletions(-)
diff --git a/drivers/net/wireless/ath/ath9k/init.c b/drivers/net/wireless/ath/ath9k/init.c
index cb00645..0e82981 100644
--- a/drivers/net/wireless/ath/ath9k/init.c
+++ b/drivers/net/wireless/ath/ath9k/init.c
@@ -656,8 +656,8 @@ void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw)
IEEE80211_HW_SPECTRUM_MGMT |
IEEE80211_HW_REPORTS_TX_ACK_STATUS;
- if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT)
- hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
+ if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
+ hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
if (AR_SREV_9160_10_OR_LATER(sc->sc_ah) || ath9k_modparam_nohwcrypt)
hw->flags |= IEEE80211_HW_MFP_CAPABLE;
@@ -677,6 +677,22 @@ void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw)
hw->wiphy->flags |= WIPHY_FLAG_IBSS_RSN;
hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS;
+#ifdef CONFIG_PM_SLEEP
+
+ if ((ah->caps.wow_caps & ATH9K_HW_WOW_DEVICE_CAPABLE) &&
+ device_can_wakeup(sc->dev)) {
+
+ hw->wiphy->wowlan.flags = WIPHY_WOWLAN_MAGIC_PKT |
+ WIPHY_WOWLAN_DISCONNECT;
+ hw->wiphy->wowlan.n_patterns = MAX_NUM_USER_PATTERN;
+ hw->wiphy->wowlan.pattern_min_len = 1;
+ hw->wiphy->wowlan.pattern_max_len = MAX_PATTERN_SIZE;
+ INIT_LIST_HEAD(&sc->wow_info.wow_patterns);
+
+ }
+
+#endif
+
hw->queues = 4;
hw->max_rates = 4;
hw->channel_change_time = 5000;
--
1.7.0.4
From: Mohammed Shafi Shajakhan <[email protected]>
*add structures, macros and variables for WoW, so that the driver
can make use of it.
*maintain a list for user enabled patterns and masks
*track pattern slots for the hardware limitation on the
maximum number of patterns that can be stored.
*track interrupts enabled before WoW suspend, so
that can be reconfigured after resume
*have macros to parse user defined wow configurations to
hardware code
Signed-off-by: Luis R. Rodriguez <[email protected]>
Signed-off-by: Mohammed Shafi Shajakhan <[email protected]>
---
drivers/net/wireless/ath/ath9k/ath9k.h | 21 +++++++++++++++++++++
drivers/net/wireless/ath/ath9k/hw.h | 21 +++++++++++++++++++++
2 files changed, 42 insertions(+), 0 deletions(-)
diff --git a/drivers/net/wireless/ath/ath9k/ath9k.h b/drivers/net/wireless/ath/ath9k/ath9k.h
index 8c84049..2b3c94b 100644
--- a/drivers/net/wireless/ath/ath9k/ath9k.h
+++ b/drivers/net/wireless/ath/ath9k/ath9k.h
@@ -487,6 +487,19 @@ static inline u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc,
}
#endif /* CONFIG_ATH9K_BTCOEX_SUPPORT */
+struct ath9k_wow_pattern {
+ bool slot;
+ u8 pattern_bytes[MAX_PATTERN_SIZE];
+ u8 mask_bytes[MAX_PATTERN_SIZE];
+ u32 pattern_len;
+ struct list_head list;
+};
+
+struct ath9k_wow_info {
+ u32 num_of_patterns;
+ struct list_head wow_patterns;
+};
+
/********************/
/* LED Control */
/********************/
@@ -680,6 +693,14 @@ struct ath_softc {
struct ath_ant_comb ant_comb;
u8 ant_tx, ant_rx;
+
+#ifdef CONFIG_PM_SLEEP
+ bool wow_got_bmiss_intr;
+ bool wow_sleep_proc_intr; /* in the middle of WoW sleep ? */
+ u32 wow_intr_before_sleep;
+ u32 wow_support_enabled;
+ struct ath9k_wow_info wow_info;
+#endif
};
void ath9k_tasklet(unsigned long data);
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
index aa1680a..c061070 100644
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -179,6 +179,24 @@
#define PAPRD_TABLE_SZ 24
#define PAPRD_IDEAL_AGC2_PWR_RANGE 0xe0
+/* Wake on Wireless */
+
+#define MAX_PATTERN_SIZE 256
+#define MAX_PATTERN_MASK_SIZE 32
+#define MAX_NUM_PATTERN 8
+#define MAX_NUM_USER_PATTERN 6 /* deducting the disassociate and
+ deauthenticate packets */
+
+/*
+ * WoW trigger mapping to hardware code
+ */
+
+#define AH_WOW_USER_PATTERN_EN BIT(0)
+#define AH_WOW_MAGIC_PATTERN_EN BIT(1)
+#define AH_WOW_LINK_CHANGE BIT(2)
+#define AH_WOW_BEACON_MISS BIT(3)
+#define AH_WOW_MAX_EVENTS 4
+
enum ath_hw_txq_subtype {
ATH_TXQ_AC_BE = 0,
ATH_TXQ_AC_BK = 1,
@@ -875,6 +893,9 @@ struct ath_hw {
/* Enterprise mode cap */
u32 ent_mode;
+#ifdef CONFIG_PM_SLEEP
+ u32 wow_event_mask;
+#endif
bool is_clk_25mhz;
int (*get_mac_revision)(void);
int (*external_reset)(void);
--
1.7.0.4