2012-10-30 11:13:37

by Bala Shanmugam

[permalink] [raw]
Subject: [PATCH v2] ath9k: Do not enable ANT diversity if ANT control bit is not set

RvR test is not good when ANT control bit is not set so
enable ANT diversity only when ANT control bit is set.

Signed-off-by: Bala Shanmugam <[email protected]>
---
drivers/net/wireless/ath/ath9k/ar9003_phy.c | 12 +++++++-----
drivers/net/wireless/ath/ath9k/ar9003_phy.h | 2 ++
2 files changed, 9 insertions(+), 5 deletions(-)

diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
index 759f5f5..c93af57 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
@@ -1340,10 +1340,9 @@ static void ar9003_hw_antctrl_shared_chain_lnadiv(struct ath_hw *ah,
regval = REG_READ(ah, AR_PHY_MC_GAIN_CTRL);
regval &= (~AR_ANT_DIV_CTRL_ALL);
regval |= (ant_div_ctl1 & 0x3f) << AR_ANT_DIV_CTRL_ALL_S;
- regval &= ~AR_PHY_ANT_DIV_LNADIV;
- regval |= ((ant_div_ctl1 >> 6) & 0x1) << AR_PHY_ANT_DIV_LNADIV_S;

- if (enable)
+ if (enable &&
+ (ant_div_ctl1 & AR_EEP_ANT_DIV_ENABLE))
regval |= AR_ANT_DIV_ENABLE;

REG_WRITE(ah, AR_PHY_MC_GAIN_CTRL, regval);
@@ -1352,12 +1351,15 @@ static void ar9003_hw_antctrl_shared_chain_lnadiv(struct ath_hw *ah,
regval &= ~AR_FAST_DIV_ENABLE;
regval |= ((ant_div_ctl1 >> 7) & 0x1) << AR_FAST_DIV_ENABLE_S;

- if (enable)
+ if (enable &&
+ (ant_div_ctl1 & AR_EEP_FAST_DIV_ENABLE))
regval |= AR_FAST_DIV_ENABLE;

REG_WRITE(ah, AR_PHY_CCK_DETECT, regval);

- if (enable) {
+ if (enable &&
+ (ant_div_ctl1 & (AR_EEP_ANT_DIV_ENABLE |
+ AR_EEP_FAST_DIV_ENABLE))) {
REG_SET_BIT(ah, AR_PHY_MC_GAIN_CTRL,
(1 << AR_PHY_ANT_SW_RX_PROT_S));
if (ah->curchan && IS_CHAN_2GHZ(ah->curchan))
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.h b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
index 8f58523..b681f27 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h
+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
@@ -300,6 +300,8 @@
#define AR_PHY_ANT_DIV_LNA2 0x1
#define AR_PHY_ANT_DIV_LNA1 0x2
#define AR_PHY_ANT_DIV_LNA1_PLUS_LNA2 0x3
+#define AR_EEP_ANT_DIV_ENABLE 0x80
+#define AR_EEP_FAST_DIV_ENABLE 0x40

#define AR_PHY_EXTCHN_PWRTHR1 (AR_AGC_BASE + 0x2c)
#define AR_PHY_EXT_CHN_WIN (AR_AGC_BASE + 0x30)
--
1.7.4.1



2012-10-30 13:12:11

by Felix Fietkau

[permalink] [raw]
Subject: Re: [PATCH v2] ath9k: Do not enable ANT diversity if ANT control bit is not set

On 2012-10-30 12:13 PM, Bala Shanmugam wrote:
> RvR test is not good when ANT control bit is not set so
> enable ANT diversity only when ANT control bit is set.
>
> Signed-off-by: Bala Shanmugam <[email protected]>
I don't really like this patch; not only is the description very vague,
but it seems to me that the checks are done at the wrong place.

Further comments below...

> --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
> +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
> @@ -1340,10 +1340,9 @@ static void ar9003_hw_antctrl_shared_chain_lnadiv(struct ath_hw *ah,
> regval = REG_READ(ah, AR_PHY_MC_GAIN_CTRL);
> regval &= (~AR_ANT_DIV_CTRL_ALL);
> regval |= (ant_div_ctl1 & 0x3f) << AR_ANT_DIV_CTRL_ALL_S;
> - regval &= ~AR_PHY_ANT_DIV_LNADIV;
> - regval |= ((ant_div_ctl1 >> 6) & 0x1) << AR_PHY_ANT_DIV_LNADIV_S;
>
> - if (enable)
> + if (enable &&
> + (ant_div_ctl1 & AR_EEP_ANT_DIV_ENABLE))
> regval |= AR_ANT_DIV_ENABLE;
>
> REG_WRITE(ah, AR_PHY_MC_GAIN_CTRL, regval);
The code should check much earlier (preferably somewhere in the eeprom
code) if diversity is available at all, and set a capability
accordingly, so that it doesn't even call this function with
enable==true if no diversity is available.

> @@ -1352,12 +1351,15 @@ static void ar9003_hw_antctrl_shared_chain_lnadiv(struct ath_hw *ah,
> regval &= ~AR_FAST_DIV_ENABLE;
> regval |= ((ant_div_ctl1 >> 7) & 0x1) << AR_FAST_DIV_ENABLE_S;
>
> - if (enable)
> + if (enable &&
> + (ant_div_ctl1 & AR_EEP_FAST_DIV_ENABLE))
> regval |= AR_FAST_DIV_ENABLE;
>
It would be much simpler to just remove the if statement and the line
below it. This would be equivalent to what you're doing because of this:
regval |= ((ant_div_ctl1 >> 7) & 0x1) << AR_FAST_DIV_ENABLE_S;

- Felix