2010-03-13 05:46:58

by Luis R. Rodriguez

[permalink] [raw]
Subject: [PATCH v3 00/12] ath9k_hw: complete support for AR9271

This series completes support for AR9271 on the ath9k_hw
module. We had existing code on ath9k_hw for AR9271 but
it requires a little spit shine to get it completely functional.
This patch series just addresses support in the hardware code,
a new separate core driver is still required, which will be
submitted separately. The new patch for ath9k_htc is still
being baked based on feedback, on the next iteration we'll
also throwing in power save support and suspend/resumes support
so that we can support that properly through the stable series,
if merged on to 2.6.34.

I've split out the all-in-one hardware code patch into individual
patches for easier review. I am in hopes this clarifies this should
not introduce regressions on the existing ath9k or ath9k_hw modules
for the already supported chipsets. Hope this helps to identify
whether or not ath9k_htc qualifies for addition into 2.6.34.

Senthil, I've addressed these changes myself because I cannot
move ahead with ar93xx changes without this being in place. Otherwise
I have to rebase and I've done that 3 times now (with this patch).
With this in place I can move ahead on top of of wireless-testing
and hopefully we can all by in synch by the end of next week.

While working on splitting the large patch I actually spotted one
bug in the code submitted and also took the time to remove all
uncessary code. The details of my changes in this v3 are detailed
below. Please review and let me know if you agree with them.
I've tested this with AR9280 and AR9271.

John please merge if you get an ACK from Senthil, Vasanth, or Sujith.

* Split the entire hardware code changes and provide better
commit log entries

* Fix a bug in the noisefloor calibration code for AR9271,
in the previous patch series for hardware changes noisefloor
information for some other chains were still being poked at for
AR9271. We should only get noisefloor information for the
first chain on both the control and extension channel, nothing
more. The hardware patch on v2 did some of this but didn't do the
full job.

* removed pointless code revision checks where AR_SREV_9280_10_OR_LATER(ah)
already includes AR9271 support. To be clear, for example,
this hunk would be pointless:

@@ -1 +1 @@
-if (AR_SREV_9280_10_OR_LATER(ah)
+if (AR_SREV_9280_10_OR_LATER(ah) || AR_SREV_9271(ah))

* Skip the byte swap hunk, I don't see what this fixes, if
its a style fix we can submit it later, please review,
I can't see what this fixes:

diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index 20392cf..9ca9c5a 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -2147,12 +2147,13 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
}
} else {
/* Configure AR9271 target WLAN */
- if (AR_SREV_9271(ah))
+ if (AR_SREV_9271(ah)) {
REG_WRITE(ah, AR_CFG, AR_CFG_SWRB | AR_CFG_SWTB);
+ } else {
#ifdef __BIG_ENDIAN
- else
REG_WRITE(ah, AR_CFG, AR_CFG_SWTD | AR_CFG_SWRD);
#endif
+ }
}

if (ah->btcoex_hw.enabled)
--

* I spotted a check added to bail out for tweaking the ACK/CTS
time out values -- this check should no longer be required
since Felix sent a proper fix for this recenlty. I removed that
hunk:

@@ -1210,6 +1195,9 @@ void ath9k_hw_init_global_settings(struct ath_hw *ah)
REG_WRITE(ah, AR_PCU_MISC,
REG_READ(ah, AR_PCU_MISC) | ah->misc_mode);

+ if (AR_SREV_9271(ah))
+ return;
+
if (conf->channel && conf->channel->band == IEEE80211_BAND_5GHZ)
sifstime = 16;
else
--

* I removed this print hunk, if we really want it we can add it later:

@@ -815,6 +824,7 @@ static void ath9k_olc_temp_compensation(struct ath_hw *ah)

static void ath9k_hw_9271_pa_cal(struct ath_hw *ah, bool is_reset)
{
+ struct ath_common *common = ath9k_hw_common(ah);
u32 regVal;
unsigned int i;
u32 regList [][2] = {
@@ -828,6 +838,8 @@ static void ath9k_hw_9271_pa_cal(struct ath_hw *ah, bool is_reset)
{ 0x7828, 0 } ,
};

+ ath_print(common, ATH_DBG_CALIBRATE, "Running PA Calibration\n");
+
for (i = 0; i < ARRAY_SIZE(regList); i++)
regList[i][1] = REG_READ(ah, regList[i][0]);

--

* Lastly, I also removed the changes to files which only new lines or
line removals. I'll skip elaborating on those.

Sujith (12):
ath9k_hw: update initialization values for AR9271
ath9k_hw: add GPIO setup code for AR9271
ath9k_hw: skip chip tests for AR9271
ath9k_hw: fix RF analog setup for AR9271
ath9k_hw: fix TX descriptor setup for AR9271
ath9k_hw: Fix full sleep setup for AR9271
ath9k_hw: fix noisefloor history buffer usage on AR9271
ath9k_hw: restrict valid nf readings for AR9271 to -114
ath9k_hw: use the skip count for PA calibration on AR9271
ath9k_hw: always set the core clock for AR9271
ath9k_hw: add HTC init hardware call for special resets for AR9271
ath9k_hw: fix hardware deinit

drivers/net/wireless/ath/ath9k/calib.c | 25 ++++--
drivers/net/wireless/ath/ath9k/hw.c | 140 +++++++++++++++--------------
drivers/net/wireless/ath/ath9k/hw.h | 8 ++
drivers/net/wireless/ath/ath9k/init.c | 3 +
drivers/net/wireless/ath/ath9k/initvals.h | 141 +++++++++++++++++++++--------
drivers/net/wireless/ath/ath9k/mac.c | 2 +-
drivers/net/wireless/ath/ath9k/phy.c | 6 +-
drivers/net/wireless/ath/ath9k/reg.h | 3 +
8 files changed, 209 insertions(+), 119 deletions(-)



2010-03-13 05:47:03

by Luis R. Rodriguez

[permalink] [raw]
Subject: [PATCH v3 10/12] ath9k_hw: always set the core clock for AR9271

From: Sujith <[email protected]>

When initializing the PLL on AR9271 we always need
to set the core clock to 117MHz. While at it remove
the baud rate settings for the serial device on the
AR9271, the default settings work well unless you
want to customize it.

Signed-off-by: Sujith <[email protected]>
Signed-off-by: Vasanthakumar Thiagarajan <[email protected]>
Signed-off-by: Luis R. Rodriguez <[email protected]>
---
drivers/net/wireless/ath/ath9k/hw.c | 34 ++--------------------------------
1 files changed, 2 insertions(+), 32 deletions(-)

diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index 20392cf..0b1737f 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -1006,22 +1006,6 @@ static void ath9k_hw_init_qos(struct ath_hw *ah)
REG_WRITE(ah, AR_TXOP_12_15, 0xFFFFFFFF);
}

-static void ath9k_hw_change_target_baud(struct ath_hw *ah, u32 freq, u32 baud)
-{
- u32 lcr;
- u32 baud_divider = freq * 1000 * 1000 / 16 / baud;
-
- lcr = REG_READ(ah , 0x5100c);
- lcr |= 0x80;
-
- REG_WRITE(ah, 0x5100c, lcr);
- REG_WRITE(ah, 0x51004, (baud_divider >> 8));
- REG_WRITE(ah, 0x51000, (baud_divider & 0xff));
-
- lcr &= ~0x80;
- REG_WRITE(ah, 0x5100c, lcr);
-}
-
static void ath9k_hw_init_pll(struct ath_hw *ah,
struct ath9k_channel *chan)
{
@@ -1087,22 +1071,8 @@ static void ath9k_hw_init_pll(struct ath_hw *ah,

/* Switch the core clock for ar9271 to 117Mhz */
if (AR_SREV_9271(ah)) {
- if ((pll == 0x142c) || (pll == 0x2850) ) {
- udelay(500);
- /* set CLKOBS to output AHB clock */
- REG_WRITE(ah, 0x7020, 0xe);
- /*
- * 0x304: 117Mhz, ahb_ratio: 1x1
- * 0x306: 40Mhz, ahb_ratio: 1x1
- */
- REG_WRITE(ah, 0x50040, 0x304);
- /*
- * makes adjustments for the baud dividor to keep the
- * targetted baud rate based on the used core clock.
- */
- ath9k_hw_change_target_baud(ah, AR9271_CORE_CLOCK,
- AR9271_TARGET_BAUD_RATE);
- }
+ udelay(500);
+ REG_WRITE(ah, 0x50040, 0x304);
}

udelay(RTC_PLL_SETTLE_DELAY);
--
1.6.3.3


2010-03-13 05:46:58

by Luis R. Rodriguez

[permalink] [raw]
Subject: [PATCH v3 05/12] ath9k_hw: fix TX descriptor setup for AR9271

From: Sujith <[email protected]>

The TX descriptors setup for AR971 requires the same
setup as AR9285, so use that.

Signed-off-by: Sujith <[email protected]>
Signed-off-by: Vasanthakumar Thiagarajan <[email protected]>
Signed-off-by: Luis R. Rodriguez <[email protected]>
---
drivers/net/wireless/ath/ath9k/mac.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/net/wireless/ath/ath9k/mac.c b/drivers/net/wireless/ath/ath9k/mac.c
index 589490b..7af823a 100644
--- a/drivers/net/wireless/ath/ath9k/mac.c
+++ b/drivers/net/wireless/ath/ath9k/mac.c
@@ -351,7 +351,7 @@ void ath9k_hw_set11n_txdesc(struct ath_hw *ah, struct ath_desc *ds,

ads->ds_ctl6 = SM(keyType, AR_EncrType);

- if (AR_SREV_9285(ah)) {
+ if (AR_SREV_9285(ah) || AR_SREV_9271(ah)) {
ads->ds_ctl8 = 0;
ads->ds_ctl9 = 0;
ads->ds_ctl10 = 0;
--
1.6.3.3


2010-03-16 00:38:59

by Luis Chamberlain

[permalink] [raw]
Subject: Re: [PATCH v3 00/12] ath9k_hw: complete support for AR9271

On Mon, Mar 15, 2010 at 05:09:04PM -0700, Luis R. Rodriguez wrote:
> On Mon, Mar 15, 2010 at 5:05 PM, Felix Fietkau <[email protected]> wrote:
> > On 2010-03-16 12:55 AM, Luis R. Rodriguez wrote:
> >> On Mon, Mar 15, 2010 at 4:52 PM, Felix Fietkau <[email protected]> wrote:
> >>> On 2010-03-16 12:49 AM, Luis R. Rodriguez wrote:
> >>>> diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
> >>>> index 00570fb..867cfaf 100644
> >>>> --- a/drivers/net/wireless/ath/ath9k/hw.c
> >>>> +++ b/drivers/net/wireless/ath/ath9k/hw.c
> >>>> @@ -807,6 +804,10 @@ void ath9k_hw_init_global_settings(struct ath_hw *ah)
> >>>> ? ? ? ? ? ? ? acktimeout += 64 - sifstime - ah->slottime;
> >>>>
> >>>> ? ? ? ath9k_hw_setslottime(ah, slottime);
> >>>> +
> >>>> + ? ? if (AR_SREV_9271(ah))
> >>>> + ? ? ? ? ? ? return;
> >>>> +
> >>>> ? ? ? ath9k_hw_set_ack_timeout(ah, acktimeout);
> >>>> ? ? ? ath9k_hw_set_cts_timeout(ah, acktimeout);
> >>>> ? ? ? if (ah->globaltxtimeout != (u32) -1)
> >>>
> >>> Why leave out the ACK/CTS timeout setting? How does the hw handle ACK
> >>> and CTS timeouts?
> >>
> >> Right, so that's why I originally removed this hunk completely, I was
> >> under the impression you latest fix would have addressed any issues
> >> but it does not, we get association time outs. I think we'll have to
> >> review this further in order to support coverage class.
> > Are you sure the slot time was set properly by the callback?
>
> Well ath9k_htc did not have it implemented, I just added the code for
> it, you know what.. I did not test modifying the ACK/CTS timeout *and*
> with the new slot time code I added to ath9k_htc, let me try that.

Hah, yeah that fixed this work around, it works fine with the below
patch, I went ahead and added the coverage class calllback while
at it.

John this means I don't have to resend this series out, we can just
skip patch #4, that's all. I'll do one more review with our team and
get back to you on a final ACK for this series.

Sujith, please review and consider integration of the below changes
on the ath9k_htc front.

Luis

diff --git a/drivers/net/wireless/ath/ath9k/htc_drv_main.c b/drivers/net/wireless/ath/ath9k/htc_drv_main.c
index 3b4c636..e501599 100644
--- a/drivers/net/wireless/ath/ath9k/htc_drv_main.c
+++ b/drivers/net/wireless/ath/ath9k/htc_drv_main.c
@@ -1438,6 +1438,14 @@ static void ath9k_htc_bss_info_changed(struct ieee80211_hw *hw,
ath9k_htc_beacon_config(priv, vif, bss_conf);
}

+ if (changed & BSS_CHANGED_ERP_SLOT) {
+ if (bss_conf->use_short_slot)
+ ah->slottime = 9;
+ else
+ ah->slottime = 20;
+ ath9k_hw_init_global_settings(ah);
+ }
+
if (changed & BSS_CHANGED_BEACON)
ath9k_htc_beacon_update(priv, vif);

@@ -1567,6 +1575,18 @@ static int ath9k_htc_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
return 0;
}

+static void ath9k_htc_set_coverage_class(struct ieee80211_hw *hw,
+ u8 coverage_class)
+{
+ struct ath9k_htc_priv *priv = hw->priv;
+ struct ath_hw *ah = priv->ah;
+
+ mutex_lock(&priv->mutex);
+ ah->coverage_class = coverage_class;
+ ath9k_hw_init_global_settings(ah);
+ mutex_unlock(&priv->mutex);
+}
+
struct ieee80211_ops ath9k_htc_ops = {
.tx = ath9k_htc_tx,
.start = ath9k_htc_start,
@@ -1587,4 +1607,5 @@ struct ieee80211_ops ath9k_htc_ops = {
.sw_scan_complete = ath9k_htc_sw_scan_complete,
.set_rts_threshold = ath9k_htc_set_rts_threshold,
.rfkill_poll = ath9k_htc_rfkill_poll_state,
+ .set_coverage_class = ath9k_htc_set_coverage_class,
};

2010-03-13 05:56:44

by Luis R. Rodriguez

[permalink] [raw]
Subject: Re: [PATCH v3 00/12] ath9k_hw: complete support for AR9271

On Fri, Mar 12, 2010 at 9:46 PM, Luis R. Rodriguez
<[email protected]> wrote:
>
> Sujith (12):
>  ath9k_hw: update initialization values for AR9271
>  ath9k_hw: add GPIO setup code for AR9271
>  ath9k_hw: skip chip tests for AR9271
>  ath9k_hw: fix RF analog setup for AR9271
>  ath9k_hw: fix TX descriptor setup for AR9271
>  ath9k_hw: Fix full sleep setup for AR9271
>  ath9k_hw: fix noisefloor history buffer usage on AR9271
>  ath9k_hw: restrict valid nf readings for AR9271 to -114
>  ath9k_hw: use the skip count for PA calibration on AR9271
>  ath9k_hw: always set the core clock for AR9271
>  ath9k_hw: add HTC init hardware call for special resets for AR9271
>  ath9k_hw: fix hardware deinit
>
>  drivers/net/wireless/ath/ath9k/calib.c    |   25 ++++--
>  drivers/net/wireless/ath/ath9k/hw.c       |  140 +++++++++++++++--------------
>  drivers/net/wireless/ath/ath9k/hw.h       |    8 ++
>  drivers/net/wireless/ath/ath9k/init.c     |    3 +
>  drivers/net/wireless/ath/ath9k/initvals.h |  141 +++++++++++++++++++++--------
>  drivers/net/wireless/ath/ath9k/mac.c      |    2 +-
>  drivers/net/wireless/ath/ath9k/phy.c      |    6 +-
>  drivers/net/wireless/ath/ath9k/reg.h      |    3 +
>  8 files changed, 209 insertions(+), 119 deletions(-)

You can find the trusty all-in-one git am'able file here, with the
older v2 ath9k_htc driver in case you want to help test or just yank
all these patches in one go:

http://bombadil.infradead.org/~mcgrof/tmp/ath9k-htc-v3.patch

sha1sum 5f7fc23d89e8e4b9b5df8f448f2c95425933b7cd

Luis

2010-03-13 05:46:58

by Luis R. Rodriguez

[permalink] [raw]
Subject: [PATCH v3 08/12] ath9k_hw: restrict valid nf readings for AR9271 to -114

From: Sujith <[email protected]>

Noisefloor values read on AR9271 are unreliable if they
are less than -114, set those statically to -116.

Signed-off-by: Sujith <[email protected]>
Signed-off-by: Vasanthakumar Thiagarajan <[email protected]>
Signed-off-by: Luis R. Rodriguez <[email protected]>
---
drivers/net/wireless/ath/ath9k/calib.c | 8 ++++++++
1 files changed, 8 insertions(+), 0 deletions(-)

diff --git a/drivers/net/wireless/ath/ath9k/calib.c b/drivers/net/wireless/ath/ath9k/calib.c
index 0c3e9c8..e76dd74 100644
--- a/drivers/net/wireless/ath/ath9k/calib.c
+++ b/drivers/net/wireless/ath/ath9k/calib.c
@@ -101,6 +101,10 @@ static void ath9k_hw_do_getnf(struct ath_hw *ah,
nf = 0 - ((nf ^ 0x1ff) + 1);
ath_print(common, ATH_DBG_CALIBRATE,
"NF calibrated [ctl] [chain 0] is %d\n", nf);
+
+ if (AR_SREV_9271(ah) && (nf >= -114))
+ nf = -116;
+
nfarray[0] = nf;

if (!AR_SREV_9285(ah) && !AR_SREV_9271(ah)) {
@@ -139,6 +143,10 @@ static void ath9k_hw_do_getnf(struct ath_hw *ah,
nf = 0 - ((nf ^ 0x1ff) + 1);
ath_print(common, ATH_DBG_CALIBRATE,
"NF calibrated [ext] [chain 0] is %d\n", nf);
+
+ if (AR_SREV_9271(ah) && (nf >= -114))
+ nf = -116;
+
nfarray[3] = nf;

if (!AR_SREV_9285(ah) && !AR_SREV_9271(ah)) {
--
1.6.3.3


2010-03-15 23:49:11

by Luis R. Rodriguez

[permalink] [raw]
Subject: Re: [PATCH v3 00/12] ath9k_hw: complete support for AR9271

On Mon, Mar 15, 2010 at 04:25:14PM -0700, Luis R. Rodriguez wrote:
> On Mon, Mar 15, 2010 at 2:43 PM, Luis R. Rodriguez
> <[email protected]> wrote:
> > On Fri, Mar 12, 2010 at 09:46:44PM -0800, Luis R. Rodriguez wrote:
> >> ? * I spotted a check added to bail out for tweaking the ACK/CTS
> >> ? ? time out values -- this check should no longer be required
> >> ? ? since Felix sent a proper fix for this recenlty. I removed that
> >> ? ? hunk:
> >>
> >> @@ -1210,6 +1195,9 @@ void ath9k_hw_init_global_settings(struct ath_hw *ah)
> >> ? ? ? ? ? ? ? REG_WRITE(ah, AR_PCU_MISC,
> >> ? ? ? ? ? ? ? ? ? ? ? ? REG_READ(ah, AR_PCU_MISC) | ah->misc_mode);
> >>
> >> + ? ? if (AR_SREV_9271(ah))
> >> + ? ? ? ? ? ? return;
> >> +
> >> ? ? ? if (conf->channel && conf->channel->band == IEEE80211_BAND_5GHZ)
> >> ? ? ? ? ? ? ? sifstime = 16;
> >> ? ? ? else
> >> --
> >
> > Turns out this hunk is required... but the rf changes are not (patch 4/12)
> > so I'll just respin and send a new series out.
> >
> > We should look for a better way to address this issue instead of the above hunk
> > otherwise we will be skipping all changes to the slot time from mac80211.
> > Right now ath9k_htc does not support this (BSS_CHANGED_ERP_SLOT) or a
> > set_coverage_class() callback.
>
> We'll need to support at least BSS_CHANGED_ERP_SLOT in case the AP
> switches to compatibility mode.

How about something like this:

diff --git a/drivers/net/wireless/ath/ath9k/htc_drv_main.c b/drivers/net/wireless/ath/ath9k/htc_drv_main.c
index 3b4c636..387eef9 100644
--- a/drivers/net/wireless/ath/ath9k/htc_drv_main.c
+++ b/drivers/net/wireless/ath/ath9k/htc_drv_main.c
@@ -1438,6 +1438,14 @@ static void ath9k_htc_bss_info_changed(struct ieee80211_hw *hw,
ath9k_htc_beacon_config(priv, vif, bss_conf);
}

+ if (changed & BSS_CHANGED_ERP_SLOT) {
+ if (bss_conf->use_short_slot)
+ ah->slottime = 9;
+ else
+ ah->slottime = 20;
+ ath9k_hw_init_global_settings(ah);
+ }
+
if (changed & BSS_CHANGED_BEACON)
ath9k_htc_beacon_update(priv, vif);

diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index 00570fb..867cfaf 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -784,9 +784,6 @@ void ath9k_hw_init_global_settings(struct ath_hw *ah)
REG_WRITE(ah, AR_PCU_MISC,
REG_READ(ah, AR_PCU_MISC) | ah->misc_mode);

- if (AR_SREV_9271(ah))
- return;
-
if (conf->channel && conf->channel->band == IEEE80211_BAND_5GHZ)
sifstime = 16;
else
@@ -807,6 +804,10 @@ void ath9k_hw_init_global_settings(struct ath_hw *ah)
acktimeout += 64 - sifstime - ah->slottime;

ath9k_hw_setslottime(ah, slottime);
+
+ if (AR_SREV_9271(ah))
+ return;
+
ath9k_hw_set_ack_timeout(ah, acktimeout);
ath9k_hw_set_cts_timeout(ah, acktimeout);
if (ah->globaltxtimeout != (u32) -1)

2010-03-13 05:46:58

by Luis R. Rodriguez

[permalink] [raw]
Subject: [PATCH v3 09/12] ath9k_hw: use the skip count for PA calibration on AR9271

From: Sujith <[email protected]>

Periodic power amplifier offset calibration is skipped on ath9k
algorithmically, this is required on AR9271.

Signed-off-by: Sujith <[email protected]>
Signed-off-by: Vasanthakumar Thiagarajan <[email protected]>
Signed-off-by: Luis R. Rodriguez <[email protected]>
---
drivers/net/wireless/ath/ath9k/calib.c | 9 ++++++---
1 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/net/wireless/ath/ath9k/calib.c b/drivers/net/wireless/ath/ath9k/calib.c
index e76dd74..d5026e4 100644
--- a/drivers/net/wireless/ath/ath9k/calib.c
+++ b/drivers/net/wireless/ath/ath9k/calib.c
@@ -1059,9 +1059,12 @@ bool ath9k_hw_calibrate(struct ath_hw *ah, struct ath9k_channel *chan,
/* Do NF cal only at longer intervals */
if (longcal) {
/* Do periodic PAOffset Cal */
- if (AR_SREV_9271(ah))
- ath9k_hw_9271_pa_cal(ah, false);
- else if (AR_SREV_9285_11_OR_LATER(ah)) {
+ if (AR_SREV_9271(ah)) {
+ if (!ah->pacal_info.skipcount)
+ ath9k_hw_9271_pa_cal(ah, false);
+ else
+ ah->pacal_info.skipcount--;
+ } else if (AR_SREV_9285_11_OR_LATER(ah)) {
if (!ah->pacal_info.skipcount)
ath9k_hw_9285_pa_cal(ah, false);
else
--
1.6.3.3


2010-03-13 05:46:58

by Luis R. Rodriguez

[permalink] [raw]
Subject: [PATCH v3 02/12] ath9k_hw: add GPIO setup code for AR9271

From: Sujith <[email protected]>

Assign the proper number of GPIO pins for AR9271.

Signed-off-by: Sujith <[email protected]>
Signed-off-by: Vasanthakumar Thiagarajan <[email protected]>
Signed-off-by: Luis R. Rodriguez <[email protected]>
---
drivers/net/wireless/ath/ath9k/hw.c | 11 +++++++++--
drivers/net/wireless/ath/ath9k/reg.h | 3 +++
2 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index 9de4603..7b1ba6f 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -3229,7 +3229,9 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
else
pCap->tx_triglevel_max = MAX_TX_FIFO_THRESHOLD;

- if (AR_SREV_9285_10_OR_LATER(ah))
+ if (AR_SREV_9271(ah))
+ pCap->num_gpio_pins = AR9271_NUM_GPIO;
+ else if (AR_SREV_9285_10_OR_LATER(ah))
pCap->num_gpio_pins = AR9285_NUM_GPIO;
else if (AR_SREV_9280_10_OR_LATER(ah))
pCap->num_gpio_pins = AR928X_NUM_GPIO;
@@ -3465,7 +3467,9 @@ u32 ath9k_hw_gpio_get(struct ath_hw *ah, u32 gpio)
if (gpio >= ah->caps.num_gpio_pins)
return 0xffffffff;

- if (AR_SREV_9287_10_OR_LATER(ah))
+ if (AR_SREV_9271(ah))
+ return MS_REG_READ(AR9271, gpio) != 0;
+ else if (AR_SREV_9287_10_OR_LATER(ah))
return MS_REG_READ(AR9287, gpio) != 0;
else if (AR_SREV_9285_10_OR_LATER(ah))
return MS_REG_READ(AR9285, gpio) != 0;
@@ -3494,6 +3498,9 @@ EXPORT_SYMBOL(ath9k_hw_cfg_output);

void ath9k_hw_set_gpio(struct ath_hw *ah, u32 gpio, u32 val)
{
+ if (AR_SREV_9271(ah))
+ val = ~val;
+
REG_RMW(ah, AR_GPIO_IN_OUT, ((val & 1) << gpio),
AR_GPIO_BIT(gpio));
}
diff --git a/drivers/net/wireless/ath/ath9k/reg.h b/drivers/net/wireless/ath/ath9k/reg.h
index 72cfa8e..198e41d 100644
--- a/drivers/net/wireless/ath/ath9k/reg.h
+++ b/drivers/net/wireless/ath/ath9k/reg.h
@@ -940,6 +940,7 @@ enum {
#define AR928X_NUM_GPIO 10
#define AR9285_NUM_GPIO 12
#define AR9287_NUM_GPIO 11
+#define AR9271_NUM_GPIO 16

#define AR_GPIO_IN_OUT 0x4048
#define AR_GPIO_IN_VAL 0x0FFFC000
@@ -950,6 +951,8 @@ enum {
#define AR9285_GPIO_IN_VAL_S 12
#define AR9287_GPIO_IN_VAL 0x003FF800
#define AR9287_GPIO_IN_VAL_S 11
+#define AR9271_GPIO_IN_VAL 0xFFFF0000
+#define AR9271_GPIO_IN_VAL_S 16

#define AR_GPIO_OE_OUT 0x404c
#define AR_GPIO_OE_OUT_DRV 0x3
--
1.6.3.3


2010-03-15 23:53:09

by Felix Fietkau

[permalink] [raw]
Subject: Re: [PATCH v3 00/12] ath9k_hw: complete support for AR9271

On 2010-03-16 12:49 AM, Luis R. Rodriguez wrote:
> diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
> index 00570fb..867cfaf 100644
> --- a/drivers/net/wireless/ath/ath9k/hw.c
> +++ b/drivers/net/wireless/ath/ath9k/hw.c
> @@ -807,6 +804,10 @@ void ath9k_hw_init_global_settings(struct ath_hw *ah)
> acktimeout += 64 - sifstime - ah->slottime;
>
> ath9k_hw_setslottime(ah, slottime);
> +
> + if (AR_SREV_9271(ah))
> + return;
> +
> ath9k_hw_set_ack_timeout(ah, acktimeout);
> ath9k_hw_set_cts_timeout(ah, acktimeout);
> if (ah->globaltxtimeout != (u32) -1)

Why leave out the ACK/CTS timeout setting? How does the hw handle ACK
and CTS timeouts?

- Felix

2010-03-16 03:02:39

by Sujith

[permalink] [raw]
Subject: Re: [PATCH v3 00/12] ath9k_hw: complete support for AR9271

Luis R. Rodriguez wrote:
> Hah, yeah that fixed this work around, it works fine with the below
> patch, I went ahead and added the coverage class calllback while
> at it.
>
> John this means I don't have to resend this series out, we can just
> skip patch #4, that's all. I'll do one more review with our team and
> get back to you on a final ACK for this series.
>
> Sujith, please review and consider integration of the below changes
> on the ath9k_htc front.

Integrate where ? I have no idea what is happening.
Too many patch series floating around ..

Sujith

2010-03-15 23:52:15

by Luis R. Rodriguez

[permalink] [raw]
Subject: Re: [PATCH v3 00/12] ath9k_hw: complete support for AR9271

On Mon, Mar 15, 2010 at 4:49 PM, Luis R. Rodriguez
<[email protected]> wrote:
> On Mon, Mar 15, 2010 at 04:25:14PM -0700, Luis R. Rodriguez wrote:
>> On Mon, Mar 15, 2010 at 2:43 PM, Luis R. Rodriguez
>> <[email protected]> wrote:
>> > On Fri, Mar 12, 2010 at 09:46:44PM -0800, Luis R. Rodriguez wrote:
>> >>   * I spotted a check added to bail out for tweaking the ACK/CTS
>> >>     time out values -- this check should no longer be required
>> >>     since Felix sent a proper fix for this recenlty. I removed that
>> >>     hunk:
>> >>
>> >> @@ -1210,6 +1195,9 @@ void ath9k_hw_init_global_settings(struct ath_hw *ah)
>> >>               REG_WRITE(ah, AR_PCU_MISC,
>> >>                         REG_READ(ah, AR_PCU_MISC) | ah->misc_mode);
>> >>
>> >> +     if (AR_SREV_9271(ah))
>> >> +             return;
>> >> +
>> >>       if (conf->channel && conf->channel->band == IEEE80211_BAND_5GHZ)
>> >>               sifstime = 16;
>> >>       else
>> >> --
>> >
>> > Turns out this hunk is required... but the rf changes are not (patch 4/12)
>> > so I'll just respin and send a new series out.
>> >
>> > We should look for a better way to address this issue instead of the above hunk
>> > otherwise we will be skipping all changes to the slot time from mac80211.
>> > Right now ath9k_htc does not support this (BSS_CHANGED_ERP_SLOT) or a
>> > set_coverage_class() callback.
>>
>> We'll need to support at least BSS_CHANGED_ERP_SLOT in case the AP
>> switches to compatibility mode.
>
> How about something like this:
>
> diff --git a/drivers/net/wireless/ath/ath9k/htc_drv_main.c b/drivers/net/wireless/ath/ath9k/htc_drv_main.c
> index 3b4c636..387eef9 100644
> --- a/drivers/net/wireless/ath/ath9k/htc_drv_main.c
> +++ b/drivers/net/wireless/ath/ath9k/htc_drv_main.c
> @@ -1438,6 +1438,14 @@ static void ath9k_htc_bss_info_changed(struct ieee80211_hw *hw,
>                ath9k_htc_beacon_config(priv, vif, bss_conf);
>        }
>
> +       if (changed & BSS_CHANGED_ERP_SLOT) {
> +               if (bss_conf->use_short_slot)
> +                       ah->slottime = 9;
> +               else
> +                       ah->slottime = 20;
> +               ath9k_hw_init_global_settings(ah);
> +       }
> +
>        if (changed & BSS_CHANGED_BEACON)
>                ath9k_htc_beacon_update(priv, vif);
>
> diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
> index 00570fb..867cfaf 100644
> --- a/drivers/net/wireless/ath/ath9k/hw.c
> +++ b/drivers/net/wireless/ath/ath9k/hw.c
> @@ -784,9 +784,6 @@ void ath9k_hw_init_global_settings(struct ath_hw *ah)
>                REG_WRITE(ah, AR_PCU_MISC,
>                          REG_READ(ah, AR_PCU_MISC) | ah->misc_mode);
>
> -       if (AR_SREV_9271(ah))
> -               return;
> -
>        if (conf->channel && conf->channel->band == IEEE80211_BAND_5GHZ)
>                sifstime = 16;
>        else
> @@ -807,6 +804,10 @@ void ath9k_hw_init_global_settings(struct ath_hw *ah)
>                acktimeout += 64 - sifstime - ah->slottime;
>
>        ath9k_hw_setslottime(ah, slottime);
> +
> +       if (AR_SREV_9271(ah))
> +               return;
> +
>        ath9k_hw_set_ack_timeout(ah, acktimeout);
>        ath9k_hw_set_cts_timeout(ah, acktimeout);
>        if (ah->globaltxtimeout != (u32) -1)

Works for me with ar9271, will send with this new change for the
hardware changes, please review and consider integration on the
ath9k_htc driver side of things.

Luis

2010-03-13 06:05:18

by Luis R. Rodriguez

[permalink] [raw]
Subject: Re: [PATCH v3 04/12] ath9k_hw: fix RF analog setup for AR9271

On Fri, Mar 12, 2010 at 09:46:48PM -0800, Luis R. Rodriguez wrote:
> From: Sujith <[email protected]>
>
> AR9271 is a single chip and as such does not have external radios.
> Devices with external radio require additional programming, skip
> this for AR9271 as we do for other single chips.
>
> Signed-off-by: Sujith <[email protected]>
> Signed-off-by: Vasanthakumar Thiagarajan <[email protected]>
> Signed-off-by: Luis R. Rodriguez <[email protected]>
> ---
> drivers/net/wireless/ath/ath9k/hw.c | 6 +++---
> drivers/net/wireless/ath/ath9k/phy.c | 6 +++---
> 2 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
> index b1a4a83..a0ef990 100644
> --- a/drivers/net/wireless/ath/ath9k/hw.c
> +++ b/drivers/net/wireless/ath/ath9k/hw.c
> @@ -517,7 +517,7 @@ static int ath9k_hw_post_init(struct ath_hw *ah)
> ah->eep_ops->get_eeprom_ver(ah),
> ah->eep_ops->get_eeprom_rev(ah));
>
> - if (!AR_SREV_9280_10_OR_LATER(ah)) {
> + if (!AR_SREV_9280_10_OR_LATER(ah) && !AR_SREV_9271(ah)) {
> ecode = ath9k_hw_rf_alloc_ext_banks(ah);
> if (ecode) {
> ath_print(ath9k_hw_common(ah), ATH_DBG_FATAL,
> @@ -917,7 +917,7 @@ int ath9k_hw_init(struct ath_hw *ah)
> ath9k_hw_init_cal_settings(ah);
>
> ah->ani_function = ATH9K_ANI_ALL;
> - if (AR_SREV_9280_10_OR_LATER(ah)) {
> + if (AR_SREV_9280_10_OR_LATER(ah) || AR_SREV_9271(ah)) {
> ah->ani_function &= ~ATH9K_ANI_NOISE_IMMUNITY_LEVEL;
> ah->ath9k_hw_rf_set_freq = &ath9k_hw_ar9280_set_channel;
> ah->ath9k_hw_spur_mitigate_freq = &ath9k_hw_9280_spur_mitigate;
> @@ -1266,7 +1266,7 @@ void ath9k_hw_deinit(struct ath_hw *ah)
> ath9k_hw_setpower(ah, ATH9K_PM_FULL_SLEEP);
>
> free_hw:
> - if (!AR_SREV_9280_10_OR_LATER(ah))
> + if (!AR_SREV_9280_10_OR_LATER(ah) && !AR_SREV_9271(ah))
> ath9k_hw_rf_free_ext_banks(ah);
> kfree(ah);
> ah = NULL;
> diff --git a/drivers/net/wireless/ath/ath9k/phy.c b/drivers/net/wireless/ath/ath9k/phy.c
> index c3b5939..b761330 100644
> --- a/drivers/net/wireless/ath/ath9k/phy.c
> +++ b/drivers/net/wireless/ath/ath9k/phy.c
> @@ -839,7 +839,7 @@ int ath9k_hw_rf_alloc_ext_banks(struct ath_hw *ah)
>
> struct ath_common *common = ath9k_hw_common(ah);
>
> - BUG_ON(AR_SREV_9280_10_OR_LATER(ah));
> + BUG_ON(AR_SREV_9280_10_OR_LATER(ah) || AR_SREV_9271(ah));
>
> ATH_ALLOC_BANK(ah->analogBank0Data, ah->iniBank0.ia_rows);
> ATH_ALLOC_BANK(ah->analogBank1Data, ah->iniBank1.ia_rows);
> @@ -870,7 +870,7 @@ ath9k_hw_rf_free_ext_banks(struct ath_hw *ah)
> bank = NULL; \
> } while (0);
>
> - BUG_ON(AR_SREV_9280_10_OR_LATER(ah));
> + BUG_ON(AR_SREV_9280_10_OR_LATER(ah) || AR_SREV_9271(ah));
>
> ATH_FREE_BANK(ah->analogBank0Data);
> ATH_FREE_BANK(ah->analogBank1Data);
> @@ -910,7 +910,7 @@ bool ath9k_hw_set_rf_regs(struct ath_hw *ah, struct ath9k_channel *chan,
> * for single chip devices, that is AR9280 or anything
> * after that.
> */
> - if (AR_SREV_9280_10_OR_LATER(ah))
> + if (AR_SREV_9280_10_OR_LATER(ah) || AR_SREV_9271(ah))
> return true;
>
> /* Setup rf parameters */
> --

Hah actually now that I think about it, I bet the driver works just
fine without this patch, its the same reason why AR_SREV_9280_10_OR_LATER(ah)
adds AR9271... please test without this patch. This should be one less
code change.

When I reviewed the phy stuff last I meant to add an alias to
AR_SREV_9280_10_OR_LATER() as "AR_SREV_SINGLE_CHIP(ah)" in hopes
that it clarifies this code entry is usually meant for that,
and then remove all the useless double checks spread all over
the HAL.

Luis

2010-03-15 23:55:22

by Luis R. Rodriguez

[permalink] [raw]
Subject: Re: [PATCH v3 00/12] ath9k_hw: complete support for AR9271

On Mon, Mar 15, 2010 at 4:52 PM, Felix Fietkau <[email protected]> wrote:
> On 2010-03-16 12:49 AM, Luis R. Rodriguez wrote:
>> diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
>> index 00570fb..867cfaf 100644
>> --- a/drivers/net/wireless/ath/ath9k/hw.c
>> +++ b/drivers/net/wireless/ath/ath9k/hw.c
>> @@ -807,6 +804,10 @@ void ath9k_hw_init_global_settings(struct ath_hw *ah)
>>               acktimeout += 64 - sifstime - ah->slottime;
>>
>>       ath9k_hw_setslottime(ah, slottime);
>> +
>> +     if (AR_SREV_9271(ah))
>> +             return;
>> +
>>       ath9k_hw_set_ack_timeout(ah, acktimeout);
>>       ath9k_hw_set_cts_timeout(ah, acktimeout);
>>       if (ah->globaltxtimeout != (u32) -1)
>
> Why leave out the ACK/CTS timeout setting? How does the hw handle ACK
> and CTS timeouts?

Right, so that's why I originally removed this hunk completely, I was
under the impression you latest fix would have addressed any issues
but it does not, we get association time outs. I think we'll have to
review this further in order to support coverage class.

Luis

2010-03-16 00:05:24

by Felix Fietkau

[permalink] [raw]
Subject: Re: [PATCH v3 00/12] ath9k_hw: complete support for AR9271

On 2010-03-16 12:55 AM, Luis R. Rodriguez wrote:
> On Mon, Mar 15, 2010 at 4:52 PM, Felix Fietkau <[email protected]> wrote:
>> On 2010-03-16 12:49 AM, Luis R. Rodriguez wrote:
>>> diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
>>> index 00570fb..867cfaf 100644
>>> --- a/drivers/net/wireless/ath/ath9k/hw.c
>>> +++ b/drivers/net/wireless/ath/ath9k/hw.c
>>> @@ -807,6 +804,10 @@ void ath9k_hw_init_global_settings(struct ath_hw *ah)
>>> acktimeout += 64 - sifstime - ah->slottime;
>>>
>>> ath9k_hw_setslottime(ah, slottime);
>>> +
>>> + if (AR_SREV_9271(ah))
>>> + return;
>>> +
>>> ath9k_hw_set_ack_timeout(ah, acktimeout);
>>> ath9k_hw_set_cts_timeout(ah, acktimeout);
>>> if (ah->globaltxtimeout != (u32) -1)
>>
>> Why leave out the ACK/CTS timeout setting? How does the hw handle ACK
>> and CTS timeouts?
>
> Right, so that's why I originally removed this hunk completely, I was
> under the impression you latest fix would have addressed any issues
> but it does not, we get association time outs. I think we'll have to
> review this further in order to support coverage class.
Are you sure the slot time was set properly by the callback? Can you
print out the values that it's setting? The initvals for 9271 don't
really look all that different.

- Felix

2010-03-13 05:47:03

by Luis R. Rodriguez

[permalink] [raw]
Subject: [PATCH v3 11/12] ath9k_hw: add HTC init hardware call for special resets for AR9271

From: Sujith <[email protected]>

AR9271 needs a full reset only upon the first reset, add
a call for the driver to enable these special resets. We
can optimize this out later without an export.

Signed-off-by: Sujith <[email protected]>
Signed-off-by: Vasanthakumar Thiagarajan <[email protected]>
Signed-off-by: Luis R. Rodriguez <[email protected]>
---
drivers/net/wireless/ath/ath9k/hw.c | 12 ++++++++++++
drivers/net/wireless/ath/ath9k/hw.h | 3 +++
2 files changed, 15 insertions(+), 0 deletions(-)

diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index 0b1737f..0670d98 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -1951,6 +1951,7 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,

ath9k_hw_mark_phy_inactive(ah);

+ /* Only required on the first reset */
if (AR_SREV_9271(ah) && ah->htc_reset_init) {
REG_WRITE(ah,
AR9271_RESET_POWER_DOWN_CONTROL,
@@ -1963,6 +1964,7 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
return -EINVAL;
}

+ /* Only required on the first reset */
if (AR_SREV_9271(ah) && ah->htc_reset_init) {
ah->htc_reset_init = false;
REG_WRITE(ah,
@@ -3857,6 +3859,16 @@ void ath_gen_timer_isr(struct ath_hw *ah)
}
EXPORT_SYMBOL(ath_gen_timer_isr);

+/********/
+/* HTC */
+/********/
+
+void ath9k_hw_htc_resetinit(struct ath_hw *ah)
+{
+ ah->htc_reset_init = true;
+}
+EXPORT_SYMBOL(ath9k_hw_htc_resetinit);
+
static struct {
u32 version;
const char * name;
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
index e63edfb..6b03e16 100644
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -707,6 +707,9 @@ u32 ath9k_hw_gettsf32(struct ath_hw *ah);

void ath9k_hw_name(struct ath_hw *ah, char *hw_name, size_t len);

+/* HTC */
+void ath9k_hw_htc_resetinit(struct ath_hw *ah);
+
#define ATH_PCIE_CAP_LINK_CTRL 0x70
#define ATH_PCIE_CAP_LINK_L0S 1
#define ATH_PCIE_CAP_LINK_L1 2
--
1.6.3.3


2010-03-15 23:25:36

by Luis R. Rodriguez

[permalink] [raw]
Subject: Re: [PATCH v3 00/12] ath9k_hw: complete support for AR9271

On Mon, Mar 15, 2010 at 2:43 PM, Luis R. Rodriguez
<[email protected]> wrote:
> On Fri, Mar 12, 2010 at 09:46:44PM -0800, Luis R. Rodriguez wrote:
>>   * I spotted a check added to bail out for tweaking the ACK/CTS
>>     time out values -- this check should no longer be required
>>     since Felix sent a proper fix for this recenlty. I removed that
>>     hunk:
>>
>> @@ -1210,6 +1195,9 @@ void ath9k_hw_init_global_settings(struct ath_hw *ah)
>>               REG_WRITE(ah, AR_PCU_MISC,
>>                         REG_READ(ah, AR_PCU_MISC) | ah->misc_mode);
>>
>> +     if (AR_SREV_9271(ah))
>> +             return;
>> +
>>       if (conf->channel && conf->channel->band == IEEE80211_BAND_5GHZ)
>>               sifstime = 16;
>>       else
>> --
>
> Turns out this hunk is required... but the rf changes are not (patch 4/12)
> so I'll just respin and send a new series out.
>
> We should look for a better way to address this issue instead of the above hunk
> otherwise we will be skipping all changes to the slot time from mac80211.
> Right now ath9k_htc does not support this (BSS_CHANGED_ERP_SLOT) or a
> set_coverage_class() callback.

We'll need to support at least BSS_CHANGED_ERP_SLOT in case the AP
switches to compatibility mode.

Luis

2010-03-15 21:43:40

by Luis R. Rodriguez

[permalink] [raw]
Subject: Re: [PATCH v3 00/12] ath9k_hw: complete support for AR9271

On Fri, Mar 12, 2010 at 09:46:44PM -0800, Luis R. Rodriguez wrote:
> * I spotted a check added to bail out for tweaking the ACK/CTS
> time out values -- this check should no longer be required
> since Felix sent a proper fix for this recenlty. I removed that
> hunk:
>
> @@ -1210,6 +1195,9 @@ void ath9k_hw_init_global_settings(struct ath_hw *ah)
> REG_WRITE(ah, AR_PCU_MISC,
> REG_READ(ah, AR_PCU_MISC) | ah->misc_mode);
>
> + if (AR_SREV_9271(ah))
> + return;
> +
> if (conf->channel && conf->channel->band == IEEE80211_BAND_5GHZ)
> sifstime = 16;
> else
> --

Turns out this hunk is required... but the rf changes are not (patch 4/12)
so I'll just respin and send a new series out.

We should look for a better way to address this issue instead of the above hunk
otherwise we will be skipping all changes to the slot time from mac80211.
Right now ath9k_htc does not support this (BSS_CHANGED_ERP_SLOT) or a
set_coverage_class() callback.

Luis

2010-03-13 05:46:58

by Luis R. Rodriguez

[permalink] [raw]
Subject: [PATCH v3 06/12] ath9k_hw: Fix full sleep setup for AR9271

From: Sujith <[email protected]>

After telling the AR9271 to go into full sleep we do not need
to clear the RTC reset signal.

Signed-off-by: Sujith <[email protected]>
Signed-off-by: Vasanthakumar Thiagarajan <[email protected]>
Signed-off-by: Luis R. Rodriguez <[email protected]>
---
drivers/net/wireless/ath/ath9k/hw.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index a0ef990..20392cf 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -2453,7 +2453,7 @@ static void ath9k_set_power_sleep(struct ath_hw *ah, int setChip)
if (!AR_SREV_9100(ah))
REG_WRITE(ah, AR_RC, AR_RC_AHB | AR_RC_HOSTIF);

- if(!AR_SREV_5416(ah))
+ if (!AR_SREV_5416(ah) && !AR_SREV_9271(ah))
REG_CLR_BIT(ah, (AR_RTC_RESET),
AR_RTC_RESET_EN);
}
--
1.6.3.3


2010-03-15 21:35:30

by Luis R. Rodriguez

[permalink] [raw]
Subject: Re: [PATCH v3 04/12] ath9k_hw: fix RF analog setup for AR9271

On Fri, Mar 12, 2010 at 10:05:16PM -0800, Luis Rodriguez wrote:
> On Fri, Mar 12, 2010 at 09:46:48PM -0800, Luis R. Rodriguez wrote:
> > From: Sujith <[email protected]>
> >
> > AR9271 is a single chip and as such does not have external radios.
> > Devices with external radio require additional programming, skip
> > this for AR9271 as we do for other single chips.
> >
> > Signed-off-by: Sujith <[email protected]>
> > Signed-off-by: Vasanthakumar Thiagarajan <[email protected]>
> > Signed-off-by: Luis R. Rodriguez <[email protected]>
> > ---
> > drivers/net/wireless/ath/ath9k/hw.c | 6 +++---
> > drivers/net/wireless/ath/ath9k/phy.c | 6 +++---
> > 2 files changed, 6 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
> > index b1a4a83..a0ef990 100644
> > --- a/drivers/net/wireless/ath/ath9k/hw.c
> > +++ b/drivers/net/wireless/ath/ath9k/hw.c
> > @@ -517,7 +517,7 @@ static int ath9k_hw_post_init(struct ath_hw *ah)
> > ah->eep_ops->get_eeprom_ver(ah),
> > ah->eep_ops->get_eeprom_rev(ah));
> >
> > - if (!AR_SREV_9280_10_OR_LATER(ah)) {
> > + if (!AR_SREV_9280_10_OR_LATER(ah) && !AR_SREV_9271(ah)) {
> > ecode = ath9k_hw_rf_alloc_ext_banks(ah);
> > if (ecode) {
> > ath_print(ath9k_hw_common(ah), ATH_DBG_FATAL,
> > @@ -917,7 +917,7 @@ int ath9k_hw_init(struct ath_hw *ah)
> > ath9k_hw_init_cal_settings(ah);
> >
> > ah->ani_function = ATH9K_ANI_ALL;
> > - if (AR_SREV_9280_10_OR_LATER(ah)) {
> > + if (AR_SREV_9280_10_OR_LATER(ah) || AR_SREV_9271(ah)) {
> > ah->ani_function &= ~ATH9K_ANI_NOISE_IMMUNITY_LEVEL;
> > ah->ath9k_hw_rf_set_freq = &ath9k_hw_ar9280_set_channel;
> > ah->ath9k_hw_spur_mitigate_freq = &ath9k_hw_9280_spur_mitigate;
> > @@ -1266,7 +1266,7 @@ void ath9k_hw_deinit(struct ath_hw *ah)
> > ath9k_hw_setpower(ah, ATH9K_PM_FULL_SLEEP);
> >
> > free_hw:
> > - if (!AR_SREV_9280_10_OR_LATER(ah))
> > + if (!AR_SREV_9280_10_OR_LATER(ah) && !AR_SREV_9271(ah))
> > ath9k_hw_rf_free_ext_banks(ah);
> > kfree(ah);
> > ah = NULL;
> > diff --git a/drivers/net/wireless/ath/ath9k/phy.c b/drivers/net/wireless/ath/ath9k/phy.c
> > index c3b5939..b761330 100644
> > --- a/drivers/net/wireless/ath/ath9k/phy.c
> > +++ b/drivers/net/wireless/ath/ath9k/phy.c
> > @@ -839,7 +839,7 @@ int ath9k_hw_rf_alloc_ext_banks(struct ath_hw *ah)
> >
> > struct ath_common *common = ath9k_hw_common(ah);
> >
> > - BUG_ON(AR_SREV_9280_10_OR_LATER(ah));
> > + BUG_ON(AR_SREV_9280_10_OR_LATER(ah) || AR_SREV_9271(ah));
> >
> > ATH_ALLOC_BANK(ah->analogBank0Data, ah->iniBank0.ia_rows);
> > ATH_ALLOC_BANK(ah->analogBank1Data, ah->iniBank1.ia_rows);
> > @@ -870,7 +870,7 @@ ath9k_hw_rf_free_ext_banks(struct ath_hw *ah)
> > bank = NULL; \
> > } while (0);
> >
> > - BUG_ON(AR_SREV_9280_10_OR_LATER(ah));
> > + BUG_ON(AR_SREV_9280_10_OR_LATER(ah) || AR_SREV_9271(ah));
> >
> > ATH_FREE_BANK(ah->analogBank0Data);
> > ATH_FREE_BANK(ah->analogBank1Data);
> > @@ -910,7 +910,7 @@ bool ath9k_hw_set_rf_regs(struct ath_hw *ah, struct ath9k_channel *chan,
> > * for single chip devices, that is AR9280 or anything
> > * after that.
> > */
> > - if (AR_SREV_9280_10_OR_LATER(ah))
> > + if (AR_SREV_9280_10_OR_LATER(ah) || AR_SREV_9271(ah))
> > return true;
> >
> > /* Setup rf parameters */
> > --
>
> Hah actually now that I think about it, I bet the driver works just
> fine without this patch, its the same reason why AR_SREV_9280_10_OR_LATER(ah)
> adds AR9271... please test without this patch. This should be one less
> code change.
>
> When I reviewed the phy stuff last I meant to add an alias to
> AR_SREV_9280_10_OR_LATER() as "AR_SREV_SINGLE_CHIP(ah)" in hopes
> that it clarifies this code entry is usually meant for that,
> and then remove all the useless double checks spread all over
> the HAL.

Indeed, this is not needed.

Luis

2010-03-13 05:46:58

by Luis R. Rodriguez

[permalink] [raw]
Subject: [PATCH v3 03/12] ath9k_hw: skip chip tests for AR9271

From: Sujith <[email protected]>

The chip test is not required for AR9271 on the host driver
code as the firmware will do the test internally on its own.

Signed-off-by: Sujith <[email protected]>
Signed-off-by: Vasanthakumar Thiagarajan <[email protected]>
Signed-off-by: Luis R. Rodriguez <[email protected]>
---
drivers/net/wireless/ath/ath9k/hw.c | 6 ++++--
1 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index 7b1ba6f..b1a4a83 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -499,8 +499,10 @@ static int ath9k_hw_post_init(struct ath_hw *ah)
{
int ecode;

- if (!ath9k_hw_chip_test(ah))
- return -ENODEV;
+ if (!AR_SREV_9271(ah)) {
+ if (!ath9k_hw_chip_test(ah))
+ return -ENODEV;
+ }

ecode = ath9k_hw_rf_claim(ah);
if (ecode != 0)
--
1.6.3.3


2010-03-13 05:46:58

by Luis R. Rodriguez

[permalink] [raw]
Subject: [PATCH v3 01/12] ath9k_hw: update initialization values for AR9271

From: Sujith <[email protected]>

Update the register initialization values for AR9271.
This is based on our last review from our systems team.

Signed-off-by: Sujith <[email protected]>
Signed-off-by: Vasanthakumar Thiagarajan <[email protected]>
Signed-off-by: Luis R. Rodriguez <[email protected]>
---
drivers/net/wireless/ath/ath9k/hw.c | 65 ++++++++------
drivers/net/wireless/ath/ath9k/hw.h | 5 +
drivers/net/wireless/ath/ath9k/initvals.h | 141 +++++++++++++++++++++--------
3 files changed, 146 insertions(+), 65 deletions(-)

diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index 1fb14ed..9de4603 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -603,9 +603,23 @@ static void ath9k_hw_init_mode_regs(struct ath_hw *ah)
ARRAY_SIZE(ar9271Modes_9271), 6);
INIT_INI_ARRAY(&ah->iniCommon, ar9271Common_9271,
ARRAY_SIZE(ar9271Common_9271), 2);
+ INIT_INI_ARRAY(&ah->iniCommon_normal_cck_fir_coeff_9271,
+ ar9271Common_normal_cck_fir_coeff_9271,
+ ARRAY_SIZE(ar9271Common_normal_cck_fir_coeff_9271), 2);
+ INIT_INI_ARRAY(&ah->iniCommon_japan_2484_cck_fir_coeff_9271,
+ ar9271Common_japan_2484_cck_fir_coeff_9271,
+ ARRAY_SIZE(ar9271Common_japan_2484_cck_fir_coeff_9271), 2);
INIT_INI_ARRAY(&ah->iniModes_9271_1_0_only,
ar9271Modes_9271_1_0_only,
ARRAY_SIZE(ar9271Modes_9271_1_0_only), 6);
+ INIT_INI_ARRAY(&ah->iniModes_9271_ANI_reg, ar9271Modes_9271_ANI_reg,
+ ARRAY_SIZE(ar9271Modes_9271_ANI_reg), 6);
+ INIT_INI_ARRAY(&ah->iniModes_high_power_tx_gain_9271,
+ ar9271Modes_high_power_tx_gain_9271,
+ ARRAY_SIZE(ar9271Modes_high_power_tx_gain_9271), 6);
+ INIT_INI_ARRAY(&ah->iniModes_normal_power_tx_gain_9271,
+ ar9271Modes_normal_power_tx_gain_9271,
+ ARRAY_SIZE(ar9271Modes_normal_power_tx_gain_9271), 6);
return;
}

@@ -1266,26 +1280,6 @@ static void ath9k_hw_override_ini(struct ath_hw *ah,
{
u32 val;

- if (AR_SREV_9271(ah)) {
- /*
- * Enable spectral scan to solution for issues with stuck
- * beacons on AR9271 1.0. The beacon stuck issue is not seeon on
- * AR9271 1.1
- */
- if (AR_SREV_9271_10(ah)) {
- val = REG_READ(ah, AR_PHY_SPECTRAL_SCAN) |
- AR_PHY_SPECTRAL_SCAN_ENABLE;
- REG_WRITE(ah, AR_PHY_SPECTRAL_SCAN, val);
- }
- else if (AR_SREV_9271_11(ah))
- /*
- * change AR_PHY_RF_CTL3 setting to fix MAC issue
- * present on AR9271 1.1
- */
- REG_WRITE(ah, AR_PHY_RF_CTL3, 0x3a020001);
- return;
- }
-
/*
* Set the RX_ABORT and RX_DIS and clear if off only after
* RXE is set for MAC. This prevents frames with corrupted
@@ -1294,8 +1288,10 @@ static void ath9k_hw_override_ini(struct ath_hw *ah,
REG_SET_BIT(ah, AR_DIAG_SW, (AR_DIAG_RX_DIS | AR_DIAG_RX_ABORT));

if (AR_SREV_9280_10_OR_LATER(ah)) {
- val = REG_READ(ah, AR_PCU_MISC_MODE2) &
- (~AR_PCU_MISC_MODE2_HWWAR1);
+ val = REG_READ(ah, AR_PCU_MISC_MODE2);
+
+ if (!AR_SREV_9271(ah))
+ val &= ~AR_PCU_MISC_MODE2_HWWAR1;

if (AR_SREV_9287_10_OR_LATER(ah))
val = val & (~AR_PCU_MISC_MODE2_HWWAR2);
@@ -1439,7 +1435,10 @@ static int ath9k_hw_process_ini(struct ath_hw *ah,
return -EINVAL;
}

+ /* Set correct baseband to analog shift setting to access analog chips */
REG_WRITE(ah, AR_PHY(0), 0x00000007);
+
+ /* Write ADDAC shifts */
REG_WRITE(ah, AR_PHY_ADC_SERIAL_CTL, AR_PHY_SEL_EXTERNAL_RADIO);
ah->eep_ops->set_addac(ah, chan);

@@ -1451,9 +1450,11 @@ static int ath9k_hw_process_ini(struct ath_hw *ah,
sizeof(u32) * ah->iniAddac.ia_rows *
ah->iniAddac.ia_columns;

+ /* For AR5416 2.0/2.1 */
memcpy(ah->addac5416_21,
ah->iniAddac.ia_array, addacSize);

+ /* override CLKDRV value at [row, column] = [31, 1] */
(ah->addac5416_21)[31 * ah->iniAddac.ia_columns + 1] = 0;

temp.ia_array = ah->addac5416_21;
@@ -1485,6 +1486,11 @@ static int ath9k_hw_process_ini(struct ath_hw *ah,
AR_SREV_9287_10_OR_LATER(ah))
REG_WRITE_ARRAY(&ah->iniModesTxGain, modesIndex, regWrites);

+ if (AR_SREV_9271_10(ah))
+ REG_WRITE_ARRAY(&ah->iniModes_9271_1_0_only,
+ modesIndex, regWrites);
+
+ /* Write common array parameters */
for (i = 0; i < ah->iniCommon.ia_rows; i++) {
u32 reg = INI_RA(&ah->iniCommon, i, 0);
u32 val = INI_RA(&ah->iniCommon, i, 1);
@@ -1499,11 +1505,16 @@ static int ath9k_hw_process_ini(struct ath_hw *ah,
DO_DELAY(regWrites);
}

- ath9k_hw_write_regs(ah, freqIndex, regWrites);
+ if (AR_SREV_9271(ah)) {
+ if (ah->eep_ops->get_eeprom(ah, EEP_TXGAIN_TYPE) == 1)
+ REG_WRITE_ARRAY(&ah->iniModes_high_power_tx_gain_9271,
+ modesIndex, regWrites);
+ else
+ REG_WRITE_ARRAY(&ah->iniModes_normal_power_tx_gain_9271,
+ modesIndex, regWrites);
+ }

- if (AR_SREV_9271_10(ah))
- REG_WRITE_ARRAY(&ah->iniModes_9271_1_0_only,
- modesIndex, regWrites);
+ ath9k_hw_write_regs(ah, freqIndex, regWrites);

if (AR_SREV_9280_20(ah) && IS_CHAN_A_5MHZ_SPACED(chan)) {
REG_WRITE_ARRAY(&ah->iniModesAdditional, modesIndex,
@@ -1517,6 +1528,7 @@ static int ath9k_hw_process_ini(struct ath_hw *ah,
if (OLC_FOR_AR9280_20_LATER)
ath9k_olc_init(ah);

+ /* Set TX power */
ah->eep_ops->set_txpower(ah, chan,
ath9k_regd_get_ctl(regulatory, chan),
channel->max_antenna_gain * 2,
@@ -1524,6 +1536,7 @@ static int ath9k_hw_process_ini(struct ath_hw *ah,
min((u32) MAX_RATE_POWER,
(u32) regulatory->power_limit));

+ /* Write analog registers */
if (!ath9k_hw_set_rf_regs(ah, chan, freqIndex)) {
ath_print(ath9k_hw_common(ah), ATH_DBG_FATAL,
"ar5416SetRfRegs failed\n");
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
index 20d9026..e63edfb 100644
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -599,6 +599,11 @@ struct ath_hw {
struct ar5416IniArray iniModes_9271_1_0_only;
struct ar5416IniArray iniCckfirNormal;
struct ar5416IniArray iniCckfirJapan2484;
+ struct ar5416IniArray iniCommon_normal_cck_fir_coeff_9271;
+ struct ar5416IniArray iniCommon_japan_2484_cck_fir_coeff_9271;
+ struct ar5416IniArray iniModes_9271_ANI_reg;
+ struct ar5416IniArray iniModes_high_power_tx_gain_9271;
+ struct ar5416IniArray iniModes_normal_power_tx_gain_9271;

u32 intr_gen_timer_trigger;
u32 intr_gen_timer_thresh;
diff --git a/drivers/net/wireless/ath/ath9k/initvals.h b/drivers/net/wireless/ath/ath9k/initvals.h
index 8a3bf3a..177bdeb 100644
--- a/drivers/net/wireless/ath/ath9k/initvals.h
+++ b/drivers/net/wireless/ath/ath9k/initvals.h
@@ -6441,7 +6441,7 @@ static const u_int32_t ar9271Modes_9271[][6] = {
{ 0x00009a44, 0x00000000, 0x00000000, 0x000581a8, 0x000581a8, 0x00000000 },
{ 0x00009a48, 0x00000000, 0x00000000, 0x00058284, 0x00058284, 0x00000000 },
{ 0x00009a4c, 0x00000000, 0x00000000, 0x00058288, 0x00058288, 0x00000000 },
- { 0x00009a50, 0x00000000, 0x00000000, 0x00058220, 0x00058220, 0x00000000 },
+ { 0x00009a50, 0x00000000, 0x00000000, 0x00058224, 0x00058224, 0x00000000 },
{ 0x00009a54, 0x00000000, 0x00000000, 0x00058290, 0x00058290, 0x00000000 },
{ 0x00009a58, 0x00000000, 0x00000000, 0x00058300, 0x00058300, 0x00000000 },
{ 0x00009a5c, 0x00000000, 0x00000000, 0x00058304, 0x00058304, 0x00000000 },
@@ -6455,8 +6455,8 @@ static const u_int32_t ar9271Modes_9271[][6] = {
{ 0x00009a7c, 0x00000000, 0x00000000, 0x0006870c, 0x0006870c, 0x00000000 },
{ 0x00009a80, 0x00000000, 0x00000000, 0x00068780, 0x00068780, 0x00000000 },
{ 0x00009a84, 0x00000000, 0x00000000, 0x00068784, 0x00068784, 0x00000000 },
- { 0x00009a88, 0x00000000, 0x00000000, 0x00078b04, 0x00078b04, 0x00000000 },
- { 0x00009a8c, 0x00000000, 0x00000000, 0x00078b08, 0x00078b08, 0x00000000 },
+ { 0x00009a88, 0x00000000, 0x00000000, 0x00078b00, 0x00078b00, 0x00000000 },
+ { 0x00009a8c, 0x00000000, 0x00000000, 0x00078b04, 0x00078b04, 0x00000000 },
{ 0x00009a90, 0x00000000, 0x00000000, 0x00078b08, 0x00078b08, 0x00000000 },
{ 0x00009a94, 0x00000000, 0x00000000, 0x00078b0c, 0x00078b0c, 0x00000000 },
{ 0x00009a98, 0x00000000, 0x00000000, 0x00078b80, 0x00078b80, 0x00000000 },
@@ -6569,7 +6569,7 @@ static const u_int32_t ar9271Modes_9271[][6] = {
{ 0x0000aa44, 0x00000000, 0x00000000, 0x000581a8, 0x000581a8, 0x00000000 },
{ 0x0000aa48, 0x00000000, 0x00000000, 0x00058284, 0x00058284, 0x00000000 },
{ 0x0000aa4c, 0x00000000, 0x00000000, 0x00058288, 0x00058288, 0x00000000 },
- { 0x0000aa50, 0x00000000, 0x00000000, 0x00058220, 0x00058220, 0x00000000 },
+ { 0x0000aa50, 0x00000000, 0x00000000, 0x00058224, 0x00058224, 0x00000000 },
{ 0x0000aa54, 0x00000000, 0x00000000, 0x00058290, 0x00058290, 0x00000000 },
{ 0x0000aa58, 0x00000000, 0x00000000, 0x00058300, 0x00058300, 0x00000000 },
{ 0x0000aa5c, 0x00000000, 0x00000000, 0x00058304, 0x00058304, 0x00000000 },
@@ -6583,8 +6583,8 @@ static const u_int32_t ar9271Modes_9271[][6] = {
{ 0x0000aa7c, 0x00000000, 0x00000000, 0x0006870c, 0x0006870c, 0x00000000 },
{ 0x0000aa80, 0x00000000, 0x00000000, 0x00068780, 0x00068780, 0x00000000 },
{ 0x0000aa84, 0x00000000, 0x00000000, 0x00068784, 0x00068784, 0x00000000 },
- { 0x0000aa88, 0x00000000, 0x00000000, 0x00078b04, 0x00078b04, 0x00000000 },
- { 0x0000aa8c, 0x00000000, 0x00000000, 0x00078b08, 0x00078b08, 0x00000000 },
+ { 0x0000aa88, 0x00000000, 0x00000000, 0x00078b00, 0x00078b00, 0x00000000 },
+ { 0x0000aa8c, 0x00000000, 0x00000000, 0x00078b04, 0x00078b04, 0x00000000 },
{ 0x0000aa90, 0x00000000, 0x00000000, 0x00078b08, 0x00078b08, 0x00000000 },
{ 0x0000aa94, 0x00000000, 0x00000000, 0x00078b0c, 0x00078b0c, 0x00000000 },
{ 0x0000aa98, 0x00000000, 0x00000000, 0x00078b80, 0x00078b80, 0x00000000 },
@@ -6683,25 +6683,6 @@ static const u_int32_t ar9271Modes_9271[][6] = {
{ 0x0000a21c, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a },
{ 0x0000a230, 0x00000000, 0x00000000, 0x00000210, 0x00000108, 0x00000000 },
{ 0x0000a250, 0x0004f000, 0x0004f000, 0x0004a000, 0x0004a000, 0x0004a000 },
- { 0x0000a274, 0x0a21c652, 0x0a21c652, 0x0a218652, 0x0a218652, 0x0a22a652 },
- { 0x0000a300, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
- { 0x0000a304, 0x00000000, 0x00000000, 0x00009200, 0x00009200, 0x00000000 },
- { 0x0000a308, 0x00000000, 0x00000000, 0x00010208, 0x00010208, 0x00000000 },
- { 0x0000a30c, 0x00000000, 0x00000000, 0x00019608, 0x00019608, 0x00000000 },
- { 0x0000a310, 0x00000000, 0x00000000, 0x0001e610, 0x0001e610, 0x00000000 },
- { 0x0000a314, 0x00000000, 0x00000000, 0x0002d6d0, 0x0002d6d0, 0x00000000 },
- { 0x0000a318, 0x00000000, 0x00000000, 0x00039758, 0x00039758, 0x00000000 },
- { 0x0000a31c, 0x00000000, 0x00000000, 0x0003b759, 0x0003b759, 0x00000000 },
- { 0x0000a320, 0x00000000, 0x00000000, 0x0003d75a, 0x0003d75a, 0x00000000 },
- { 0x0000a324, 0x00000000, 0x00000000, 0x0004175c, 0x0004175c, 0x00000000 },
- { 0x0000a328, 0x00000000, 0x00000000, 0x0004575e, 0x0004575e, 0x00000000 },
- { 0x0000a32c, 0x00000000, 0x00000000, 0x0004979f, 0x0004979f, 0x00000000 },
- { 0x0000a330, 0x00000000, 0x00000000, 0x0004d7df, 0x0004d7df, 0x00000000 },
- { 0x0000a334, 0x000368de, 0x000368de, 0x000368de, 0x000368de, 0x00000000 },
- { 0x0000a338, 0x0003891e, 0x0003891e, 0x0003891e, 0x0003891e, 0x00000000 },
- { 0x0000a33c, 0x0003a95e, 0x0003a95e, 0x0003a95e, 0x0003a95e, 0x00000000 },
- { 0x0000a340, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000 },
- { 0x0000a344, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000 },
{ 0x0000a358, 0x7999aa02, 0x7999aa02, 0x7999aa0e, 0x7999aa0e, 0x7999aa0e },
};

@@ -6879,7 +6860,7 @@ static const u_int32_t ar9271Common_9271[][2] = {
{ 0x00008258, 0x00000000 },
{ 0x0000825c, 0x400000ff },
{ 0x00008260, 0x00080922 },
- { 0x00008264, 0x88a00010 },
+ { 0x00008264, 0xa8a00010 },
{ 0x00008270, 0x00000000 },
{ 0x00008274, 0x40000000 },
{ 0x00008278, 0x003e4180 },
@@ -6910,13 +6891,10 @@ static const u_int32_t ar9271Common_9271[][2] = {
{ 0x00007810, 0x71c0d388 },
{ 0x00007814, 0x924934a8 },
{ 0x0000781c, 0x00000000 },
- { 0x00007820, 0x00000c04 },
- { 0x00007824, 0x00d8abff },
{ 0x00007828, 0x66964300 },
{ 0x0000782c, 0x8db6d961 },
{ 0x00007830, 0x8db6d96c },
{ 0x00007834, 0x6140008b },
- { 0x00007838, 0x00000029 },
{ 0x0000783c, 0x72ee0a72 },
{ 0x00007840, 0xbbfffffc },
{ 0x00007844, 0x000c0db6 },
@@ -6929,7 +6907,6 @@ static const u_int32_t ar9271Common_9271[][2] = {
{ 0x00007860, 0x21084210 },
{ 0x00007864, 0xf7d7ffde },
{ 0x00007868, 0xc2034080 },
- { 0x0000786c, 0x48609eb4 },
{ 0x00007870, 0x10142c00 },
{ 0x00009808, 0x00000000 },
{ 0x0000980c, 0xafe68e30 },
@@ -6982,9 +6959,6 @@ static const u_int32_t ar9271Common_9271[][2] = {
{ 0x000099e8, 0x3c466478 },
{ 0x000099ec, 0x0cc80caa },
{ 0x000099f0, 0x00000000 },
- { 0x0000a1f4, 0x00000000 },
- { 0x0000a1f8, 0x71733d01 },
- { 0x0000a1fc, 0xd0ad5c12 },
{ 0x0000a208, 0x803e68c8 },
{ 0x0000a210, 0x4080a333 },
{ 0x0000a214, 0x00206c10 },
@@ -7004,13 +6978,9 @@ static const u_int32_t ar9271Common_9271[][2] = {
{ 0x0000a260, 0xdfa90f01 },
{ 0x0000a268, 0x00000000 },
{ 0x0000a26c, 0x0ebae9e6 },
- { 0x0000a278, 0x3bdef7bd },
- { 0x0000a27c, 0x050e83bd },
{ 0x0000a388, 0x0c000000 },
{ 0x0000a38c, 0x20202020 },
{ 0x0000a390, 0x20202020 },
- { 0x0000a394, 0x3bdef7bd },
- { 0x0000a398, 0x000003bd },
{ 0x0000a39c, 0x00000001 },
{ 0x0000a3a0, 0x00000000 },
{ 0x0000a3a4, 0x00000000 },
@@ -7025,8 +6995,6 @@ static const u_int32_t ar9271Common_9271[][2] = {
{ 0x0000a3cc, 0x20202020 },
{ 0x0000a3d0, 0x20202020 },
{ 0x0000a3d4, 0x20202020 },
- { 0x0000a3dc, 0x3bdef7bd },
- { 0x0000a3e0, 0x000003bd },
{ 0x0000a3e4, 0x00000000 },
{ 0x0000a3e8, 0x18c43433 },
{ 0x0000a3ec, 0x00f70081 },
@@ -7046,7 +7014,102 @@ static const u_int32_t ar9271Common_9271[][2] = {
{ 0x0000d384, 0xf3307ff0 },
};

+static const u_int32_t ar9271Common_normal_cck_fir_coeff_9271[][2] = {
+ { 0x0000a1f4, 0x00fffeff },
+ { 0x0000a1f8, 0x00f5f9ff },
+ { 0x0000a1fc, 0xb79f6427 },
+};
+
+static const u_int32_t ar9271Common_japan_2484_cck_fir_coeff_9271[][2] = {
+ { 0x0000a1f4, 0x00000000 },
+ { 0x0000a1f8, 0xefff0301 },
+ { 0x0000a1fc, 0xca9228ee },
+};
+
static const u_int32_t ar9271Modes_9271_1_0_only[][6] = {
{ 0x00009910, 0x30002311, 0x30002311, 0x30002311, 0x30002311, 0x30002311 },
{ 0x00009828, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001 },
};
+
+static const u_int32_t ar9271Modes_9271_ANI_reg[][6] = {
+ { 0x00009850, 0x6d4000e2, 0x6d4000e2, 0x6d4000e2, 0x6d4000e2, 0x6d4000e2 },
+ { 0x0000985c, 0x3139605e, 0x3139605e, 0x3137605e, 0x3137605e, 0x3139605e },
+ { 0x00009858, 0x7ec84d2e, 0x7ec84d2e, 0x7ec84d2e, 0x7ec84d2e, 0x7ec84d2e },
+ { 0x0000986c, 0x06903881, 0x06903881, 0x06903881, 0x06903881, 0x06903881 },
+ { 0x00009868, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0 },
+ { 0x0000a208, 0x803e68c8, 0x803e68c8, 0x803e68c8, 0x803e68c8, 0x803e68c8 },
+ { 0x00009924, 0xd00a8007, 0xd00a8007, 0xd00a800d, 0xd00a800d, 0xd00a800d },
+ { 0x000099c0, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4 },
+};
+
+static const u_int32_t ar9271Modes_normal_power_tx_gain_9271[][6] = {
+ { 0x0000a300, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
+ { 0x0000a304, 0x00000000, 0x00000000, 0x00009200, 0x00009200, 0x00000000 },
+ { 0x0000a308, 0x00000000, 0x00000000, 0x00010208, 0x00010208, 0x00000000 },
+ { 0x0000a30c, 0x00000000, 0x00000000, 0x00019608, 0x00019608, 0x00000000 },
+ { 0x0000a310, 0x00000000, 0x00000000, 0x0001e610, 0x0001e610, 0x00000000 },
+ { 0x0000a314, 0x00000000, 0x00000000, 0x0002d6d0, 0x0002d6d0, 0x00000000 },
+ { 0x0000a318, 0x00000000, 0x00000000, 0x00039758, 0x00039758, 0x00000000 },
+ { 0x0000a31c, 0x00000000, 0x00000000, 0x0003b759, 0x0003b759, 0x00000000 },
+ { 0x0000a320, 0x00000000, 0x00000000, 0x0003d75a, 0x0003d75a, 0x00000000 },
+ { 0x0000a324, 0x00000000, 0x00000000, 0x0004175c, 0x0004175c, 0x00000000 },
+ { 0x0000a328, 0x00000000, 0x00000000, 0x0004575e, 0x0004575e, 0x00000000 },
+ { 0x0000a32c, 0x00000000, 0x00000000, 0x0004979f, 0x0004979f, 0x00000000 },
+ { 0x0000a330, 0x00000000, 0x00000000, 0x0004d7df, 0x0004d7df, 0x00000000 },
+ { 0x0000a334, 0x000368de, 0x000368de, 0x000368de, 0x000368de, 0x00000000 },
+ { 0x0000a338, 0x0003891e, 0x0003891e, 0x0003891e, 0x0003891e, 0x00000000 },
+ { 0x0000a33c, 0x0003a95e, 0x0003a95e, 0x0003a95e, 0x0003a95e, 0x00000000 },
+ { 0x0000a340, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000 },
+ { 0x0000a344, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000 },
+ { 0x0000a348, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000 },
+ { 0x0000a34c, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000 },
+ { 0x0000a350, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000 },
+ { 0x0000a354, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000 },
+ { 0x00007838, 0x00000029, 0x00000029, 0x00000029, 0x00000029, 0x00000029 },
+ { 0x00007824, 0x00d8abff, 0x00d8abff, 0x00d8abff, 0x00d8abff, 0x00d8abff },
+ { 0x0000786c, 0x48609eb4, 0x48609eb4, 0x48609eb4, 0x48609eb4, 0x48609eb4 },
+ { 0x00007820, 0x00000c04, 0x00000c04, 0x00000c04, 0x00000c04, 0x00000c04 },
+ { 0x0000a274, 0x0a21c652, 0x0a21c652, 0x0a218652, 0x0a218652, 0x0a22a652 },
+ { 0x0000a278, 0x3bdef7bd, 0x3bdef7bd, 0x3bdef7bd, 0x3bdef7bd, 0x3bdef7bd },
+ { 0x0000a27c, 0x050e83bd, 0x050e83bd, 0x050e83bd, 0x050e83bd, 0x050e83bd },
+ { 0x0000a394, 0x3bdef7bd, 0x3bdef7bd, 0x3bdef7bd, 0x3bdef7bd, 0x3bdef7bd },
+ { 0x0000a398, 0x000003bd, 0x000003bd, 0x000003bd, 0x000003bd, 0x000003bd },
+ { 0x0000a3dc, 0x3bdef7bd, 0x3bdef7bd, 0x3bdef7bd, 0x3bdef7bd, 0x3bdef7bd },
+ { 0x0000a3e0, 0x000003bd, 0x000003bd, 0x000003bd, 0x000003bd, 0x000003bd },
+};
+
+static const u_int32_t ar9271Modes_high_power_tx_gain_9271[][6] = {
+ { 0x0000a300, 0x00000000, 0x00000000, 0x00010000, 0x00010000, 0x00000000 },
+ { 0x0000a304, 0x00000000, 0x00000000, 0x00016200, 0x00016200, 0x00000000 },
+ { 0x0000a308, 0x00000000, 0x00000000, 0x00018201, 0x00018201, 0x00000000 },
+ { 0x0000a30c, 0x00000000, 0x00000000, 0x0001b240, 0x0001b240, 0x00000000 },
+ { 0x0000a310, 0x00000000, 0x00000000, 0x0001d241, 0x0001d241, 0x00000000 },
+ { 0x0000a314, 0x00000000, 0x00000000, 0x0001f600, 0x0001f600, 0x00000000 },
+ { 0x0000a318, 0x00000000, 0x00000000, 0x00022800, 0x00022800, 0x00000000 },
+ { 0x0000a31c, 0x00000000, 0x00000000, 0x00026802, 0x00026802, 0x00000000 },
+ { 0x0000a320, 0x00000000, 0x00000000, 0x0002b805, 0x0002b805, 0x00000000 },
+ { 0x0000a324, 0x00000000, 0x00000000, 0x0002ea41, 0x0002ea41, 0x00000000 },
+ { 0x0000a328, 0x00000000, 0x00000000, 0x00038b00, 0x00038b00, 0x00000000 },
+ { 0x0000a32c, 0x00000000, 0x00000000, 0x0003ab40, 0x0003ab40, 0x00000000 },
+ { 0x0000a330, 0x00000000, 0x00000000, 0x0003cd80, 0x0003cd80, 0x00000000 },
+ { 0x0000a334, 0x000368de, 0x000368de, 0x000368de, 0x000368de, 0x00000000 },
+ { 0x0000a338, 0x0003891e, 0x0003891e, 0x0003891e, 0x0003891e, 0x00000000 },
+ { 0x0000a33c, 0x0003a95e, 0x0003a95e, 0x0003a95e, 0x0003a95e, 0x00000000 },
+ { 0x0000a340, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000 },
+ { 0x0000a344, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000 },
+ { 0x0000a348, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000 },
+ { 0x0000a34c, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000 },
+ { 0x0000a350, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000 },
+ { 0x0000a354, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000 },
+ { 0x00007838, 0x0000002b, 0x0000002b, 0x0000002b, 0x0000002b, 0x0000002b },
+ { 0x00007824, 0x00d8a7ff, 0x00d8a7ff, 0x00d8a7ff, 0x00d8a7ff, 0x00d8a7ff },
+ { 0x0000786c, 0x08609eb6, 0x08609eb6, 0x08609eba, 0x08609eba, 0x08609eb6 },
+ { 0x00007820, 0x00000c00, 0x00000c00, 0x00000c00, 0x00000c00, 0x00000c00 },
+ { 0x0000a274, 0x0a22a652, 0x0a22a652, 0x0a212652, 0x0a212652, 0x0a22a652 },
+ { 0x0000a278, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7 },
+ { 0x0000a27c, 0x05018063, 0x05038063, 0x05018063, 0x05018063, 0x05018063 },
+ { 0x0000a394, 0x06318c63, 0x06318c63, 0x06318c63, 0x06318c63, 0x06318c63 },
+ { 0x0000a398, 0x00000063, 0x00000063, 0x00000063, 0x00000063, 0x00000063 },
+ { 0x0000a3dc, 0x06318c63, 0x06318c63, 0x06318c63, 0x06318c63, 0x06318c63 },
+ { 0x0000a3e0, 0x00000063, 0x00000063, 0x00000063, 0x00000063, 0x00000063 },
+};
--
1.6.3.3


2010-03-15 23:55:48

by Luis R. Rodriguez

[permalink] [raw]
Subject: Re: [PATCH v3 00/12] ath9k_hw: complete support for AR9271

On Mon, Mar 15, 2010 at 4:55 PM, Luis R. Rodriguez
<[email protected]> wrote:
> On Mon, Mar 15, 2010 at 4:52 PM, Felix Fietkau <[email protected]> wrote:
>> On 2010-03-16 12:49 AM, Luis R. Rodriguez wrote:
>>> diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
>>> index 00570fb..867cfaf 100644
>>> --- a/drivers/net/wireless/ath/ath9k/hw.c
>>> +++ b/drivers/net/wireless/ath/ath9k/hw.c
>>> @@ -807,6 +804,10 @@ void ath9k_hw_init_global_settings(struct ath_hw *ah)
>>>               acktimeout += 64 - sifstime - ah->slottime;
>>>
>>>       ath9k_hw_setslottime(ah, slottime);
>>> +
>>> +     if (AR_SREV_9271(ah))
>>> +             return;
>>> +
>>>       ath9k_hw_set_ack_timeout(ah, acktimeout);
>>>       ath9k_hw_set_cts_timeout(ah, acktimeout);
>>>       if (ah->globaltxtimeout != (u32) -1)
>>
>> Why leave out the ACK/CTS timeout setting? How does the hw handle ACK
>> and CTS timeouts?
>
> Right, so that's why I originally removed this hunk completely, I was
> under the impression you latest fix would have addressed any issues
> but it does not, we get association time outs. I think we'll have to
> review this further in order to support coverage class.

I should note the issue is only for ar9271.

Luis

2010-03-16 03:51:55

by Luis R. Rodriguez

[permalink] [raw]
Subject: Re: [PATCH v3 00/12] ath9k_hw: complete support for AR9271

On Mon, Mar 15, 2010 at 8:22 PM, Sujith <[email protected]> wrote:
> Luis R. Rodriguez wrote:
>> Hah, yeah that fixed this work around, it works fine with the below
>> patch, I went ahead and added the coverage class calllback while
>> at it.
>>
>> John this means I don't have to resend this series out, we can just
>> skip patch #4, that's all. I'll do one more review with our team and
>> get back to you on a final ACK for this series.
>>
>> Sujith, please review and consider integration of the below changes
>> on the ath9k_htc front.
>
> Integrate where ? I have no idea what is happening.

Into the ath9k_htc driver patch.

> Too many patch series floating around ..

Oh? Let me clarify.

1 - ath9k_htc
2 - hw code changes
3 - hw deinit fix

I've split up patch #2 into individual ones with a few changes. I also
merged patch #3 into this series because I need these patches in order
to continue doing any work on ar93xx. So what I am referring to is
your patch #1, the ath9k_htc patch.

Luis

2010-03-13 05:46:58

by Luis R. Rodriguez

[permalink] [raw]
Subject: [PATCH v3 07/12] ath9k_hw: fix noisefloor history buffer usage on AR9271

From: Sujith <[email protected]>

Noisefloor calibration involves querying hardware for samples
and storing this information on a history buffer in hardware for
actual noisefloor calibration processing in hardware. The history
buffer supports collecting information for all Atheros hardware,
one history buffer slot for each chain on each channel used for
MIMO operation. For current hardware this means one history
buffer slot for each chain on both the control (or primary) channel
and the extension (or secondary) channel. We know which noisefloor
registers to poke for collecting noisefloor data through the
chainmask.

For AR9285 and AR9271 devices, both 1x1, the chaimmask is defined as
0x9 = 0b0001001. The first four bits represent each chain out of
a maximum of 4 chains [0-3] on the primary channel. The last four
bits represent each chain on the extension channel. A chainmask
of 0x9 therefore indicates chain 1 is active on both the primary
and the extension channel.

AR9271 only requires collecting and storing noisefloor history buffer
data for the first chain on both the control and extension channel
(nfarray[0] and nfarray[3]) so fix the code and avoid which reads
and writes to the history buffer for the other chains.

Since the noisefloor varies depending on the number of chains your
device supports also initialize the noisefloor history buffer with
reasonable values seen on 1x1 devices such as AR9285.

Signed-off-by: Sujith <[email protected]>
Signed-off-by: Vasanthakumar Thiagarajan <[email protected]>
Signed-off-by: Luis R. Rodriguez <[email protected]>
---
drivers/net/wireless/ath/ath9k/calib.c | 8 ++++----
1 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/net/wireless/ath/ath9k/calib.c b/drivers/net/wireless/ath/ath9k/calib.c
index 238a574..0c3e9c8 100644
--- a/drivers/net/wireless/ath/ath9k/calib.c
+++ b/drivers/net/wireless/ath/ath9k/calib.c
@@ -103,7 +103,7 @@ static void ath9k_hw_do_getnf(struct ath_hw *ah,
"NF calibrated [ctl] [chain 0] is %d\n", nf);
nfarray[0] = nf;

- if (!AR_SREV_9285(ah)) {
+ if (!AR_SREV_9285(ah) && !AR_SREV_9271(ah)) {
if (AR_SREV_9280_10_OR_LATER(ah))
nf = MS(REG_READ(ah, AR_PHY_CH1_CCA),
AR9280_PHY_CH1_MINCCA_PWR);
@@ -141,7 +141,7 @@ static void ath9k_hw_do_getnf(struct ath_hw *ah,
"NF calibrated [ext] [chain 0] is %d\n", nf);
nfarray[3] = nf;

- if (!AR_SREV_9285(ah)) {
+ if (!AR_SREV_9285(ah) && !AR_SREV_9271(ah)) {
if (AR_SREV_9280_10_OR_LATER(ah))
nf = MS(REG_READ(ah, AR_PHY_CH1_EXT_CCA),
AR9280_PHY_CH1_EXT_MINCCA_PWR);
@@ -621,7 +621,7 @@ void ath9k_hw_loadnf(struct ath_hw *ah, struct ath9k_channel *chan)
u8 chainmask, rx_chain_status;

rx_chain_status = REG_READ(ah, AR_PHY_RX_CHAINMASK);
- if (AR_SREV_9285(ah))
+ if (AR_SREV_9285(ah) || AR_SREV_9271(ah))
chainmask = 0x9;
else if (AR_SREV_9280(ah) || AR_SREV_9287(ah)) {
if ((rx_chain_status & 0x2) || (rx_chain_status & 0x4))
@@ -715,7 +715,7 @@ void ath9k_init_nfcal_hist_buffer(struct ath_hw *ah)

if (AR_SREV_9280(ah))
noise_floor = AR_PHY_CCA_MAX_AR9280_GOOD_VALUE;
- else if (AR_SREV_9285(ah))
+ else if (AR_SREV_9285(ah) || AR_SREV_9271(ah))
noise_floor = AR_PHY_CCA_MAX_AR9285_GOOD_VALUE;
else if (AR_SREV_9287(ah))
noise_floor = AR_PHY_CCA_MAX_AR9287_GOOD_VALUE;
--
1.6.3.3


2010-03-16 00:09:25

by Luis R. Rodriguez

[permalink] [raw]
Subject: Re: [PATCH v3 00/12] ath9k_hw: complete support for AR9271

On Mon, Mar 15, 2010 at 5:05 PM, Felix Fietkau <[email protected]> wrote:
> On 2010-03-16 12:55 AM, Luis R. Rodriguez wrote:
>> On Mon, Mar 15, 2010 at 4:52 PM, Felix Fietkau <[email protected]> wrote:
>>> On 2010-03-16 12:49 AM, Luis R. Rodriguez wrote:
>>>> diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
>>>> index 00570fb..867cfaf 100644
>>>> --- a/drivers/net/wireless/ath/ath9k/hw.c
>>>> +++ b/drivers/net/wireless/ath/ath9k/hw.c
>>>> @@ -807,6 +804,10 @@ void ath9k_hw_init_global_settings(struct ath_hw *ah)
>>>>               acktimeout += 64 - sifstime - ah->slottime;
>>>>
>>>>       ath9k_hw_setslottime(ah, slottime);
>>>> +
>>>> +     if (AR_SREV_9271(ah))
>>>> +             return;
>>>> +
>>>>       ath9k_hw_set_ack_timeout(ah, acktimeout);
>>>>       ath9k_hw_set_cts_timeout(ah, acktimeout);
>>>>       if (ah->globaltxtimeout != (u32) -1)
>>>
>>> Why leave out the ACK/CTS timeout setting? How does the hw handle ACK
>>> and CTS timeouts?
>>
>> Right, so that's why I originally removed this hunk completely, I was
>> under the impression you latest fix would have addressed any issues
>> but it does not, we get association time outs. I think we'll have to
>> review this further in order to support coverage class.
> Are you sure the slot time was set properly by the callback?

Well ath9k_htc did not have it implemented, I just added the code for
it, you know what.. I did not test modifying the ACK/CTS timeout *and*
with the new slot time code I added to ath9k_htc, let me try that.

> Can you
> print out the values that it's setting?

Yeah, 20 upon initial association and then I see another setting for 9.

> The initvals for 9271 don't
> really look all that different.

Indeed, odd... this should work with the fudge factor you added.

Luis

2010-03-13 05:47:03

by Luis R. Rodriguez

[permalink] [raw]
Subject: [PATCH v3 12/12] ath9k_hw: fix hardware deinit

From: Sujith <[email protected]>

Without this you will get a panic if the device initialization
fails. Also, free ath_hw instance properly. ath9k_hw_deinit()
shouldn't do it.

Cc: [email protected]
Signed-off-by: Sujith <[email protected]>
Signed-off-by: Luis R. Rodriguez <[email protected]>
---
drivers/net/wireless/ath/ath9k/hw.c | 4 +---
drivers/net/wireless/ath/ath9k/init.c | 3 +++
2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index 0670d98..5f586df 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -1227,7 +1227,7 @@ void ath9k_hw_deinit(struct ath_hw *ah)
{
struct ath_common *common = ath9k_hw_common(ah);

- if (common->state <= ATH_HW_INITIALIZED)
+ if (common->state < ATH_HW_INITIALIZED)
goto free_hw;

if (!AR_SREV_9100(ah))
@@ -1238,8 +1238,6 @@ void ath9k_hw_deinit(struct ath_hw *ah)
free_hw:
if (!AR_SREV_9280_10_OR_LATER(ah) && !AR_SREV_9271(ah))
ath9k_hw_rf_free_ext_banks(ah);
- kfree(ah);
- ah = NULL;
}
EXPORT_SYMBOL(ath9k_hw_deinit);

diff --git a/drivers/net/wireless/ath/ath9k/init.c b/drivers/net/wireless/ath/ath9k/init.c
index 623c2f8..6063f54 100644
--- a/drivers/net/wireless/ath/ath9k/init.c
+++ b/drivers/net/wireless/ath/ath9k/init.c
@@ -758,6 +758,9 @@ static void ath9k_deinit_softc(struct ath_softc *sc)

tasklet_kill(&sc->intr_tq);
tasklet_kill(&sc->bcon_tasklet);
+
+ kfree(sc->sc_ah);
+ sc->sc_ah = NULL;
}

void ath9k_deinit_device(struct ath_softc *sc)
--
1.6.3.3


2010-03-13 05:46:58

by Luis R. Rodriguez

[permalink] [raw]
Subject: [PATCH v3 04/12] ath9k_hw: fix RF analog setup for AR9271

From: Sujith <[email protected]>

AR9271 is a single chip and as such does not have external radios.
Devices with external radio require additional programming, skip
this for AR9271 as we do for other single chips.

Signed-off-by: Sujith <[email protected]>
Signed-off-by: Vasanthakumar Thiagarajan <[email protected]>
Signed-off-by: Luis R. Rodriguez <[email protected]>
---
drivers/net/wireless/ath/ath9k/hw.c | 6 +++---
drivers/net/wireless/ath/ath9k/phy.c | 6 +++---
2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index b1a4a83..a0ef990 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -517,7 +517,7 @@ static int ath9k_hw_post_init(struct ath_hw *ah)
ah->eep_ops->get_eeprom_ver(ah),
ah->eep_ops->get_eeprom_rev(ah));

- if (!AR_SREV_9280_10_OR_LATER(ah)) {
+ if (!AR_SREV_9280_10_OR_LATER(ah) && !AR_SREV_9271(ah)) {
ecode = ath9k_hw_rf_alloc_ext_banks(ah);
if (ecode) {
ath_print(ath9k_hw_common(ah), ATH_DBG_FATAL,
@@ -917,7 +917,7 @@ int ath9k_hw_init(struct ath_hw *ah)
ath9k_hw_init_cal_settings(ah);

ah->ani_function = ATH9K_ANI_ALL;
- if (AR_SREV_9280_10_OR_LATER(ah)) {
+ if (AR_SREV_9280_10_OR_LATER(ah) || AR_SREV_9271(ah)) {
ah->ani_function &= ~ATH9K_ANI_NOISE_IMMUNITY_LEVEL;
ah->ath9k_hw_rf_set_freq = &ath9k_hw_ar9280_set_channel;
ah->ath9k_hw_spur_mitigate_freq = &ath9k_hw_9280_spur_mitigate;
@@ -1266,7 +1266,7 @@ void ath9k_hw_deinit(struct ath_hw *ah)
ath9k_hw_setpower(ah, ATH9K_PM_FULL_SLEEP);

free_hw:
- if (!AR_SREV_9280_10_OR_LATER(ah))
+ if (!AR_SREV_9280_10_OR_LATER(ah) && !AR_SREV_9271(ah))
ath9k_hw_rf_free_ext_banks(ah);
kfree(ah);
ah = NULL;
diff --git a/drivers/net/wireless/ath/ath9k/phy.c b/drivers/net/wireless/ath/ath9k/phy.c
index c3b5939..b761330 100644
--- a/drivers/net/wireless/ath/ath9k/phy.c
+++ b/drivers/net/wireless/ath/ath9k/phy.c
@@ -839,7 +839,7 @@ int ath9k_hw_rf_alloc_ext_banks(struct ath_hw *ah)

struct ath_common *common = ath9k_hw_common(ah);

- BUG_ON(AR_SREV_9280_10_OR_LATER(ah));
+ BUG_ON(AR_SREV_9280_10_OR_LATER(ah) || AR_SREV_9271(ah));

ATH_ALLOC_BANK(ah->analogBank0Data, ah->iniBank0.ia_rows);
ATH_ALLOC_BANK(ah->analogBank1Data, ah->iniBank1.ia_rows);
@@ -870,7 +870,7 @@ ath9k_hw_rf_free_ext_banks(struct ath_hw *ah)
bank = NULL; \
} while (0);

- BUG_ON(AR_SREV_9280_10_OR_LATER(ah));
+ BUG_ON(AR_SREV_9280_10_OR_LATER(ah) || AR_SREV_9271(ah));

ATH_FREE_BANK(ah->analogBank0Data);
ATH_FREE_BANK(ah->analogBank1Data);
@@ -910,7 +910,7 @@ bool ath9k_hw_set_rf_regs(struct ath_hw *ah, struct ath9k_channel *chan,
* for single chip devices, that is AR9280 or anything
* after that.
*/
- if (AR_SREV_9280_10_OR_LATER(ah))
+ if (AR_SREV_9280_10_OR_LATER(ah) || AR_SREV_9271(ah))
return true;

/* Setup rf parameters */
--
1.6.3.3