2019-08-21 19:16:06

by Felix Fietkau

[permalink] [raw]
Subject: [PATCH] mt76: mt7615: apply calibration-free data from OTP

MT7615 chips usually come pre-calibrated, even when used on embedded boards.
In that case, the on-flash EEPROM data needs to be merged with some data
from OTP ROM.
Run this merge if the external EEPROM data is valid and OTP has valid fields.

Signed-off-by: Felix Fietkau <[email protected]>
---
.../wireless/mediatek/mt76/mt7615/eeprom.c | 38 +++++++++++++++++++
1 file changed, 38 insertions(+)

diff --git a/drivers/net/wireless/mediatek/mt76/mt7615/eeprom.c b/drivers/net/wireless/mediatek/mt76/mt7615/eeprom.c
index dc94f52e6e8b..515bb58e19fd 100644
--- a/drivers/net/wireless/mediatek/mt76/mt7615/eeprom.c
+++ b/drivers/net/wireless/mediatek/mt76/mt7615/eeprom.c
@@ -154,6 +154,42 @@ int mt7615_eeprom_get_power_index(struct mt7615_dev *dev,
return index;
}

+static void mt7615_apply_cal_free_data(struct mt7615_dev *dev)
+{
+ static const u16 ical[] = {
+ 0x53, 0x54, 0x55, 0x56, 0x57, 0x5c, 0x5d, 0x62, 0x63, 0x68,
+ 0x69, 0x6e, 0x6f, 0x73, 0x74, 0x78, 0x79, 0x82, 0x83, 0x87,
+ 0x88, 0x8c, 0x8d, 0x91, 0x92, 0x96, 0x97, 0x9b, 0x9c, 0xa0,
+ 0xa1, 0xaa, 0xab, 0xaf, 0xb0, 0xb4, 0xb5, 0xb9, 0xba, 0xf4,
+ 0xf7, 0xff,
+ 0x140, 0x141, 0x145, 0x146, 0x14a, 0x14b, 0x154, 0x155, 0x159,
+ 0x15a, 0x15e, 0x15f, 0x163, 0x164, 0x168, 0x169, 0x16d, 0x16e,
+ 0x172, 0x173, 0x17c, 0x17d, 0x181, 0x182, 0x186, 0x187, 0x18b,
+ 0x18c
+ };
+ static const u16 ical_nocheck[] = {
+ 0x110, 0x111, 0x112, 0x113, 0x114, 0x115, 0x116, 0x117, 0x118,
+ 0x1b5, 0x1b6, 0x1b7, 0x3ac, 0x3ad, 0x3ae, 0x3af, 0x3b0, 0x3b1,
+ 0x3b2
+ };
+ u8 *eeprom = dev->mt76.eeprom.data;
+ u8 *otp = dev->mt76.otp.data;
+ int i;
+
+ if (!otp)
+ return;
+
+ for (i = 0; i < ARRAY_SIZE(ical); i++)
+ if (!otp[ical[i]])
+ return;
+
+ for (i = 0; i < ARRAY_SIZE(ical); i++)
+ eeprom[ical[i]] = otp[ical[i]];
+
+ for (i = 0; i < ARRAY_SIZE(ical_nocheck); i++)
+ eeprom[ical_nocheck[i]] = otp[ical_nocheck[i]];
+}
+
int mt7615_eeprom_init(struct mt7615_dev *dev)
{
int ret;
@@ -166,6 +202,8 @@ int mt7615_eeprom_init(struct mt7615_dev *dev)
if (ret && dev->mt76.otp.data)
memcpy(dev->mt76.eeprom.data, dev->mt76.otp.data,
MT7615_EEPROM_SIZE);
+ else
+ mt7615_apply_cal_free_data(dev);

mt7615_eeprom_parse_hw_cap(dev);
memcpy(dev->mt76.macaddr, dev->mt76.eeprom.data + MT_EE_MAC_ADDR,
--
2.17.0


2019-08-22 12:27:30

by Lorenzo Bianconi

[permalink] [raw]
Subject: Re: [PATCH] mt76: mt7615: apply calibration-free data from OTP

> MT7615 chips usually come pre-calibrated, even when used on embedded boards.
> In that case, the on-flash EEPROM data needs to be merged with some data
> from OTP ROM.
> Run this merge if the external EEPROM data is valid and OTP has valid fields.
>

Tested-by: Lorenzo Bianconi <[email protected]>

> Signed-off-by: Felix Fietkau <[email protected]>
> ---
> .../wireless/mediatek/mt76/mt7615/eeprom.c | 38 +++++++++++++++++++
> 1 file changed, 38 insertions(+)
>
> diff --git a/drivers/net/wireless/mediatek/mt76/mt7615/eeprom.c b/drivers/net/wireless/mediatek/mt76/mt7615/eeprom.c
> index dc94f52e6e8b..515bb58e19fd 100644
> --- a/drivers/net/wireless/mediatek/mt76/mt7615/eeprom.c
> +++ b/drivers/net/wireless/mediatek/mt76/mt7615/eeprom.c
> @@ -154,6 +154,42 @@ int mt7615_eeprom_get_power_index(struct mt7615_dev *dev,
> return index;
> }
>
> +static void mt7615_apply_cal_free_data(struct mt7615_dev *dev)
> +{
> + static const u16 ical[] = {
> + 0x53, 0x54, 0x55, 0x56, 0x57, 0x5c, 0x5d, 0x62, 0x63, 0x68,
> + 0x69, 0x6e, 0x6f, 0x73, 0x74, 0x78, 0x79, 0x82, 0x83, 0x87,
> + 0x88, 0x8c, 0x8d, 0x91, 0x92, 0x96, 0x97, 0x9b, 0x9c, 0xa0,
> + 0xa1, 0xaa, 0xab, 0xaf, 0xb0, 0xb4, 0xb5, 0xb9, 0xba, 0xf4,
> + 0xf7, 0xff,
> + 0x140, 0x141, 0x145, 0x146, 0x14a, 0x14b, 0x154, 0x155, 0x159,
> + 0x15a, 0x15e, 0x15f, 0x163, 0x164, 0x168, 0x169, 0x16d, 0x16e,
> + 0x172, 0x173, 0x17c, 0x17d, 0x181, 0x182, 0x186, 0x187, 0x18b,
> + 0x18c
> + };
> + static const u16 ical_nocheck[] = {
> + 0x110, 0x111, 0x112, 0x113, 0x114, 0x115, 0x116, 0x117, 0x118,
> + 0x1b5, 0x1b6, 0x1b7, 0x3ac, 0x3ad, 0x3ae, 0x3af, 0x3b0, 0x3b1,
> + 0x3b2
> + };
> + u8 *eeprom = dev->mt76.eeprom.data;
> + u8 *otp = dev->mt76.otp.data;
> + int i;
> +
> + if (!otp)
> + return;
> +
> + for (i = 0; i < ARRAY_SIZE(ical); i++)
> + if (!otp[ical[i]])
> + return;
> +
> + for (i = 0; i < ARRAY_SIZE(ical); i++)
> + eeprom[ical[i]] = otp[ical[i]];
> +
> + for (i = 0; i < ARRAY_SIZE(ical_nocheck); i++)
> + eeprom[ical_nocheck[i]] = otp[ical_nocheck[i]];
> +}
> +
> int mt7615_eeprom_init(struct mt7615_dev *dev)
> {
> int ret;
> @@ -166,6 +202,8 @@ int mt7615_eeprom_init(struct mt7615_dev *dev)
> if (ret && dev->mt76.otp.data)
> memcpy(dev->mt76.eeprom.data, dev->mt76.otp.data,
> MT7615_EEPROM_SIZE);
> + else
> + mt7615_apply_cal_free_data(dev);
>
> mt7615_eeprom_parse_hw_cap(dev);
> memcpy(dev->mt76.macaddr, dev->mt76.eeprom.data + MT_EE_MAC_ADDR,
> --
> 2.17.0
>


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